cxgb4_uld.h 13 KB

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  1. /*
  2. * This file is part of the Chelsio T4 Ethernet driver for Linux.
  3. *
  4. * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #ifndef __CXGB4_ULD_H
  35. #define __CXGB4_ULD_H
  36. #include <linux/cache.h>
  37. #include <linux/spinlock.h>
  38. #include <linux/skbuff.h>
  39. #include <linux/inetdevice.h>
  40. #include <linux/atomic.h>
  41. #include "cxgb4.h"
  42. #define MAX_ULD_QSETS 16
  43. /* CPL message priority levels */
  44. enum {
  45. CPL_PRIORITY_DATA = 0, /* data messages */
  46. CPL_PRIORITY_SETUP = 1, /* connection setup messages */
  47. CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
  48. CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
  49. CPL_PRIORITY_ACK = 1, /* RX ACK messages */
  50. CPL_PRIORITY_CONTROL = 1 /* control messages */
  51. };
  52. #define INIT_TP_WR(w, tid) do { \
  53. (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
  54. FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
  55. (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
  56. FW_WR_FLOWID_V(tid)); \
  57. (w)->wr.wr_lo = cpu_to_be64(0); \
  58. } while (0)
  59. #define INIT_TP_WR_CPL(w, cpl, tid) do { \
  60. INIT_TP_WR(w, tid); \
  61. OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
  62. } while (0)
  63. #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
  64. (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
  65. FW_WR_ATOMIC_V(atomic)); \
  66. (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
  67. FW_WR_FLOWID_V(tid)); \
  68. (w)->wr.wr_lo = cpu_to_be64(0); \
  69. } while (0)
  70. /* Special asynchronous notification message */
  71. #define CXGB4_MSG_AN ((void *)1)
  72. #define TX_ULD(uld)(((uld) != CXGB4_ULD_CRYPTO) ? CXGB4_TX_OFLD :\
  73. CXGB4_TX_CRYPTO)
  74. struct serv_entry {
  75. void *data;
  76. };
  77. union aopen_entry {
  78. void *data;
  79. union aopen_entry *next;
  80. };
  81. /*
  82. * Holds the size, base address, free list start, etc of the TID, server TID,
  83. * and active-open TID tables. The tables themselves are allocated dynamically.
  84. */
  85. struct tid_info {
  86. void **tid_tab;
  87. unsigned int ntids;
  88. struct serv_entry *stid_tab;
  89. unsigned long *stid_bmap;
  90. unsigned int nstids;
  91. unsigned int stid_base;
  92. unsigned int hash_base;
  93. union aopen_entry *atid_tab;
  94. unsigned int natids;
  95. unsigned int atid_base;
  96. struct filter_entry *ftid_tab;
  97. unsigned long *ftid_bmap;
  98. unsigned int nftids;
  99. unsigned int ftid_base;
  100. unsigned int aftid_base;
  101. unsigned int aftid_end;
  102. /* Server filter region */
  103. unsigned int sftid_base;
  104. unsigned int nsftids;
  105. spinlock_t atid_lock ____cacheline_aligned_in_smp;
  106. union aopen_entry *afree;
  107. unsigned int atids_in_use;
  108. spinlock_t stid_lock;
  109. unsigned int stids_in_use;
  110. unsigned int sftids_in_use;
  111. /* TIDs in the TCAM */
  112. atomic_t tids_in_use;
  113. /* TIDs in the HASH */
  114. atomic_t hash_tids_in_use;
  115. /* lock for setting/clearing filter bitmap */
  116. spinlock_t ftid_lock;
  117. };
  118. static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
  119. {
  120. return tid < t->ntids ? t->tid_tab[tid] : NULL;
  121. }
  122. static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
  123. {
  124. return atid < t->natids ? t->atid_tab[atid].data : NULL;
  125. }
  126. static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
  127. {
  128. /* Is it a server filter TID? */
  129. if (t->nsftids && (stid >= t->sftid_base)) {
  130. stid -= t->sftid_base;
  131. stid += t->nstids;
  132. } else {
  133. stid -= t->stid_base;
  134. }
  135. return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL;
  136. }
  137. static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
  138. unsigned int tid)
  139. {
  140. t->tid_tab[tid] = data;
  141. if (t->hash_base && (tid >= t->hash_base))
  142. atomic_inc(&t->hash_tids_in_use);
  143. else
  144. atomic_inc(&t->tids_in_use);
  145. }
  146. int cxgb4_alloc_atid(struct tid_info *t, void *data);
  147. int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
  148. int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data);
  149. void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
  150. void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
  151. void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid);
  152. struct in6_addr;
  153. int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
  154. __be32 sip, __be16 sport, __be16 vlan,
  155. unsigned int queue);
  156. int cxgb4_create_server6(const struct net_device *dev, unsigned int stid,
  157. const struct in6_addr *sip, __be16 sport,
  158. unsigned int queue);
  159. int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
  160. unsigned int queue, bool ipv6);
  161. int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
  162. __be32 sip, __be16 sport, __be16 vlan,
  163. unsigned int queue,
  164. unsigned char port, unsigned char mask);
  165. int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid,
  166. unsigned int queue, bool ipv6);
  167. /* Filter operation context to allow callers of cxgb4_set_filter() and
  168. * cxgb4_del_filter() to wait for an asynchronous completion.
  169. */
  170. struct filter_ctx {
  171. struct completion completion; /* completion rendezvous */
  172. void *closure; /* caller's opaque information */
  173. int result; /* result of operation */
  174. u32 tid; /* to store tid */
  175. };
  176. struct ch_filter_specification;
  177. int __cxgb4_set_filter(struct net_device *dev, int filter_id,
  178. struct ch_filter_specification *fs,
  179. struct filter_ctx *ctx);
  180. int __cxgb4_del_filter(struct net_device *dev, int filter_id,
  181. struct filter_ctx *ctx);
  182. int cxgb4_set_filter(struct net_device *dev, int filter_id,
  183. struct ch_filter_specification *fs);
  184. int cxgb4_del_filter(struct net_device *dev, int filter_id);
  185. static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
  186. {
  187. skb_set_queue_mapping(skb, (queue << 1) | prio);
  188. }
  189. enum cxgb4_uld {
  190. CXGB4_ULD_INIT,
  191. CXGB4_ULD_RDMA,
  192. CXGB4_ULD_ISCSI,
  193. CXGB4_ULD_ISCSIT,
  194. CXGB4_ULD_CRYPTO,
  195. CXGB4_ULD_MAX
  196. };
  197. enum cxgb4_tx_uld {
  198. CXGB4_TX_OFLD,
  199. CXGB4_TX_CRYPTO,
  200. CXGB4_TX_MAX
  201. };
  202. enum cxgb4_txq_type {
  203. CXGB4_TXQ_ETH,
  204. CXGB4_TXQ_ULD,
  205. CXGB4_TXQ_CTRL,
  206. CXGB4_TXQ_MAX
  207. };
  208. enum cxgb4_state {
  209. CXGB4_STATE_UP,
  210. CXGB4_STATE_START_RECOVERY,
  211. CXGB4_STATE_DOWN,
  212. CXGB4_STATE_DETACH
  213. };
  214. enum cxgb4_control {
  215. CXGB4_CONTROL_DB_FULL,
  216. CXGB4_CONTROL_DB_EMPTY,
  217. CXGB4_CONTROL_DB_DROP,
  218. };
  219. struct pci_dev;
  220. struct l2t_data;
  221. struct net_device;
  222. struct pkt_gl;
  223. struct tp_tcp_stats;
  224. struct t4_lro_mgr;
  225. struct cxgb4_range {
  226. unsigned int start;
  227. unsigned int size;
  228. };
  229. struct cxgb4_virt_res { /* virtualized HW resources */
  230. struct cxgb4_range ddp;
  231. struct cxgb4_range iscsi;
  232. struct cxgb4_range stag;
  233. struct cxgb4_range rq;
  234. struct cxgb4_range pbl;
  235. struct cxgb4_range qp;
  236. struct cxgb4_range cq;
  237. struct cxgb4_range ocq;
  238. };
  239. #define OCQ_WIN_OFFSET(pdev, vres) \
  240. (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
  241. /*
  242. * Block of information the LLD provides to ULDs attaching to a device.
  243. */
  244. struct cxgb4_lld_info {
  245. struct pci_dev *pdev; /* associated PCI device */
  246. struct l2t_data *l2t; /* L2 table */
  247. struct tid_info *tids; /* TID table */
  248. struct net_device **ports; /* device ports */
  249. const struct cxgb4_virt_res *vr; /* assorted HW resources */
  250. const unsigned short *mtus; /* MTU table */
  251. const unsigned short *rxq_ids; /* the ULD's Rx queue ids */
  252. const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */
  253. unsigned short nrxq; /* # of Rx queues */
  254. unsigned short ntxq; /* # of Tx queues */
  255. unsigned short nciq; /* # of concentrator IQ */
  256. unsigned char nchan:4; /* # of channels */
  257. unsigned char nports:4; /* # of ports */
  258. unsigned char wr_cred; /* WR 16-byte credits */
  259. unsigned char adapter_type; /* type of adapter */
  260. unsigned char fw_api_ver; /* FW API version */
  261. unsigned int fw_vers; /* FW version */
  262. unsigned int iscsi_iolen; /* iSCSI max I/O length */
  263. unsigned int cclk_ps; /* Core clock period in psec */
  264. unsigned short udb_density; /* # of user DB/page */
  265. unsigned short ucq_density; /* # of user CQs/page */
  266. unsigned short filt_mode; /* filter optional components */
  267. unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */
  268. /* scheduler queue */
  269. void __iomem *gts_reg; /* address of GTS register */
  270. void __iomem *db_reg; /* address of kernel doorbell */
  271. int dbfifo_int_thresh; /* doorbell fifo int threshold */
  272. unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */
  273. unsigned int sge_egrstatuspagesize; /* SGE egress status page size */
  274. unsigned int sge_pktshift; /* Padding between CPL and */
  275. /* packet data */
  276. unsigned int pf; /* Physical Function we're using */
  277. bool enable_fw_ofld_conn; /* Enable connection through fw */
  278. /* WR */
  279. unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */
  280. unsigned int max_ird_adapter; /* Max IRD memory per adapter */
  281. bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
  282. unsigned int iscsi_tagmask; /* iscsi ddp tag mask */
  283. unsigned int iscsi_pgsz_order; /* iscsi ddp page size orders */
  284. unsigned int iscsi_llimit; /* chip's iscsi region llimit */
  285. void **iscsi_ppm; /* iscsi page pod manager */
  286. int nodeid; /* device numa node id */
  287. bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */
  288. };
  289. struct cxgb4_uld_info {
  290. const char *name;
  291. void *handle;
  292. unsigned int nrxq;
  293. unsigned int rxq_size;
  294. unsigned int ntxq;
  295. bool ciq;
  296. bool lro;
  297. void *(*add)(const struct cxgb4_lld_info *p);
  298. int (*rx_handler)(void *handle, const __be64 *rsp,
  299. const struct pkt_gl *gl);
  300. int (*state_change)(void *handle, enum cxgb4_state new_state);
  301. int (*control)(void *handle, enum cxgb4_control control, ...);
  302. int (*lro_rx_handler)(void *handle, const __be64 *rsp,
  303. const struct pkt_gl *gl,
  304. struct t4_lro_mgr *lro_mgr,
  305. struct napi_struct *napi);
  306. void (*lro_flush)(struct t4_lro_mgr *);
  307. };
  308. int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
  309. int cxgb4_unregister_uld(enum cxgb4_uld type);
  310. int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
  311. int cxgb4_crypto_send(struct net_device *dev, struct sk_buff *skb);
  312. unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
  313. unsigned int cxgb4_port_chan(const struct net_device *dev);
  314. unsigned int cxgb4_port_viid(const struct net_device *dev);
  315. unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid);
  316. unsigned int cxgb4_port_idx(const struct net_device *dev);
  317. unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
  318. unsigned int *idx);
  319. unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus,
  320. unsigned short header_size,
  321. unsigned short data_size_max,
  322. unsigned short data_size_align,
  323. unsigned int *mtu_idxp);
  324. void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
  325. struct tp_tcp_stats *v6);
  326. void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
  327. const unsigned int *pgsz_order);
  328. struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
  329. unsigned int skb_len, unsigned int pull_len);
  330. int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
  331. int cxgb4_flush_eq_cache(struct net_device *dev);
  332. int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte);
  333. u64 cxgb4_read_sge_timestamp(struct net_device *dev);
  334. enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS };
  335. int cxgb4_bar2_sge_qregs(struct net_device *dev,
  336. unsigned int qid,
  337. enum cxgb4_bar2_qtype qtype,
  338. int user,
  339. u64 *pbar2_qoffset,
  340. unsigned int *pbar2_qid);
  341. #endif /* !__CXGB4_ULD_H */