octeon_network.h 10 KB

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  1. /**********************************************************************
  2. * Author: Cavium, Inc.
  3. *
  4. * Contact: support@cavium.com
  5. * Please include "LiquidIO" in the subject.
  6. *
  7. * Copyright (c) 2003-2016 Cavium, Inc.
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more
  17. * details.
  18. **********************************************************************/
  19. /*! \file octeon_network.h
  20. * \brief Host NIC Driver: Structure and Macro definitions used by NIC Module.
  21. */
  22. #ifndef __OCTEON_NETWORK_H__
  23. #define __OCTEON_NETWORK_H__
  24. #include <linux/ptp_clock_kernel.h>
  25. #define LIO_MAX_MTU_SIZE (OCTNET_MAX_FRM_SIZE - OCTNET_FRM_HEADER_SIZE)
  26. #define LIO_MIN_MTU_SIZE ETH_MIN_MTU
  27. struct oct_nic_stats_resp {
  28. u64 rh;
  29. struct oct_link_stats stats;
  30. u64 status;
  31. };
  32. struct oct_nic_stats_ctrl {
  33. struct completion complete;
  34. struct net_device *netdev;
  35. };
  36. /** LiquidIO per-interface network private data */
  37. struct lio {
  38. /** State of the interface. Rx/Tx happens only in the RUNNING state. */
  39. atomic_t ifstate;
  40. /** Octeon Interface index number. This device will be represented as
  41. * oct<ifidx> in the system.
  42. */
  43. int ifidx;
  44. /** Octeon Input queue to use to transmit for this network interface. */
  45. int txq;
  46. /** Octeon Output queue from which pkts arrive
  47. * for this network interface.
  48. */
  49. int rxq;
  50. /** Guards each glist */
  51. spinlock_t *glist_lock;
  52. /** Array of gather component linked lists */
  53. struct list_head *glist;
  54. /** Pointer to the NIC properties for the Octeon device this network
  55. * interface is associated with.
  56. */
  57. struct octdev_props *octprops;
  58. /** Pointer to the octeon device structure. */
  59. struct octeon_device *oct_dev;
  60. struct net_device *netdev;
  61. /** Link information sent by the core application for this interface. */
  62. struct oct_link_info linfo;
  63. /** counter of link changes */
  64. u64 link_changes;
  65. /** Size of Tx queue for this octeon device. */
  66. u32 tx_qsize;
  67. /** Size of Rx queue for this octeon device. */
  68. u32 rx_qsize;
  69. /** Size of MTU this octeon device. */
  70. u32 mtu;
  71. /** msg level flag per interface. */
  72. u32 msg_enable;
  73. /** Copy of Interface capabilities: TSO, TSO6, LRO, Chescksums . */
  74. u64 dev_capability;
  75. /* Copy of transmit encapsulation capabilities:
  76. * TSO, TSO6, Checksums for this device for Kernel
  77. * 3.10.0 onwards
  78. */
  79. u64 enc_dev_capability;
  80. /** Copy of beacaon reg in phy */
  81. u32 phy_beacon_val;
  82. /** Copy of ctrl reg in phy */
  83. u32 led_ctrl_val;
  84. /* PTP clock information */
  85. struct ptp_clock_info ptp_info;
  86. struct ptp_clock *ptp_clock;
  87. s64 ptp_adjust;
  88. /* for atomic access to Octeon PTP reg and data struct */
  89. spinlock_t ptp_lock;
  90. /* Interface info */
  91. u32 intf_open;
  92. /* work queue for txq status */
  93. struct cavium_wq txq_status_wq;
  94. /* work queue for link status */
  95. struct cavium_wq link_status_wq;
  96. int netdev_uc_count;
  97. };
  98. #define LIO_SIZE (sizeof(struct lio))
  99. #define GET_LIO(netdev) ((struct lio *)netdev_priv(netdev))
  100. #define CIU3_WDOG(c) (0x1010000020000ULL + ((c) << 3))
  101. #define CIU3_WDOG_MASK 12ULL
  102. #define LIO_MONITOR_WDOG_EXPIRE 1
  103. #define LIO_MONITOR_CORE_STUCK_MSGD 2
  104. #define LIO_MAX_CORES 12
  105. /**
  106. * \brief Enable or disable feature
  107. * @param netdev pointer to network device
  108. * @param cmd Command that just requires acknowledgment
  109. * @param param1 Parameter to command
  110. */
  111. int liquidio_set_feature(struct net_device *netdev, int cmd, u16 param1);
  112. /**
  113. * \brief Link control command completion callback
  114. * @param nctrl_ptr pointer to control packet structure
  115. *
  116. * This routine is called by the callback function when a ctrl pkt sent to
  117. * core app completes. The nctrl_ptr contains a copy of the command type
  118. * and data sent to the core app. This routine is only called if the ctrl
  119. * pkt was sent successfully to the core app.
  120. */
  121. void liquidio_link_ctrl_cmd_completion(void *nctrl_ptr);
  122. /**
  123. * \brief Register ethtool operations
  124. * @param netdev pointer to network device
  125. */
  126. void liquidio_set_ethtool_ops(struct net_device *netdev);
  127. #define SKB_ADJ_MASK 0x3F
  128. #define SKB_ADJ (SKB_ADJ_MASK + 1)
  129. #define MIN_SKB_SIZE 256 /* 8 bytes and more - 8 bytes for PTP */
  130. #define LIO_RXBUFFER_SZ 2048
  131. static inline void
  132. *recv_buffer_alloc(struct octeon_device *oct,
  133. struct octeon_skb_page_info *pg_info)
  134. {
  135. struct page *page;
  136. struct sk_buff *skb;
  137. struct octeon_skb_page_info *skb_pg_info;
  138. page = alloc_page(GFP_ATOMIC | __GFP_COLD);
  139. if (unlikely(!page))
  140. return NULL;
  141. skb = dev_alloc_skb(MIN_SKB_SIZE + SKB_ADJ);
  142. if (unlikely(!skb)) {
  143. __free_page(page);
  144. pg_info->page = NULL;
  145. return NULL;
  146. }
  147. if ((unsigned long)skb->data & SKB_ADJ_MASK) {
  148. u32 r = SKB_ADJ - ((unsigned long)skb->data & SKB_ADJ_MASK);
  149. skb_reserve(skb, r);
  150. }
  151. skb_pg_info = ((struct octeon_skb_page_info *)(skb->cb));
  152. /* Get DMA info */
  153. pg_info->dma = dma_map_page(&oct->pci_dev->dev, page, 0,
  154. PAGE_SIZE, DMA_FROM_DEVICE);
  155. /* Mapping failed!! */
  156. if (dma_mapping_error(&oct->pci_dev->dev, pg_info->dma)) {
  157. __free_page(page);
  158. dev_kfree_skb_any((struct sk_buff *)skb);
  159. pg_info->page = NULL;
  160. return NULL;
  161. }
  162. pg_info->page = page;
  163. pg_info->page_offset = 0;
  164. skb_pg_info->page = page;
  165. skb_pg_info->page_offset = 0;
  166. skb_pg_info->dma = pg_info->dma;
  167. return (void *)skb;
  168. }
  169. static inline void
  170. *recv_buffer_fast_alloc(u32 size)
  171. {
  172. struct sk_buff *skb;
  173. struct octeon_skb_page_info *skb_pg_info;
  174. skb = dev_alloc_skb(size + SKB_ADJ);
  175. if (unlikely(!skb))
  176. return NULL;
  177. if ((unsigned long)skb->data & SKB_ADJ_MASK) {
  178. u32 r = SKB_ADJ - ((unsigned long)skb->data & SKB_ADJ_MASK);
  179. skb_reserve(skb, r);
  180. }
  181. skb_pg_info = ((struct octeon_skb_page_info *)(skb->cb));
  182. skb_pg_info->page = NULL;
  183. skb_pg_info->page_offset = 0;
  184. skb_pg_info->dma = 0;
  185. return skb;
  186. }
  187. static inline int
  188. recv_buffer_recycle(struct octeon_device *oct, void *buf)
  189. {
  190. struct octeon_skb_page_info *pg_info = buf;
  191. if (!pg_info->page) {
  192. dev_err(&oct->pci_dev->dev, "%s: pg_info->page NULL\n",
  193. __func__);
  194. return -ENOMEM;
  195. }
  196. if (unlikely(page_count(pg_info->page) != 1) ||
  197. unlikely(page_to_nid(pg_info->page) != numa_node_id())) {
  198. dma_unmap_page(&oct->pci_dev->dev,
  199. pg_info->dma, (PAGE_SIZE << 0),
  200. DMA_FROM_DEVICE);
  201. pg_info->dma = 0;
  202. pg_info->page = NULL;
  203. pg_info->page_offset = 0;
  204. return -ENOMEM;
  205. }
  206. /* Flip to other half of the buffer */
  207. if (pg_info->page_offset == 0)
  208. pg_info->page_offset = LIO_RXBUFFER_SZ;
  209. else
  210. pg_info->page_offset = 0;
  211. page_ref_inc(pg_info->page);
  212. return 0;
  213. }
  214. static inline void
  215. *recv_buffer_reuse(struct octeon_device *oct, void *buf)
  216. {
  217. struct octeon_skb_page_info *pg_info = buf, *skb_pg_info;
  218. struct sk_buff *skb;
  219. skb = dev_alloc_skb(MIN_SKB_SIZE + SKB_ADJ);
  220. if (unlikely(!skb)) {
  221. dma_unmap_page(&oct->pci_dev->dev,
  222. pg_info->dma, (PAGE_SIZE << 0),
  223. DMA_FROM_DEVICE);
  224. return NULL;
  225. }
  226. if ((unsigned long)skb->data & SKB_ADJ_MASK) {
  227. u32 r = SKB_ADJ - ((unsigned long)skb->data & SKB_ADJ_MASK);
  228. skb_reserve(skb, r);
  229. }
  230. skb_pg_info = ((struct octeon_skb_page_info *)(skb->cb));
  231. skb_pg_info->page = pg_info->page;
  232. skb_pg_info->page_offset = pg_info->page_offset;
  233. skb_pg_info->dma = pg_info->dma;
  234. return skb;
  235. }
  236. static inline void
  237. recv_buffer_destroy(void *buffer, struct octeon_skb_page_info *pg_info)
  238. {
  239. struct sk_buff *skb = (struct sk_buff *)buffer;
  240. put_page(pg_info->page);
  241. pg_info->dma = 0;
  242. pg_info->page = NULL;
  243. pg_info->page_offset = 0;
  244. if (skb)
  245. dev_kfree_skb_any(skb);
  246. }
  247. static inline void recv_buffer_free(void *buffer)
  248. {
  249. struct sk_buff *skb = (struct sk_buff *)buffer;
  250. struct octeon_skb_page_info *pg_info;
  251. pg_info = ((struct octeon_skb_page_info *)(skb->cb));
  252. if (pg_info->page) {
  253. put_page(pg_info->page);
  254. pg_info->dma = 0;
  255. pg_info->page = NULL;
  256. pg_info->page_offset = 0;
  257. }
  258. dev_kfree_skb_any((struct sk_buff *)buffer);
  259. }
  260. static inline void
  261. recv_buffer_fast_free(void *buffer)
  262. {
  263. dev_kfree_skb_any((struct sk_buff *)buffer);
  264. }
  265. static inline void tx_buffer_free(void *buffer)
  266. {
  267. dev_kfree_skb_any((struct sk_buff *)buffer);
  268. }
  269. #define lio_dma_alloc(oct, size, dma_addr) \
  270. dma_alloc_coherent(&(oct)->pci_dev->dev, size, dma_addr, GFP_KERNEL)
  271. #define lio_dma_free(oct, size, virt_addr, dma_addr) \
  272. dma_free_coherent(&(oct)->pci_dev->dev, size, virt_addr, dma_addr)
  273. static inline
  274. void *get_rbd(struct sk_buff *skb)
  275. {
  276. struct octeon_skb_page_info *pg_info;
  277. unsigned char *va;
  278. pg_info = ((struct octeon_skb_page_info *)(skb->cb));
  279. va = page_address(pg_info->page) + pg_info->page_offset;
  280. return va;
  281. }
  282. static inline u64
  283. lio_map_ring_info(struct octeon_droq *droq, u32 i)
  284. {
  285. dma_addr_t dma_addr;
  286. struct octeon_device *oct = droq->oct_dev;
  287. dma_addr = dma_map_single(&oct->pci_dev->dev, &droq->info_list[i],
  288. OCT_DROQ_INFO_SIZE, DMA_FROM_DEVICE);
  289. WARN_ON(dma_mapping_error(&oct->pci_dev->dev, dma_addr));
  290. return (u64)dma_addr;
  291. }
  292. static inline void
  293. lio_unmap_ring_info(struct pci_dev *pci_dev,
  294. u64 info_ptr, u32 size)
  295. {
  296. dma_unmap_single(&pci_dev->dev, info_ptr, size, DMA_FROM_DEVICE);
  297. }
  298. static inline u64
  299. lio_map_ring(void *buf)
  300. {
  301. dma_addr_t dma_addr;
  302. struct sk_buff *skb = (struct sk_buff *)buf;
  303. struct octeon_skb_page_info *pg_info;
  304. pg_info = ((struct octeon_skb_page_info *)(skb->cb));
  305. if (!pg_info->page) {
  306. pr_err("%s: pg_info->page NULL\n", __func__);
  307. WARN_ON(1);
  308. }
  309. /* Get DMA info */
  310. dma_addr = pg_info->dma;
  311. if (!pg_info->dma) {
  312. pr_err("%s: ERROR it should be already available\n",
  313. __func__);
  314. WARN_ON(1);
  315. }
  316. dma_addr += pg_info->page_offset;
  317. return (u64)dma_addr;
  318. }
  319. static inline void
  320. lio_unmap_ring(struct pci_dev *pci_dev,
  321. u64 buf_ptr)
  322. {
  323. dma_unmap_page(&pci_dev->dev,
  324. buf_ptr, (PAGE_SIZE << 0),
  325. DMA_FROM_DEVICE);
  326. }
  327. static inline void *octeon_fast_packet_alloc(u32 size)
  328. {
  329. return recv_buffer_fast_alloc(size);
  330. }
  331. static inline void octeon_fast_packet_next(struct octeon_droq *droq,
  332. struct sk_buff *nicbuf,
  333. int copy_len,
  334. int idx)
  335. {
  336. memcpy(skb_put(nicbuf, copy_len),
  337. get_rbd(droq->recv_buf_list[idx].buffer), copy_len);
  338. }
  339. #endif