octeon_mailbox.c 8.7 KB

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  1. /**********************************************************************
  2. * Author: Cavium, Inc.
  3. *
  4. * Contact: support@cavium.com
  5. * Please include "LiquidIO" in the subject.
  6. *
  7. * Copyright (c) 2003-2016 Cavium, Inc.
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more details.
  17. ***********************************************************************/
  18. #include <linux/pci.h>
  19. #include <linux/netdevice.h>
  20. #include "liquidio_common.h"
  21. #include "octeon_droq.h"
  22. #include "octeon_iq.h"
  23. #include "response_manager.h"
  24. #include "octeon_device.h"
  25. #include "octeon_main.h"
  26. #include "octeon_mailbox.h"
  27. /**
  28. * octeon_mbox_read:
  29. * @oct: Pointer mailbox
  30. *
  31. * Reads the 8-bytes of data from the mbox register
  32. * Writes back the acknowldgement inidcating completion of read
  33. */
  34. int octeon_mbox_read(struct octeon_mbox *mbox)
  35. {
  36. union octeon_mbox_message msg;
  37. int ret = 0;
  38. spin_lock(&mbox->lock);
  39. msg.u64 = readq(mbox->mbox_read_reg);
  40. if ((msg.u64 == OCTEON_PFVFACK) || (msg.u64 == OCTEON_PFVFSIG)) {
  41. spin_unlock(&mbox->lock);
  42. return 0;
  43. }
  44. if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) {
  45. mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64;
  46. mbox->mbox_req.recv_len++;
  47. } else {
  48. if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) {
  49. mbox->mbox_resp.data[mbox->mbox_resp.recv_len - 1] =
  50. msg.u64;
  51. mbox->mbox_resp.recv_len++;
  52. } else {
  53. if ((mbox->state & OCTEON_MBOX_STATE_IDLE) &&
  54. (msg.s.type == OCTEON_MBOX_REQUEST)) {
  55. mbox->state &= ~OCTEON_MBOX_STATE_IDLE;
  56. mbox->state |=
  57. OCTEON_MBOX_STATE_REQUEST_RECEIVING;
  58. mbox->mbox_req.msg.u64 = msg.u64;
  59. mbox->mbox_req.q_no = mbox->q_no;
  60. mbox->mbox_req.recv_len = 1;
  61. } else {
  62. if ((mbox->state &
  63. OCTEON_MBOX_STATE_RESPONSE_PENDING) &&
  64. (msg.s.type == OCTEON_MBOX_RESPONSE)) {
  65. mbox->state &=
  66. ~OCTEON_MBOX_STATE_RESPONSE_PENDING;
  67. mbox->state |=
  68. OCTEON_MBOX_STATE_RESPONSE_RECEIVING
  69. ;
  70. mbox->mbox_resp.msg.u64 = msg.u64;
  71. mbox->mbox_resp.q_no = mbox->q_no;
  72. mbox->mbox_resp.recv_len = 1;
  73. } else {
  74. writeq(OCTEON_PFVFERR,
  75. mbox->mbox_read_reg);
  76. mbox->state |= OCTEON_MBOX_STATE_ERROR;
  77. spin_unlock(&mbox->lock);
  78. return 1;
  79. }
  80. }
  81. }
  82. }
  83. if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) {
  84. if (mbox->mbox_req.recv_len < msg.s.len) {
  85. ret = 0;
  86. } else {
  87. mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVING;
  88. mbox->state |= OCTEON_MBOX_STATE_REQUEST_RECEIVED;
  89. ret = 1;
  90. }
  91. } else {
  92. if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) {
  93. if (mbox->mbox_resp.recv_len < msg.s.len) {
  94. ret = 0;
  95. } else {
  96. mbox->state &=
  97. ~OCTEON_MBOX_STATE_RESPONSE_RECEIVING;
  98. mbox->state |=
  99. OCTEON_MBOX_STATE_RESPONSE_RECEIVED;
  100. ret = 1;
  101. }
  102. } else {
  103. WARN_ON(1);
  104. }
  105. }
  106. writeq(OCTEON_PFVFACK, mbox->mbox_read_reg);
  107. spin_unlock(&mbox->lock);
  108. return ret;
  109. }
  110. /**
  111. * octeon_mbox_write:
  112. * @oct: Pointer Octeon Device
  113. * @mbox_cmd: Cmd to send to mailbox.
  114. *
  115. * Populates the queue specific mbox structure
  116. * with cmd information.
  117. * Write the cmd to mbox register
  118. */
  119. int octeon_mbox_write(struct octeon_device *oct,
  120. struct octeon_mbox_cmd *mbox_cmd)
  121. {
  122. struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no];
  123. u32 count, i, ret = OCTEON_MBOX_STATUS_SUCCESS;
  124. unsigned long flags;
  125. spin_lock_irqsave(&mbox->lock, flags);
  126. if ((mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) &&
  127. !(mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED)) {
  128. spin_unlock_irqrestore(&mbox->lock, flags);
  129. return OCTEON_MBOX_STATUS_FAILED;
  130. }
  131. if ((mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) &&
  132. !(mbox->state & OCTEON_MBOX_STATE_IDLE)) {
  133. spin_unlock_irqrestore(&mbox->lock, flags);
  134. return OCTEON_MBOX_STATUS_BUSY;
  135. }
  136. if (mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) {
  137. memcpy(&mbox->mbox_resp, mbox_cmd,
  138. sizeof(struct octeon_mbox_cmd));
  139. mbox->state = OCTEON_MBOX_STATE_RESPONSE_PENDING;
  140. }
  141. spin_unlock_irqrestore(&mbox->lock, flags);
  142. count = 0;
  143. while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) {
  144. schedule_timeout_uninterruptible(LIO_MBOX_WRITE_WAIT_TIME);
  145. if (count++ == LIO_MBOX_WRITE_WAIT_CNT) {
  146. ret = OCTEON_MBOX_STATUS_FAILED;
  147. break;
  148. }
  149. }
  150. if (ret == OCTEON_MBOX_STATUS_SUCCESS) {
  151. writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg);
  152. for (i = 0; i < (u32)(mbox_cmd->msg.s.len - 1); i++) {
  153. count = 0;
  154. while (readq(mbox->mbox_write_reg) !=
  155. OCTEON_PFVFACK) {
  156. schedule_timeout_uninterruptible(10);
  157. if (count++ == LIO_MBOX_WRITE_WAIT_CNT) {
  158. ret = OCTEON_MBOX_STATUS_FAILED;
  159. break;
  160. }
  161. }
  162. writeq(mbox_cmd->data[i], mbox->mbox_write_reg);
  163. }
  164. }
  165. spin_lock_irqsave(&mbox->lock, flags);
  166. if (mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) {
  167. mbox->state = OCTEON_MBOX_STATE_IDLE;
  168. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  169. } else {
  170. if ((!mbox_cmd->msg.s.resp_needed) ||
  171. (ret == OCTEON_MBOX_STATUS_FAILED)) {
  172. mbox->state &= ~OCTEON_MBOX_STATE_RESPONSE_PENDING;
  173. if (!(mbox->state &
  174. (OCTEON_MBOX_STATE_REQUEST_RECEIVING |
  175. OCTEON_MBOX_STATE_REQUEST_RECEIVED)))
  176. mbox->state = OCTEON_MBOX_STATE_IDLE;
  177. }
  178. }
  179. spin_unlock_irqrestore(&mbox->lock, flags);
  180. return ret;
  181. }
  182. /**
  183. * octeon_mbox_process_cmd:
  184. * @mbox: Pointer mailbox
  185. * @mbox_cmd: Pointer to command received
  186. *
  187. * Process the cmd received in mbox
  188. */
  189. static int octeon_mbox_process_cmd(struct octeon_mbox *mbox,
  190. struct octeon_mbox_cmd *mbox_cmd)
  191. {
  192. struct octeon_device *oct = mbox->oct_dev;
  193. switch (mbox_cmd->msg.s.cmd) {
  194. case OCTEON_VF_ACTIVE:
  195. dev_dbg(&oct->pci_dev->dev, "got vfactive sending data back\n");
  196. mbox_cmd->msg.s.type = OCTEON_MBOX_RESPONSE;
  197. mbox_cmd->msg.s.resp_needed = 1;
  198. mbox_cmd->msg.s.len = 2;
  199. mbox_cmd->data[0] = 0; /* VF version is in mbox_cmd->data[0] */
  200. ((struct lio_version *)&mbox_cmd->data[0])->major =
  201. LIQUIDIO_BASE_MAJOR_VERSION;
  202. ((struct lio_version *)&mbox_cmd->data[0])->minor =
  203. LIQUIDIO_BASE_MINOR_VERSION;
  204. ((struct lio_version *)&mbox_cmd->data[0])->micro =
  205. LIQUIDIO_BASE_MICRO_VERSION;
  206. memcpy(mbox_cmd->msg.s.params, (uint8_t *)&oct->pfvf_hsword, 6);
  207. /* Sending core cofig info to the corresponding active VF.*/
  208. octeon_mbox_write(oct, mbox_cmd);
  209. break;
  210. case OCTEON_VF_FLR_REQUEST:
  211. dev_info(&oct->pci_dev->dev,
  212. "got a request for FLR from VF that owns DPI ring %u\n",
  213. mbox->q_no);
  214. pcie_capability_set_word(
  215. oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no],
  216. PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
  217. break;
  218. case OCTEON_PF_CHANGED_VF_MACADDR:
  219. if (OCTEON_CN23XX_VF(oct))
  220. octeon_pf_changed_vf_macaddr(oct,
  221. mbox_cmd->msg.s.params);
  222. break;
  223. default:
  224. break;
  225. }
  226. return 0;
  227. }
  228. /**
  229. *octeon_mbox_process_message:
  230. *
  231. * Process the received mbox message.
  232. */
  233. int octeon_mbox_process_message(struct octeon_mbox *mbox)
  234. {
  235. struct octeon_mbox_cmd mbox_cmd;
  236. unsigned long flags;
  237. spin_lock_irqsave(&mbox->lock, flags);
  238. if (mbox->state & OCTEON_MBOX_STATE_ERROR) {
  239. if (mbox->state & (OCTEON_MBOX_STATE_RESPONSE_PENDING |
  240. OCTEON_MBOX_STATE_RESPONSE_RECEIVING)) {
  241. memcpy(&mbox_cmd, &mbox->mbox_resp,
  242. sizeof(struct octeon_mbox_cmd));
  243. mbox->state = OCTEON_MBOX_STATE_IDLE;
  244. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  245. spin_unlock_irqrestore(&mbox->lock, flags);
  246. mbox_cmd.recv_status = 1;
  247. if (mbox_cmd.fn)
  248. mbox_cmd.fn(mbox->oct_dev, &mbox_cmd,
  249. mbox_cmd.fn_arg);
  250. return 0;
  251. }
  252. mbox->state = OCTEON_MBOX_STATE_IDLE;
  253. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  254. spin_unlock_irqrestore(&mbox->lock, flags);
  255. return 0;
  256. }
  257. if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVED) {
  258. memcpy(&mbox_cmd, &mbox->mbox_resp,
  259. sizeof(struct octeon_mbox_cmd));
  260. mbox->state = OCTEON_MBOX_STATE_IDLE;
  261. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  262. spin_unlock_irqrestore(&mbox->lock, flags);
  263. mbox_cmd.recv_status = 0;
  264. if (mbox_cmd.fn)
  265. mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, mbox_cmd.fn_arg);
  266. return 0;
  267. }
  268. if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED) {
  269. memcpy(&mbox_cmd, &mbox->mbox_req,
  270. sizeof(struct octeon_mbox_cmd));
  271. if (!mbox_cmd.msg.s.resp_needed) {
  272. mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVED;
  273. if (!(mbox->state &
  274. OCTEON_MBOX_STATE_RESPONSE_PENDING))
  275. mbox->state = OCTEON_MBOX_STATE_IDLE;
  276. writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
  277. }
  278. spin_unlock_irqrestore(&mbox->lock, flags);
  279. octeon_mbox_process_cmd(mbox, &mbox_cmd);
  280. return 0;
  281. }
  282. WARN_ON(1);
  283. return 0;
  284. }