emac_main.c 23 KB

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  1. /*
  2. * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * Driver for the ARC EMAC 10100 (hardware revision 5)
  9. *
  10. * Contributors:
  11. * Amit Bhor
  12. * Sameer Dhavale
  13. * Vineet Gupta
  14. */
  15. #include <linux/crc32.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/of_address.h>
  21. #include <linux/of_irq.h>
  22. #include <linux/of_mdio.h>
  23. #include <linux/of_net.h>
  24. #include <linux/of_platform.h>
  25. #include "emac.h"
  26. /**
  27. * arc_emac_tx_avail - Return the number of available slots in the tx ring.
  28. * @priv: Pointer to ARC EMAC private data structure.
  29. *
  30. * returns: the number of slots available for transmission in tx the ring.
  31. */
  32. static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
  33. {
  34. return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
  35. }
  36. /**
  37. * arc_emac_adjust_link - Adjust the PHY link duplex.
  38. * @ndev: Pointer to the net_device structure.
  39. *
  40. * This function is called to change the duplex setting after auto negotiation
  41. * is done by the PHY.
  42. */
  43. static void arc_emac_adjust_link(struct net_device *ndev)
  44. {
  45. struct arc_emac_priv *priv = netdev_priv(ndev);
  46. struct phy_device *phy_dev = ndev->phydev;
  47. unsigned int reg, state_changed = 0;
  48. if (priv->link != phy_dev->link) {
  49. priv->link = phy_dev->link;
  50. state_changed = 1;
  51. }
  52. if (priv->speed != phy_dev->speed) {
  53. priv->speed = phy_dev->speed;
  54. state_changed = 1;
  55. if (priv->set_mac_speed)
  56. priv->set_mac_speed(priv, priv->speed);
  57. }
  58. if (priv->duplex != phy_dev->duplex) {
  59. reg = arc_reg_get(priv, R_CTRL);
  60. if (phy_dev->duplex == DUPLEX_FULL)
  61. reg |= ENFL_MASK;
  62. else
  63. reg &= ~ENFL_MASK;
  64. arc_reg_set(priv, R_CTRL, reg);
  65. priv->duplex = phy_dev->duplex;
  66. state_changed = 1;
  67. }
  68. if (state_changed)
  69. phy_print_status(phy_dev);
  70. }
  71. /**
  72. * arc_emac_get_drvinfo - Get EMAC driver information.
  73. * @ndev: Pointer to net_device structure.
  74. * @info: Pointer to ethtool_drvinfo structure.
  75. *
  76. * This implements ethtool command for getting the driver information.
  77. * Issue "ethtool -i ethX" under linux prompt to execute this function.
  78. */
  79. static void arc_emac_get_drvinfo(struct net_device *ndev,
  80. struct ethtool_drvinfo *info)
  81. {
  82. struct arc_emac_priv *priv = netdev_priv(ndev);
  83. strlcpy(info->driver, priv->drv_name, sizeof(info->driver));
  84. strlcpy(info->version, priv->drv_version, sizeof(info->version));
  85. }
  86. static const struct ethtool_ops arc_emac_ethtool_ops = {
  87. .get_drvinfo = arc_emac_get_drvinfo,
  88. .get_link = ethtool_op_get_link,
  89. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  90. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  91. };
  92. #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
  93. /**
  94. * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
  95. * @ndev: Pointer to the network device.
  96. */
  97. static void arc_emac_tx_clean(struct net_device *ndev)
  98. {
  99. struct arc_emac_priv *priv = netdev_priv(ndev);
  100. struct net_device_stats *stats = &ndev->stats;
  101. unsigned int i;
  102. for (i = 0; i < TX_BD_NUM; i++) {
  103. unsigned int *txbd_dirty = &priv->txbd_dirty;
  104. struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
  105. struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
  106. struct sk_buff *skb = tx_buff->skb;
  107. unsigned int info = le32_to_cpu(txbd->info);
  108. if ((info & FOR_EMAC) || !txbd->data || !skb)
  109. break;
  110. if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
  111. stats->tx_errors++;
  112. stats->tx_dropped++;
  113. if (info & DEFR)
  114. stats->tx_carrier_errors++;
  115. if (info & LTCL)
  116. stats->collisions++;
  117. if (info & UFLO)
  118. stats->tx_fifo_errors++;
  119. } else if (likely(info & FIRST_OR_LAST_MASK)) {
  120. stats->tx_packets++;
  121. stats->tx_bytes += skb->len;
  122. }
  123. dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
  124. dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
  125. /* return the sk_buff to system */
  126. dev_kfree_skb_irq(skb);
  127. txbd->data = 0;
  128. txbd->info = 0;
  129. tx_buff->skb = NULL;
  130. *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
  131. }
  132. /* Ensure that txbd_dirty is visible to tx() before checking
  133. * for queue stopped.
  134. */
  135. smp_mb();
  136. if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
  137. netif_wake_queue(ndev);
  138. }
  139. /**
  140. * arc_emac_rx - processing of Rx packets.
  141. * @ndev: Pointer to the network device.
  142. * @budget: How many BDs to process on 1 call.
  143. *
  144. * returns: Number of processed BDs
  145. *
  146. * Iterate through Rx BDs and deliver received packages to upper layer.
  147. */
  148. static int arc_emac_rx(struct net_device *ndev, int budget)
  149. {
  150. struct arc_emac_priv *priv = netdev_priv(ndev);
  151. unsigned int work_done;
  152. for (work_done = 0; work_done < budget; work_done++) {
  153. unsigned int *last_rx_bd = &priv->last_rx_bd;
  154. struct net_device_stats *stats = &ndev->stats;
  155. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  156. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  157. unsigned int pktlen, info = le32_to_cpu(rxbd->info);
  158. struct sk_buff *skb;
  159. dma_addr_t addr;
  160. if (unlikely((info & OWN_MASK) == FOR_EMAC))
  161. break;
  162. /* Make a note that we saw a packet at this BD.
  163. * So next time, driver starts from this + 1
  164. */
  165. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  166. if (unlikely((info & FIRST_OR_LAST_MASK) !=
  167. FIRST_OR_LAST_MASK)) {
  168. /* We pre-allocate buffers of MTU size so incoming
  169. * packets won't be split/chained.
  170. */
  171. if (net_ratelimit())
  172. netdev_err(ndev, "incomplete packet received\n");
  173. /* Return ownership to EMAC */
  174. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  175. stats->rx_errors++;
  176. stats->rx_length_errors++;
  177. continue;
  178. }
  179. pktlen = info & LEN_MASK;
  180. stats->rx_packets++;
  181. stats->rx_bytes += pktlen;
  182. skb = rx_buff->skb;
  183. skb_put(skb, pktlen);
  184. skb->dev = ndev;
  185. skb->protocol = eth_type_trans(skb, ndev);
  186. dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
  187. dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
  188. /* Prepare the BD for next cycle */
  189. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  190. EMAC_BUFFER_SIZE);
  191. if (unlikely(!rx_buff->skb)) {
  192. stats->rx_errors++;
  193. /* Because receive_skb is below, increment rx_dropped */
  194. stats->rx_dropped++;
  195. continue;
  196. }
  197. /* receive_skb only if new skb was allocated to avoid holes */
  198. netif_receive_skb(skb);
  199. addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
  200. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  201. if (dma_mapping_error(&ndev->dev, addr)) {
  202. if (net_ratelimit())
  203. netdev_err(ndev, "cannot dma map\n");
  204. dev_kfree_skb(rx_buff->skb);
  205. stats->rx_errors++;
  206. continue;
  207. }
  208. dma_unmap_addr_set(rx_buff, addr, addr);
  209. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  210. rxbd->data = cpu_to_le32(addr);
  211. /* Make sure pointer to data buffer is set */
  212. wmb();
  213. /* Return ownership to EMAC */
  214. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  215. }
  216. return work_done;
  217. }
  218. /**
  219. * arc_emac_poll - NAPI poll handler.
  220. * @napi: Pointer to napi_struct structure.
  221. * @budget: How many BDs to process on 1 call.
  222. *
  223. * returns: Number of processed BDs
  224. */
  225. static int arc_emac_poll(struct napi_struct *napi, int budget)
  226. {
  227. struct net_device *ndev = napi->dev;
  228. struct arc_emac_priv *priv = netdev_priv(ndev);
  229. unsigned int work_done;
  230. arc_emac_tx_clean(ndev);
  231. work_done = arc_emac_rx(ndev, budget);
  232. if (work_done < budget) {
  233. napi_complete(napi);
  234. arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
  235. }
  236. return work_done;
  237. }
  238. /**
  239. * arc_emac_intr - Global interrupt handler for EMAC.
  240. * @irq: irq number.
  241. * @dev_instance: device instance.
  242. *
  243. * returns: IRQ_HANDLED for all cases.
  244. *
  245. * ARC EMAC has only 1 interrupt line, and depending on bits raised in
  246. * STATUS register we may tell what is a reason for interrupt to fire.
  247. */
  248. static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
  249. {
  250. struct net_device *ndev = dev_instance;
  251. struct arc_emac_priv *priv = netdev_priv(ndev);
  252. struct net_device_stats *stats = &ndev->stats;
  253. unsigned int status;
  254. status = arc_reg_get(priv, R_STATUS);
  255. status &= ~MDIO_MASK;
  256. /* Reset all flags except "MDIO complete" */
  257. arc_reg_set(priv, R_STATUS, status);
  258. if (status & (RXINT_MASK | TXINT_MASK)) {
  259. if (likely(napi_schedule_prep(&priv->napi))) {
  260. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
  261. __napi_schedule(&priv->napi);
  262. }
  263. }
  264. if (status & ERR_MASK) {
  265. /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
  266. * 8-bit error counter overrun.
  267. */
  268. if (status & MSER_MASK) {
  269. stats->rx_missed_errors += 0x100;
  270. stats->rx_errors += 0x100;
  271. }
  272. if (status & RXCR_MASK) {
  273. stats->rx_crc_errors += 0x100;
  274. stats->rx_errors += 0x100;
  275. }
  276. if (status & RXFR_MASK) {
  277. stats->rx_frame_errors += 0x100;
  278. stats->rx_errors += 0x100;
  279. }
  280. if (status & RXFL_MASK) {
  281. stats->rx_over_errors += 0x100;
  282. stats->rx_errors += 0x100;
  283. }
  284. }
  285. return IRQ_HANDLED;
  286. }
  287. #ifdef CONFIG_NET_POLL_CONTROLLER
  288. static void arc_emac_poll_controller(struct net_device *dev)
  289. {
  290. disable_irq(dev->irq);
  291. arc_emac_intr(dev->irq, dev);
  292. enable_irq(dev->irq);
  293. }
  294. #endif
  295. /**
  296. * arc_emac_open - Open the network device.
  297. * @ndev: Pointer to the network device.
  298. *
  299. * returns: 0, on success or non-zero error value on failure.
  300. *
  301. * This function sets the MAC address, requests and enables an IRQ
  302. * for the EMAC device and starts the Tx queue.
  303. * It also connects to the phy device.
  304. */
  305. static int arc_emac_open(struct net_device *ndev)
  306. {
  307. struct arc_emac_priv *priv = netdev_priv(ndev);
  308. struct phy_device *phy_dev = ndev->phydev;
  309. int i;
  310. phy_dev->autoneg = AUTONEG_ENABLE;
  311. phy_dev->speed = 0;
  312. phy_dev->duplex = 0;
  313. phy_dev->advertising &= phy_dev->supported;
  314. priv->last_rx_bd = 0;
  315. /* Allocate and set buffers for Rx BD's */
  316. for (i = 0; i < RX_BD_NUM; i++) {
  317. dma_addr_t addr;
  318. unsigned int *last_rx_bd = &priv->last_rx_bd;
  319. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  320. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  321. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  322. EMAC_BUFFER_SIZE);
  323. if (unlikely(!rx_buff->skb))
  324. return -ENOMEM;
  325. addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
  326. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  327. if (dma_mapping_error(&ndev->dev, addr)) {
  328. netdev_err(ndev, "cannot dma map\n");
  329. dev_kfree_skb(rx_buff->skb);
  330. return -ENOMEM;
  331. }
  332. dma_unmap_addr_set(rx_buff, addr, addr);
  333. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  334. rxbd->data = cpu_to_le32(addr);
  335. /* Make sure pointer to data buffer is set */
  336. wmb();
  337. /* Return ownership to EMAC */
  338. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  339. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  340. }
  341. priv->txbd_curr = 0;
  342. priv->txbd_dirty = 0;
  343. /* Clean Tx BD's */
  344. memset(priv->txbd, 0, TX_RING_SZ);
  345. /* Initialize logical address filter */
  346. arc_reg_set(priv, R_LAFL, 0);
  347. arc_reg_set(priv, R_LAFH, 0);
  348. /* Set BD ring pointers for device side */
  349. arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
  350. arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
  351. /* Enable interrupts */
  352. arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  353. /* Set CONTROL */
  354. arc_reg_set(priv, R_CTRL,
  355. (RX_BD_NUM << 24) | /* RX BD table length */
  356. (TX_BD_NUM << 16) | /* TX BD table length */
  357. TXRN_MASK | RXRN_MASK);
  358. napi_enable(&priv->napi);
  359. /* Enable EMAC */
  360. arc_reg_or(priv, R_CTRL, EN_MASK);
  361. phy_start_aneg(ndev->phydev);
  362. netif_start_queue(ndev);
  363. return 0;
  364. }
  365. /**
  366. * arc_emac_set_rx_mode - Change the receive filtering mode.
  367. * @ndev: Pointer to the network device.
  368. *
  369. * This function enables/disables promiscuous or all-multicast mode
  370. * and updates the multicast filtering list of the network device.
  371. */
  372. static void arc_emac_set_rx_mode(struct net_device *ndev)
  373. {
  374. struct arc_emac_priv *priv = netdev_priv(ndev);
  375. if (ndev->flags & IFF_PROMISC) {
  376. arc_reg_or(priv, R_CTRL, PROM_MASK);
  377. } else {
  378. arc_reg_clr(priv, R_CTRL, PROM_MASK);
  379. if (ndev->flags & IFF_ALLMULTI) {
  380. arc_reg_set(priv, R_LAFL, ~0);
  381. arc_reg_set(priv, R_LAFH, ~0);
  382. } else if (ndev->flags & IFF_MULTICAST) {
  383. struct netdev_hw_addr *ha;
  384. unsigned int filter[2] = { 0, 0 };
  385. int bit;
  386. netdev_for_each_mc_addr(ha, ndev) {
  387. bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
  388. filter[bit >> 5] |= 1 << (bit & 31);
  389. }
  390. arc_reg_set(priv, R_LAFL, filter[0]);
  391. arc_reg_set(priv, R_LAFH, filter[1]);
  392. } else {
  393. arc_reg_set(priv, R_LAFL, 0);
  394. arc_reg_set(priv, R_LAFH, 0);
  395. }
  396. }
  397. }
  398. /**
  399. * arc_free_tx_queue - free skb from tx queue
  400. * @ndev: Pointer to the network device.
  401. *
  402. * This function must be called while EMAC disable
  403. */
  404. static void arc_free_tx_queue(struct net_device *ndev)
  405. {
  406. struct arc_emac_priv *priv = netdev_priv(ndev);
  407. unsigned int i;
  408. for (i = 0; i < TX_BD_NUM; i++) {
  409. struct arc_emac_bd *txbd = &priv->txbd[i];
  410. struct buffer_state *tx_buff = &priv->tx_buff[i];
  411. if (tx_buff->skb) {
  412. dma_unmap_single(&ndev->dev,
  413. dma_unmap_addr(tx_buff, addr),
  414. dma_unmap_len(tx_buff, len),
  415. DMA_TO_DEVICE);
  416. /* return the sk_buff to system */
  417. dev_kfree_skb_irq(tx_buff->skb);
  418. }
  419. txbd->info = 0;
  420. txbd->data = 0;
  421. tx_buff->skb = NULL;
  422. }
  423. }
  424. /**
  425. * arc_free_rx_queue - free skb from rx queue
  426. * @ndev: Pointer to the network device.
  427. *
  428. * This function must be called while EMAC disable
  429. */
  430. static void arc_free_rx_queue(struct net_device *ndev)
  431. {
  432. struct arc_emac_priv *priv = netdev_priv(ndev);
  433. unsigned int i;
  434. for (i = 0; i < RX_BD_NUM; i++) {
  435. struct arc_emac_bd *rxbd = &priv->rxbd[i];
  436. struct buffer_state *rx_buff = &priv->rx_buff[i];
  437. if (rx_buff->skb) {
  438. dma_unmap_single(&ndev->dev,
  439. dma_unmap_addr(rx_buff, addr),
  440. dma_unmap_len(rx_buff, len),
  441. DMA_FROM_DEVICE);
  442. /* return the sk_buff to system */
  443. dev_kfree_skb_irq(rx_buff->skb);
  444. }
  445. rxbd->info = 0;
  446. rxbd->data = 0;
  447. rx_buff->skb = NULL;
  448. }
  449. }
  450. /**
  451. * arc_emac_stop - Close the network device.
  452. * @ndev: Pointer to the network device.
  453. *
  454. * This function stops the Tx queue, disables interrupts and frees the IRQ for
  455. * the EMAC device.
  456. * It also disconnects the PHY device associated with the EMAC device.
  457. */
  458. static int arc_emac_stop(struct net_device *ndev)
  459. {
  460. struct arc_emac_priv *priv = netdev_priv(ndev);
  461. napi_disable(&priv->napi);
  462. netif_stop_queue(ndev);
  463. /* Disable interrupts */
  464. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  465. /* Disable EMAC */
  466. arc_reg_clr(priv, R_CTRL, EN_MASK);
  467. /* Return the sk_buff to system */
  468. arc_free_tx_queue(ndev);
  469. arc_free_rx_queue(ndev);
  470. return 0;
  471. }
  472. /**
  473. * arc_emac_stats - Get system network statistics.
  474. * @ndev: Pointer to net_device structure.
  475. *
  476. * Returns the address of the device statistics structure.
  477. * Statistics are updated in interrupt handler.
  478. */
  479. static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
  480. {
  481. struct arc_emac_priv *priv = netdev_priv(ndev);
  482. struct net_device_stats *stats = &ndev->stats;
  483. unsigned long miss, rxerr;
  484. u8 rxcrc, rxfram, rxoflow;
  485. rxerr = arc_reg_get(priv, R_RXERR);
  486. miss = arc_reg_get(priv, R_MISS);
  487. rxcrc = rxerr;
  488. rxfram = rxerr >> 8;
  489. rxoflow = rxerr >> 16;
  490. stats->rx_errors += miss;
  491. stats->rx_errors += rxcrc + rxfram + rxoflow;
  492. stats->rx_over_errors += rxoflow;
  493. stats->rx_frame_errors += rxfram;
  494. stats->rx_crc_errors += rxcrc;
  495. stats->rx_missed_errors += miss;
  496. return stats;
  497. }
  498. /**
  499. * arc_emac_tx - Starts the data transmission.
  500. * @skb: sk_buff pointer that contains data to be Transmitted.
  501. * @ndev: Pointer to net_device structure.
  502. *
  503. * returns: NETDEV_TX_OK, on success
  504. * NETDEV_TX_BUSY, if any of the descriptors are not free.
  505. *
  506. * This function is invoked from upper layers to initiate transmission.
  507. */
  508. static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
  509. {
  510. struct arc_emac_priv *priv = netdev_priv(ndev);
  511. unsigned int len, *txbd_curr = &priv->txbd_curr;
  512. struct net_device_stats *stats = &ndev->stats;
  513. __le32 *info = &priv->txbd[*txbd_curr].info;
  514. dma_addr_t addr;
  515. if (skb_padto(skb, ETH_ZLEN))
  516. return NETDEV_TX_OK;
  517. len = max_t(unsigned int, ETH_ZLEN, skb->len);
  518. if (unlikely(!arc_emac_tx_avail(priv))) {
  519. netif_stop_queue(ndev);
  520. netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
  521. return NETDEV_TX_BUSY;
  522. }
  523. addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
  524. DMA_TO_DEVICE);
  525. if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
  526. stats->tx_dropped++;
  527. stats->tx_errors++;
  528. dev_kfree_skb_any(skb);
  529. return NETDEV_TX_OK;
  530. }
  531. dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
  532. dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
  533. priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
  534. /* Make sure pointer to data buffer is set */
  535. wmb();
  536. skb_tx_timestamp(skb);
  537. *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
  538. /* Make sure info word is set */
  539. wmb();
  540. priv->tx_buff[*txbd_curr].skb = skb;
  541. /* Increment index to point to the next BD */
  542. *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
  543. /* Ensure that tx_clean() sees the new txbd_curr before
  544. * checking the queue status. This prevents an unneeded wake
  545. * of the queue in tx_clean().
  546. */
  547. smp_mb();
  548. if (!arc_emac_tx_avail(priv)) {
  549. netif_stop_queue(ndev);
  550. /* Refresh tx_dirty */
  551. smp_mb();
  552. if (arc_emac_tx_avail(priv))
  553. netif_start_queue(ndev);
  554. }
  555. arc_reg_set(priv, R_STATUS, TXPL_MASK);
  556. return NETDEV_TX_OK;
  557. }
  558. static void arc_emac_set_address_internal(struct net_device *ndev)
  559. {
  560. struct arc_emac_priv *priv = netdev_priv(ndev);
  561. unsigned int addr_low, addr_hi;
  562. addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
  563. addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
  564. arc_reg_set(priv, R_ADDRL, addr_low);
  565. arc_reg_set(priv, R_ADDRH, addr_hi);
  566. }
  567. /**
  568. * arc_emac_set_address - Set the MAC address for this device.
  569. * @ndev: Pointer to net_device structure.
  570. * @p: 6 byte Address to be written as MAC address.
  571. *
  572. * This function copies the HW address from the sockaddr structure to the
  573. * net_device structure and updates the address in HW.
  574. *
  575. * returns: -EBUSY if the net device is busy or 0 if the address is set
  576. * successfully.
  577. */
  578. static int arc_emac_set_address(struct net_device *ndev, void *p)
  579. {
  580. struct sockaddr *addr = p;
  581. if (netif_running(ndev))
  582. return -EBUSY;
  583. if (!is_valid_ether_addr(addr->sa_data))
  584. return -EADDRNOTAVAIL;
  585. memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
  586. arc_emac_set_address_internal(ndev);
  587. return 0;
  588. }
  589. static const struct net_device_ops arc_emac_netdev_ops = {
  590. .ndo_open = arc_emac_open,
  591. .ndo_stop = arc_emac_stop,
  592. .ndo_start_xmit = arc_emac_tx,
  593. .ndo_set_mac_address = arc_emac_set_address,
  594. .ndo_get_stats = arc_emac_stats,
  595. .ndo_set_rx_mode = arc_emac_set_rx_mode,
  596. #ifdef CONFIG_NET_POLL_CONTROLLER
  597. .ndo_poll_controller = arc_emac_poll_controller,
  598. #endif
  599. };
  600. int arc_emac_probe(struct net_device *ndev, int interface)
  601. {
  602. struct device *dev = ndev->dev.parent;
  603. struct resource res_regs;
  604. struct device_node *phy_node;
  605. struct phy_device *phydev = NULL;
  606. struct arc_emac_priv *priv;
  607. const char *mac_addr;
  608. unsigned int id, clock_frequency, irq;
  609. int err;
  610. /* Get PHY from device tree */
  611. phy_node = of_parse_phandle(dev->of_node, "phy", 0);
  612. if (!phy_node) {
  613. dev_err(dev, "failed to retrieve phy description from device tree\n");
  614. return -ENODEV;
  615. }
  616. /* Get EMAC registers base address from device tree */
  617. err = of_address_to_resource(dev->of_node, 0, &res_regs);
  618. if (err) {
  619. dev_err(dev, "failed to retrieve registers base from device tree\n");
  620. err = -ENODEV;
  621. goto out_put_node;
  622. }
  623. /* Get IRQ from device tree */
  624. irq = irq_of_parse_and_map(dev->of_node, 0);
  625. if (!irq) {
  626. dev_err(dev, "failed to retrieve <irq> value from device tree\n");
  627. err = -ENODEV;
  628. goto out_put_node;
  629. }
  630. ndev->netdev_ops = &arc_emac_netdev_ops;
  631. ndev->ethtool_ops = &arc_emac_ethtool_ops;
  632. ndev->watchdog_timeo = TX_TIMEOUT;
  633. priv = netdev_priv(ndev);
  634. priv->dev = dev;
  635. priv->regs = devm_ioremap_resource(dev, &res_regs);
  636. if (IS_ERR(priv->regs)) {
  637. err = PTR_ERR(priv->regs);
  638. goto out_put_node;
  639. }
  640. dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
  641. if (priv->clk) {
  642. err = clk_prepare_enable(priv->clk);
  643. if (err) {
  644. dev_err(dev, "failed to enable clock\n");
  645. goto out_put_node;
  646. }
  647. clock_frequency = clk_get_rate(priv->clk);
  648. } else {
  649. /* Get CPU clock frequency from device tree */
  650. if (of_property_read_u32(dev->of_node, "clock-frequency",
  651. &clock_frequency)) {
  652. dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
  653. err = -EINVAL;
  654. goto out_put_node;
  655. }
  656. }
  657. id = arc_reg_get(priv, R_ID);
  658. /* Check for EMAC revision 5 or 7, magic number */
  659. if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
  660. dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
  661. err = -ENODEV;
  662. goto out_clken;
  663. }
  664. dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
  665. /* Set poll rate so that it polls every 1 ms */
  666. arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
  667. ndev->irq = irq;
  668. dev_info(dev, "IRQ is %d\n", ndev->irq);
  669. /* Register interrupt handler for device */
  670. err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
  671. ndev->name, ndev);
  672. if (err) {
  673. dev_err(dev, "could not allocate IRQ\n");
  674. goto out_clken;
  675. }
  676. /* Get MAC address from device tree */
  677. mac_addr = of_get_mac_address(dev->of_node);
  678. if (mac_addr)
  679. memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
  680. else
  681. eth_hw_addr_random(ndev);
  682. arc_emac_set_address_internal(ndev);
  683. dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
  684. /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
  685. priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
  686. &priv->rxbd_dma, GFP_KERNEL);
  687. if (!priv->rxbd) {
  688. dev_err(dev, "failed to allocate data buffers\n");
  689. err = -ENOMEM;
  690. goto out_clken;
  691. }
  692. priv->txbd = priv->rxbd + RX_BD_NUM;
  693. priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
  694. dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
  695. (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
  696. err = arc_mdio_probe(priv);
  697. if (err) {
  698. dev_err(dev, "failed to probe MII bus\n");
  699. goto out_clken;
  700. }
  701. phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
  702. interface);
  703. if (!phydev) {
  704. dev_err(dev, "of_phy_connect() failed\n");
  705. err = -ENODEV;
  706. goto out_mdio;
  707. }
  708. dev_info(dev, "connected to %s phy with id 0x%x\n",
  709. phydev->drv->name, phydev->phy_id);
  710. netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
  711. err = register_netdev(ndev);
  712. if (err) {
  713. dev_err(dev, "failed to register network device\n");
  714. goto out_netif_api;
  715. }
  716. of_node_put(phy_node);
  717. return 0;
  718. out_netif_api:
  719. netif_napi_del(&priv->napi);
  720. phy_disconnect(phydev);
  721. out_mdio:
  722. arc_mdio_remove(priv);
  723. out_clken:
  724. if (priv->clk)
  725. clk_disable_unprepare(priv->clk);
  726. out_put_node:
  727. of_node_put(phy_node);
  728. return err;
  729. }
  730. EXPORT_SYMBOL_GPL(arc_emac_probe);
  731. int arc_emac_remove(struct net_device *ndev)
  732. {
  733. struct arc_emac_priv *priv = netdev_priv(ndev);
  734. phy_disconnect(ndev->phydev);
  735. arc_mdio_remove(priv);
  736. unregister_netdev(ndev);
  737. netif_napi_del(&priv->napi);
  738. if (!IS_ERR(priv->clk))
  739. clk_disable_unprepare(priv->clk);
  740. return 0;
  741. }
  742. EXPORT_SYMBOL_GPL(arc_emac_remove);
  743. MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
  744. MODULE_DESCRIPTION("ARC EMAC driver");
  745. MODULE_LICENSE("GPL");