sst28sf040.c 3.4 KB

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  1. /*
  2. * This file is part of the flashrom project.
  3. *
  4. * Copyright (C) 2000 Silicon Integrated System Corporation
  5. * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
  6. * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  21. */
  22. #include "flash.h"
  23. #include "chipdrivers.h"
  24. #define AUTO_PG_ERASE1 0x20
  25. #define AUTO_PG_ERASE2 0xD0
  26. #define AUTO_PGRM 0x10
  27. #define CHIP_ERASE 0x30
  28. #define RESET 0xFF
  29. #define READ_ID 0x90
  30. int protect_28sf040(struct flashctx *flash)
  31. {
  32. chipaddr bios = flash->virtual_memory;
  33. chip_readb(flash, bios + 0x1823);
  34. chip_readb(flash, bios + 0x1820);
  35. chip_readb(flash, bios + 0x1822);
  36. chip_readb(flash, bios + 0x0418);
  37. chip_readb(flash, bios + 0x041B);
  38. chip_readb(flash, bios + 0x0419);
  39. chip_readb(flash, bios + 0x040A);
  40. return 0;
  41. }
  42. int unprotect_28sf040(struct flashctx *flash)
  43. {
  44. chipaddr bios = flash->virtual_memory;
  45. chip_readb(flash, bios + 0x1823);
  46. chip_readb(flash, bios + 0x1820);
  47. chip_readb(flash, bios + 0x1822);
  48. chip_readb(flash, bios + 0x0418);
  49. chip_readb(flash, bios + 0x041B);
  50. chip_readb(flash, bios + 0x0419);
  51. chip_readb(flash, bios + 0x041A);
  52. return 0;
  53. }
  54. int erase_sector_28sf040(struct flashctx *flash, unsigned int address, unsigned int sector_size)
  55. {
  56. chipaddr bios = flash->virtual_memory;
  57. /* This command sequence is very similar to erase_block_82802ab. */
  58. chip_writeb(flash, AUTO_PG_ERASE1, bios);
  59. chip_writeb(flash, AUTO_PG_ERASE2, bios + address);
  60. /* wait for Toggle bit ready */
  61. toggle_ready_jedec(flash, bios);
  62. /* FIXME: Check the status register for errors. */
  63. return 0;
  64. }
  65. /* chunksize is 1 */
  66. int write_28sf040(struct flashctx *flash, uint8_t *src, unsigned int start, unsigned int len)
  67. {
  68. int i;
  69. chipaddr bios = flash->virtual_memory;
  70. chipaddr dst = flash->virtual_memory + start;
  71. for (i = 0; i < len; i++) {
  72. /* transfer data from source to destination */
  73. if (*src == 0xFF) {
  74. dst++, src++;
  75. /* If the data is 0xFF, don't program it */
  76. continue;
  77. }
  78. /*issue AUTO PROGRAM command */
  79. chip_writeb(flash, AUTO_PGRM, dst);
  80. chip_writeb(flash, *src++, dst++);
  81. /* wait for Toggle bit ready */
  82. toggle_ready_jedec(flash, bios);
  83. }
  84. return 0;
  85. }
  86. static int erase_28sf040(struct flashctx *flash)
  87. {
  88. chipaddr bios = flash->virtual_memory;
  89. chip_writeb(flash, CHIP_ERASE, bios);
  90. chip_writeb(flash, CHIP_ERASE, bios);
  91. programmer_delay(10);
  92. toggle_ready_jedec(flash, bios);
  93. /* FIXME: Check the status register for errors. */
  94. return 0;
  95. }
  96. int erase_chip_28sf040(struct flashctx *flash, unsigned int addr, unsigned int blocklen)
  97. {
  98. if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
  99. msg_cerr("%s called with incorrect arguments\n",
  100. __func__);
  101. return -1;
  102. }
  103. return erase_28sf040(flash);
  104. }