flash.h 15 KB

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  1. /*
  2. * This file is part of the flashrom project.
  3. *
  4. * Copyright (C) 2000 Silicon Integrated System Corporation
  5. * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
  6. * Copyright (C) 2005-2009 coresystems GmbH
  7. * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22. */
  23. #ifndef __FLASH_H__
  24. #define __FLASH_H__ 1
  25. #include <stdint.h>
  26. #include <stddef.h>
  27. #include "hwaccess.h"
  28. #ifdef _WIN32
  29. #include <windows.h>
  30. #undef min
  31. #undef max
  32. #endif
  33. /* Are timers broken? */
  34. extern int broken_timer;
  35. struct flashctx; /* forward declare */
  36. #define ERROR_PTR ((void*)-1)
  37. /* Error codes */
  38. #define TIMEOUT_ERROR -101
  39. /* for verify_it variable in flashrom.c and cli_mfg.c */
  40. enum {
  41. VERIFY_OFF = 0,
  42. VERIFY_FULL,
  43. VERIFY_PARTIAL,
  44. };
  45. /*
  46. * This is shared between handle_partial_read() and erase_and_write_flash().
  47. * If a partial write is to be performed, the read function needs to guess what
  48. * the eraseable block size is in case the region specified is not aligned. Then
  49. * it can ensure any data within the same block but outside the specified region
  50. * is read and later restored. The erase/write function will need to find a
  51. * usable erase function with the same size.
  52. *
  53. * Some chips support multiple opcodes to erase a particular block size, so
  54. * we'll leave that guesswork to erase_and_write_flash(). Any opcode is allowed
  55. * so long as the alignment used during partial read and erase are the same.
  56. */
  57. extern unsigned int required_erase_size;
  58. typedef unsigned long chipaddr;
  59. int register_shutdown(int (*function) (void *data), void *data);
  60. #define CHIP_RESTORE_CALLBACK int (*func) (struct flashctx *flash, uint8_t status)
  61. int register_chip_restore(CHIP_RESTORE_CALLBACK, struct flashctx *flash, uint8_t status);
  62. void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
  63. size_t len);
  64. void programmer_unmap_flash_region(void *virt_addr, size_t len);
  65. void programmer_delay(int usecs);
  66. #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
  67. enum chipbustype {
  68. BUS_NONE = 0,
  69. BUS_PARALLEL = 1 << 0,
  70. BUS_LPC = 1 << 1,
  71. BUS_FWH = 1 << 2,
  72. BUS_SPI = 1 << 3,
  73. BUS_PROG = 1 << 4,
  74. BUS_NONSPI = BUS_PARALLEL | BUS_LPC | BUS_FWH,
  75. };
  76. /* used to select bus which target chip resides */
  77. extern enum chipbustype target_bus;
  78. /*
  79. * How many different contiguous runs of erase blocks with one size each do
  80. * we have for a given erase function?
  81. */
  82. #define NUM_ERASEREGIONS 5
  83. /*
  84. * How many different erase functions do we have per chip?
  85. * Atmel AT25FS010 has 6 different functions.
  86. */
  87. #define NUM_ERASEFUNCTIONS 6
  88. #define FEATURE_REGISTERMAP (1 << 0)
  89. #define FEATURE_BYTEWRITES (1 << 1)
  90. #define FEATURE_LONG_RESET (0 << 4)
  91. #define FEATURE_SHORT_RESET (1 << 4)
  92. #define FEATURE_EITHER_RESET FEATURE_LONG_RESET
  93. #define FEATURE_RESET_MASK (FEATURE_LONG_RESET | FEATURE_SHORT_RESET)
  94. #define FEATURE_ADDR_FULL (0 << 2)
  95. #define FEATURE_ADDR_MASK (3 << 2)
  96. #define FEATURE_ADDR_2AA (1 << 2)
  97. #define FEATURE_ADDR_AAA (2 << 2)
  98. #define FEATURE_ADDR_SHIFTED (1 << 5)
  99. #define FEATURE_WRSR_EWSR (1 << 6)
  100. #define FEATURE_WRSR_WREN (1 << 7)
  101. #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN)
  102. #define FEATURE_OTP (1 << 8)
  103. #define FEATURE_ERASE_TO_ZERO (1 << 9)
  104. #define FEATURE_UNBOUND_READ (1 << 10)
  105. struct voltage_range {
  106. uint16_t min, max;
  107. };
  108. struct flashchip {
  109. const char *vendor;
  110. const char *name;
  111. enum chipbustype bustype;
  112. /*
  113. * With 32bit manufacture_id and model_id we can cover IDs up to
  114. * (including) the 4th bank of JEDEC JEP106W Standard Manufacturer's
  115. * Identification code.
  116. */
  117. uint32_t manufacture_id;
  118. uint32_t model_id;
  119. /* Total chip size in kilobytes */
  120. unsigned int total_size;
  121. /* Chip page size in bytes */
  122. unsigned int page_size;
  123. int feature_bits;
  124. /*
  125. * Indicate if flashrom has been tested with this flash chip and if
  126. * everything worked correctly.
  127. */
  128. uint32_t tested;
  129. int (*probe) (struct flashctx *flash);
  130. /* Delay after "enter/exit ID mode" commands in microseconds.
  131. * NB: negative values have special meanings, see TIMING_* below.
  132. */
  133. signed int probe_timing;
  134. /*
  135. * Erase blocks and associated erase function. Any chip erase function
  136. * is stored as chip-sized virtual block together with said function.
  137. * The first one that fits will be chosen. There is currently no way to
  138. * influence that behaviour. For testing just comment out the other
  139. * elements or set the function pointer to NULL.
  140. */
  141. struct block_eraser {
  142. struct eraseblock{
  143. unsigned int size; /* Eraseblock size in bytes */
  144. unsigned int count; /* Number of contiguous blocks with that size */
  145. } eraseblocks[NUM_ERASEREGIONS];
  146. /* a block_erase function should try to erase one block of size
  147. * 'blocklen' at address 'blockaddr' and return 0 on success. */
  148. int (*block_erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
  149. } block_erasers[NUM_ERASEFUNCTIONS];
  150. int (*printlock) (struct flashctx *flash);
  151. int (*unlock) (struct flashctx *flash);
  152. int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
  153. int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
  154. uint8_t (*read_status) (const struct flashctx *flash);
  155. int (*write_status) (const struct flashctx *flash, int status);
  156. struct voltage_range voltage;
  157. struct wp *wp;
  158. };
  159. /* struct flashctx must always contain struct flashchip at the beginning. */
  160. struct flashctx {
  161. const char *vendor;
  162. const char *name;
  163. enum chipbustype bustype;
  164. uint32_t manufacture_id;
  165. uint32_t model_id;
  166. int total_size;
  167. int page_size;
  168. int feature_bits;
  169. uint32_t tested;
  170. int (*probe) (struct flashctx *flash);
  171. int probe_timing;
  172. struct block_eraser block_erasers[NUM_ERASEFUNCTIONS];
  173. int (*printlock) (struct flashctx *flash);
  174. int (*unlock) (struct flashctx *flash);
  175. int (*write) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
  176. int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
  177. uint8_t (*read_status) (const struct flashctx *flash);
  178. int (*write_status) (const struct flashctx *flash, int status);
  179. struct voltage_range voltage;
  180. struct wp *wp;
  181. /* struct flashchip ends here. */
  182. chipaddr virtual_memory;
  183. /* Some flash devices have an additional register space. */
  184. chipaddr virtual_registers;
  185. };
  186. /* This is the byte value we expect to see in erased regions of the flash */
  187. int flash_erase_value(struct flashctx *flash);
  188. /* This is a byte value that indicates that the region is not erased */
  189. int flash_unerased_value(struct flashctx *flash);
  190. #define TEST_UNTESTED 0
  191. #define TEST_OK_PROBE (1 << 0)
  192. #define TEST_OK_READ (1 << 1)
  193. #define TEST_OK_ERASE (1 << 2)
  194. #define TEST_OK_WRITE (1 << 3)
  195. #define TEST_OK_UREAD (1 << 4)
  196. #define TEST_OK_PR (TEST_OK_PROBE | TEST_OK_READ)
  197. #define TEST_OK_PRE (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE)
  198. #define TEST_OK_PREU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_UREAD)
  199. #define TEST_OK_PRU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_UREAD)
  200. #define TEST_OK_PRW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_WRITE)
  201. #define TEST_OK_PREW (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE)
  202. #define TEST_OK_PREWU (TEST_OK_PROBE | TEST_OK_READ | TEST_OK_ERASE | TEST_OK_WRITE | TEST_OK_UREAD)
  203. #define TEST_OK_MASK 0x1f
  204. #define TEST_BAD_PROBE (1 << 5)
  205. #define TEST_BAD_READ (1 << 6)
  206. #define TEST_BAD_ERASE (1 << 7)
  207. #define TEST_BAD_WRITE (1 << 8)
  208. #define TEST_BAD_UREAD (1 << 9)
  209. #define TEST_BAD_PREW (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE)
  210. #define TEST_BAD_PREWU (TEST_BAD_PROBE | TEST_BAD_READ | TEST_BAD_ERASE | TEST_BAD_WRITE | TEST_BAD_UREAD)
  211. #define TEST_BAD_MASK 0x3e0
  212. /* Timing used in probe routines. ZERO is -2 to differentiate between an unset
  213. * field and zero delay.
  214. *
  215. * SPI devices will always have zero delay and ignore this field.
  216. */
  217. #define TIMING_FIXME -1
  218. /* this is intentionally same value as fixme */
  219. #define TIMING_IGNORED -1
  220. #define TIMING_ZERO -2
  221. extern const struct flashchip flashchips[];
  222. extern const struct flashchip flashchips_hwseq[];
  223. void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
  224. void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr);
  225. void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr);
  226. void chip_writen(const struct flashctx *flash, uint8_t *buf, chipaddr addr, size_t len);
  227. uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr);
  228. uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr);
  229. uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr);
  230. void chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
  231. /* print.c */
  232. char *flashbuses_to_text(enum chipbustype bustype);
  233. void print_supported(void);
  234. void print_supported_wiki(void);
  235. /* flashrom.c */
  236. enum write_granularity {
  237. write_gran_1bit,
  238. write_gran_1byte,
  239. write_gran_256bytes,
  240. };
  241. extern enum chipbustype buses_supported;
  242. extern int verbose_screen;
  243. extern int verbose_logfile;
  244. extern const char flashrom_version[];
  245. extern char *chip_to_probe;
  246. void map_flash_registers(struct flashctx *flash);
  247. int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
  248. int erase_flash(struct flashctx *flash);
  249. int probe_flash(int startchip, struct flashctx *fill_flash, int force);
  250. int read_flash(struct flashctx *flash, uint8_t *buf,
  251. unsigned int start, unsigned int len);
  252. int read_flash_to_file(struct flashctx *flash, const char *filename);
  253. int min(int a, int b);
  254. int max(int a, int b);
  255. void tolower_string(char *str);
  256. char *extract_param(char **haystack, const char *needle, const char *delim);
  257. int verify_range(struct flashctx *flash, uint8_t *cmpbuf, unsigned int start, unsigned int len, const char *message);
  258. char *strcat_realloc(char *dest, const char *src);
  259. void print_version(void);
  260. void print_buildinfo(void);
  261. void print_banner(void);
  262. void list_programmers_linebreak(int startcol, int cols, int paren);
  263. int selfcheck(void);
  264. int doit(struct flashctx *flash, int force, const char *filename, int read_it,
  265. int write_it, int erase_it, int verify_it, int extract_it,
  266. const char *diff_file);
  267. int read_buf_from_file(unsigned char *buf, unsigned long size, const char *filename);
  268. int write_buf_to_file(unsigned char *buf, unsigned long size, const char *filename);
  269. #define OK 0
  270. #define NT 1 /* Not tested */
  271. /* what to do in case of an error */
  272. enum error_action {
  273. error_fail, /* fail immediately */
  274. error_ignore, /* non-fatal error; continue */
  275. };
  276. /* Something happened that shouldn't happen, but we can go on. */
  277. #define ERROR_NONFATAL 0x100
  278. /* Something happened that shouldn't happen, we'll abort. */
  279. #define ERROR_FATAL -0xee
  280. /* Operation failed due to access restriction set in programmer or flash chip */
  281. #define ACCESS_DENIED -7
  282. extern enum error_action access_denied_action;
  283. /* convenience function for checking return codes */
  284. extern int ignore_error(int x);
  285. /* cli_output.c */
  286. #ifndef STANDALONE
  287. int open_logfile(const char * const filename);
  288. int close_logfile(void);
  289. void start_logging(void);
  290. #endif
  291. /* Let gcc and clang check for correct printf-style format strings. */
  292. int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
  293. #define MSG_ERROR 0
  294. #define MSG_INFO 1
  295. #define MSG_DEBUG 2
  296. #define MSG_DEBUG2 3
  297. #define MSG_BARF 4
  298. #define msg_gerr(...) print(MSG_ERROR, __VA_ARGS__) /* general errors */
  299. #define msg_perr(...) print(MSG_ERROR, __VA_ARGS__) /* programmer errors */
  300. #define msg_cerr(...) print(MSG_ERROR, __VA_ARGS__) /* chip errors */
  301. #define msg_ginfo(...) print(MSG_INFO, __VA_ARGS__) /* general info */
  302. #define msg_pinfo(...) print(MSG_INFO, __VA_ARGS__) /* programmer info */
  303. #define msg_cinfo(...) print(MSG_INFO, __VA_ARGS__) /* chip info */
  304. #define msg_gdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* general debug */
  305. #define msg_pdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* programmer debug */
  306. #define msg_cdbg(...) print(MSG_DEBUG, __VA_ARGS__) /* chip debug */
  307. #define msg_gdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* general debug2 */
  308. #define msg_pdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* programmer debug2 */
  309. #define msg_cdbg2(...) print(MSG_DEBUG2, __VA_ARGS__) /* chip debug2 */
  310. #define msg_gspew(...) print(MSG_BARF, __VA_ARGS__) /* general debug barf */
  311. #define msg_pspew(...) print(MSG_BARF, __VA_ARGS__) /* programmer debug barf */
  312. #define msg_cspew(...) print(MSG_BARF, __VA_ARGS__) /* chip debug barf */
  313. /* layout.c */
  314. int specified_partition();
  315. int read_romlayout(char *name);
  316. int find_romentry(char *name);
  317. int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
  318. int add_fmap_entries(struct flashctx *flash);
  319. int get_num_include_args(void);
  320. int register_include_arg(char *name);
  321. int process_include_args(void);
  322. int num_include_files(void);
  323. int included_regions_overlap(void);
  324. int handle_romentries(struct flashctx *flash, uint8_t *oldcontents, uint8_t *newcontents);
  325. int handle_partial_read(
  326. struct flashctx *flash,
  327. uint8_t *buf,
  328. int (*read) (struct flashctx *flash, uint8_t *buf,
  329. unsigned int start, unsigned int len),
  330. int write_to_file);
  331. /* RETURN: the number of partitions that have beenpartial read.
  332. * ==0 means no partition is specified.
  333. * < 0 means writing file error. */
  334. int handle_partial_verify(
  335. struct flashctx *flash,
  336. uint8_t *buf,
  337. int (*verify) (struct flashctx *flash, uint8_t *buf, unsigned int start,
  338. unsigned int len, const char* message));
  339. /* RETURN: ==0 means all identical.
  340. !=0 means buf and flash are different. */
  341. /* spi.c */
  342. struct spi_command {
  343. unsigned int writecnt;
  344. unsigned int readcnt;
  345. const unsigned char *writearr;
  346. unsigned char *readarr;
  347. };
  348. int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
  349. const unsigned char *writearr, unsigned char *readarr);
  350. int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds);
  351. uint32_t spi_get_valid_read_addr(struct flashctx *flash);
  352. #define NUM_VOLTAGE_RANGES 16
  353. extern struct voltage_range voltage_ranges[];
  354. /* returns number of unique voltage ranges, or <0 to indicate failure */
  355. extern int flash_supported_voltage_ranges(enum chipbustype bus);
  356. #endif /* !__FLASH_H__ */