cros_ec.c 30 KB

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  1. /*
  2. * This file is part of the flashrom project.
  3. *
  4. * Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. *
  10. * Redistributions of source code must retain the above copyright
  11. * notice, this list of conditions and the following disclaimer.
  12. *
  13. * Redistributions in binary form must reproduce the above copyright
  14. * notice, this list of conditions and the following disclaimer in the
  15. * documentation and/or other materials provided with the distribution.
  16. *
  17. * Neither the name of Google or the names of contributors or
  18. * licensors may be used to endorse or promote products derived from this
  19. * software without specific prior written permission.
  20. *
  21. * This software is provided "AS IS," without a warranty of any kind.
  22. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
  23. * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
  24. * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED.
  25. * GOOGLE INC AND ITS LICENSORS SHALL NOT BE LIABLE
  26. * FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING
  27. * OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL
  28. * GOOGLE OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA,
  29. * OR FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR
  30. * PUNITIVE DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF
  31. * LIABILITY, ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE,
  32. * EVEN IF GOOGLE HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
  33. */
  34. #include <errno.h>
  35. #include <stdio.h>
  36. #include <stdlib.h>
  37. #include <string.h>
  38. #include <unistd.h>
  39. #include "flashchips.h"
  40. #include "fmap.h"
  41. #include "cros_ec.h"
  42. #include "cros_ec_lock.h"
  43. #include "cros_ec_commands.h"
  44. #include "programmer.h"
  45. #include "spi.h"
  46. #include "writeprotect.h"
  47. /* FIXME: used for wp hacks */
  48. #include <sys/types.h>
  49. #include <sys/stat.h>
  50. #include <fcntl.h>
  51. #include <unistd.h>
  52. struct cros_ec_priv *cros_ec_priv;
  53. static int ignore_wp_range_command = 0;
  54. static int set_wp(int enable); /* FIXME: move set_wp() */
  55. struct wp_data {
  56. int enable;
  57. unsigned int start;
  58. unsigned int len;
  59. };
  60. #define WP_STATE_HACK_FILENAME "/mnt/stateful_partition/flashrom_wp_state"
  61. /* If software sync is enabled, then we don't try the latest firmware copy
  62. * after updating.
  63. */
  64. #define SOFTWARE_SYNC_ENABLED
  65. /* 1 if we want the flashrom to call erase_and_write_flash() again. */
  66. static int need_2nd_pass = 0;
  67. /* 1 if we want the flashrom to try jumping to new firmware after update. */
  68. static int try_latest_firmware = 0;
  69. /* The range of each firmware copy from the image file to update.
  70. * But re-define the .flags as the valid flag to indicate the firmware is
  71. * new or not (if flags = 1).
  72. */
  73. static struct fmap_area fwcopy[4]; // [0] is not used.
  74. /* The names of enum lpc_current_image to match in FMAP area names. */
  75. static const char *sections[] = {
  76. "UNKNOWN SECTION", // EC_IMAGE_UNKNOWN -- never matches
  77. "EC_RO",
  78. "EC_RW",
  79. };
  80. /*
  81. * The names of the different device that can be found in a machine.
  82. * Order is important: for backward compatibilty issue,
  83. * 'ec' must be 0, 'pd' must be 1.
  84. */
  85. static const char *ec_type[] = {
  86. [0] = "ec",
  87. [1] = "pd",
  88. [2] = "sh",
  89. };
  90. /* EC_FLASH_REGION_WP_RO is the highest numbered region so it also indicates
  91. * the number of regions */
  92. static struct ec_response_flash_region_info regions[EC_FLASH_REGION_WP_RO + 1];
  93. /* Given the range not able to update, mark the corresponding
  94. * firmware as old.
  95. */
  96. static void cros_ec_invalidate_copy(unsigned int addr, unsigned int len)
  97. {
  98. int i;
  99. for (i = EC_IMAGE_RO; i < ARRAY_SIZE(fwcopy); i++) {
  100. struct fmap_area *fw = &fwcopy[i];
  101. if ((addr >= fw->offset && (addr < fw->offset + fw->size)) ||
  102. (fw->offset >= addr && (fw->offset < addr + len))) {
  103. msg_pdbg("Mark firmware [%s] as old.\n",
  104. sections[i]);
  105. fw->flags = 0; // mark as old
  106. }
  107. }
  108. }
  109. static int cros_ec_get_current_image(void)
  110. {
  111. struct ec_response_get_version resp;
  112. int rc;
  113. rc = cros_ec_priv->ec_command(EC_CMD_GET_VERSION,
  114. 0, NULL, 0, &resp, sizeof(resp));
  115. if (rc < 0) {
  116. msg_perr("CROS_EC cannot get the running copy: rc=%d\n", rc);
  117. return rc;
  118. }
  119. if (resp.current_image == EC_IMAGE_UNKNOWN) {
  120. msg_perr("CROS_EC gets unknown running copy\n");
  121. return -1;
  122. }
  123. return resp.current_image;
  124. }
  125. static int cros_ec_get_region_info(enum ec_flash_region region,
  126. struct ec_response_flash_region_info *info)
  127. {
  128. struct ec_params_flash_region_info req;
  129. struct ec_response_flash_region_info resp;
  130. int rc;
  131. req.region = region;
  132. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_REGION_INFO,
  133. EC_VER_FLASH_REGION_INFO, &req, sizeof(req),
  134. &resp, sizeof(resp));
  135. if (rc < 0) {
  136. msg_perr("Cannot get the WP_RO region info: %d\n", rc);
  137. return rc;
  138. }
  139. info->offset = resp.offset;
  140. info->size = resp.size;
  141. return 0;
  142. }
  143. /**
  144. * Get the versions of the command supported by the EC.
  145. *
  146. * @param cmd Command
  147. * @param pmask Destination for version mask; will be set to 0 on
  148. * error.
  149. * @return 0 if success, <0 if error
  150. */
  151. static int ec_get_cmd_versions(int cmd, uint32_t *pmask)
  152. {
  153. struct ec_params_get_cmd_versions pver;
  154. struct ec_response_get_cmd_versions rver;
  155. int rc;
  156. *pmask = 0;
  157. pver.cmd = cmd;
  158. rc = cros_ec_priv->ec_command(EC_CMD_GET_CMD_VERSIONS, 0,
  159. &pver, sizeof(pver), &rver, sizeof(rver));
  160. if (rc < 0)
  161. return rc;
  162. *pmask = rver.version_mask;
  163. return rc;
  164. }
  165. /**
  166. * Return non-zero if the EC supports the command and version
  167. *
  168. * @param cmd Command to check
  169. * @param ver Version to check
  170. * @return non-zero if command version supported; 0 if not.
  171. */
  172. static int ec_cmd_version_supported(int cmd, int ver)
  173. {
  174. uint32_t mask = 0;
  175. int rc;
  176. rc = ec_get_cmd_versions(cmd, &mask);
  177. if (rc < 0)
  178. return rc;
  179. return (mask & EC_VER_MASK(ver)) ? 1 : 0;
  180. }
  181. /* returns 0 if successful or <0 to indicate error */
  182. static int set_ideal_write_size(void)
  183. {
  184. int cmd_version, ret;
  185. cmd_version = ec_cmd_version_supported(EC_CMD_FLASH_WRITE,
  186. EC_VER_FLASH_WRITE);
  187. if (cmd_version < 0) {
  188. msg_perr("Cannot determine write command version\n");
  189. return cmd_version;
  190. } else if (cmd_version == 0) {
  191. struct ec_response_flash_info info;
  192. ret = cros_ec_priv->ec_command(EC_CMD_FLASH_INFO,
  193. cmd_version, NULL, 0, &info, sizeof(info));
  194. if (ret < 0) {
  195. msg_perr("%s(): Cannot get flash info.\n", __func__);
  196. return ret;
  197. }
  198. cros_ec_priv->ideal_write_size = EC_FLASH_WRITE_VER0_SIZE;
  199. } else {
  200. struct ec_response_flash_info_1 info;
  201. ret = cros_ec_priv->ec_command(EC_CMD_FLASH_INFO,
  202. cmd_version, NULL, 0, &info, sizeof(info));
  203. if (ret < 0) {
  204. msg_perr("%s(): Cannot get flash info.\n", __func__);
  205. return ret;
  206. }
  207. cros_ec_priv->ideal_write_size = info.write_ideal_size;
  208. }
  209. return 0;
  210. }
  211. /* Asks EC to jump to a firmware copy. If target is EC_IMAGE_UNKNOWN,
  212. * then this functions picks a NEW firmware copy and jumps to it. Note that
  213. * RO is preferred, then A, finally B.
  214. *
  215. * Returns 0 for success.
  216. */
  217. static int cros_ec_jump_copy(enum ec_current_image target) {
  218. struct ec_params_reboot_ec p;
  219. int rc;
  220. int current_image;
  221. /* Since the EC may return EC_RES_SUCCESS twice if the EC doesn't
  222. * jump to different firmware copy. The second EC_RES_SUCCESS would
  223. * set the OBF=1 and the next command cannot be executed.
  224. * Thus, we call EC to jump only if the target is different.
  225. */
  226. current_image = cros_ec_get_current_image();
  227. if (current_image < 0)
  228. return 1;
  229. if (current_image == target)
  230. return 0;
  231. memset(&p, 0, sizeof(p));
  232. /* Translate target --> EC reboot command parameter */
  233. switch (target) {
  234. case EC_IMAGE_RO:
  235. p.cmd = EC_REBOOT_JUMP_RO;
  236. break;
  237. case EC_IMAGE_RW:
  238. p.cmd = EC_REBOOT_JUMP_RW;
  239. break;
  240. default:
  241. /*
  242. * If target is unspecified, set EC reboot command to use
  243. * a new image. Also set "target" so that it may be used
  244. * to update the priv->current_image if jump is successful.
  245. */
  246. if (fwcopy[EC_IMAGE_RO].flags) {
  247. p.cmd = EC_REBOOT_JUMP_RO;
  248. target = EC_IMAGE_RO;
  249. } else if (fwcopy[EC_IMAGE_RW].flags) {
  250. p.cmd = EC_REBOOT_JUMP_RW;
  251. target = EC_IMAGE_RW;
  252. } else {
  253. p.cmd = EC_IMAGE_UNKNOWN;
  254. }
  255. break;
  256. }
  257. msg_pdbg("CROS_EC is jumping to [%s]\n", sections[p.cmd]);
  258. if (p.cmd == EC_IMAGE_UNKNOWN) return 1;
  259. if (current_image == p.cmd) {
  260. msg_pdbg("CROS_EC is already in [%s]\n", sections[p.cmd]);
  261. cros_ec_priv->current_image = target;
  262. return 0;
  263. }
  264. rc = cros_ec_priv->ec_command(EC_CMD_REBOOT_EC,
  265. 0, &p, sizeof(p), NULL, 0);
  266. if (rc < 0) {
  267. msg_perr("CROS_EC cannot jump to [%s]:%d\n",
  268. sections[p.cmd], rc);
  269. } else {
  270. msg_pdbg("CROS_EC has jumped to [%s]\n", sections[p.cmd]);
  271. rc = EC_RES_SUCCESS;
  272. cros_ec_priv->current_image = target;
  273. }
  274. /* Sleep 1 sec to wait the EC re-init. */
  275. usleep(1000000);
  276. /* update max data write size in case we're jumping to an EC
  277. * firmware with different protocol */
  278. set_ideal_write_size();
  279. return rc;
  280. }
  281. static int cros_ec_restore_wp(void *data)
  282. {
  283. msg_pdbg("Restoring EC soft WP.\n");
  284. return set_wp(1);
  285. }
  286. static int cros_ec_wp_is_enabled(void)
  287. {
  288. struct ec_params_flash_protect p;
  289. struct ec_response_flash_protect r;
  290. int rc;
  291. memset(&p, 0, sizeof(p));
  292. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_PROTECT,
  293. EC_VER_FLASH_PROTECT, &p, sizeof(p), &r, sizeof(r));
  294. if (rc < 0) {
  295. msg_perr("FAILED: Cannot get the write protection status: %d\n",
  296. rc);
  297. return -1;
  298. } else if (rc < sizeof(r)) {
  299. msg_perr("FAILED: Too little data returned (expected:%zd, "
  300. "actual:%d)\n", sizeof(r), rc);
  301. return -1;
  302. }
  303. if (r.flags & (EC_FLASH_PROTECT_RO_NOW | EC_FLASH_PROTECT_ALL_NOW))
  304. return 1;
  305. return 0;
  306. }
  307. /*
  308. * Prepare EC for update:
  309. * - Disable soft WP if needed.
  310. * - Parse flashmap.
  311. * - Jump to RO firmware.
  312. */
  313. int cros_ec_prepare(uint8_t *image, int size) {
  314. struct fmap *fmap;
  315. int i, j, wp_status;
  316. if (!(cros_ec_priv && cros_ec_priv->detected)) return 0;
  317. /*
  318. * If HW WP is disabled we may still need to disable write protection
  319. * that is active on the EC. Otherwise the EC can reject erase/write
  320. * commands.
  321. *
  322. * Failure is OK since HW WP might be enabled or the EC needs to be
  323. * rebooted for the change to take effect. We can still update RW
  324. * portions.
  325. *
  326. * If disabled here, EC WP will be restored at the end so that
  327. * "--wp-enable" does not need to be run later. This greatly
  328. * simplifies logic for developers and scripts.
  329. */
  330. wp_status = cros_ec_wp_is_enabled();
  331. if (wp_status < 0) {
  332. return 1;
  333. } else if (wp_status == 1) {
  334. msg_pdbg("Attempting to disable EC soft WP.\n");
  335. if (!set_wp(0)) {
  336. msg_pdbg("EC soft WP disabled successfully.\n");
  337. if (register_shutdown(cros_ec_restore_wp, NULL))
  338. return 1;
  339. } else {
  340. msg_pdbg("Failed. Hardware WP might in effect or EC "
  341. "needs to be rebooted first.\n");
  342. }
  343. } else {
  344. msg_pdbg("EC soft WP is already disabled.\n");
  345. }
  346. // Parse the fmap in the image file and cache the firmware ranges.
  347. fmap = fmap_find_in_memory(image, size);
  348. if (!fmap) return 0;
  349. // Lookup RO/A/B sections in FMAP.
  350. for (i = 0; i < fmap->nareas; i++) {
  351. struct fmap_area *fa = &fmap->areas[i];
  352. for (j = EC_IMAGE_RO; j < ARRAY_SIZE(sections); j++) {
  353. if (!strcmp(sections[j], (const char *)fa->name)) {
  354. msg_pdbg("Found '%s' in image.\n", fa->name);
  355. memcpy(&fwcopy[j], fa, sizeof(*fa));
  356. fwcopy[j].flags = 1; // mark as new
  357. }
  358. }
  359. }
  360. /* Warning: before update, we jump the EC to RO copy. If you want to
  361. * change this behavior, please also check the cros_ec_finish().
  362. */
  363. return cros_ec_jump_copy(EC_IMAGE_RO);
  364. }
  365. /* Returns >0 if we need 2nd pass of erase_and_write_flash().
  366. * <0 if we cannot jump to any firmware copy.
  367. * ==0 if no more pass is needed.
  368. *
  369. * This function also jumps to new-updated firmware copy before return >0.
  370. */
  371. int cros_ec_need_2nd_pass(void) {
  372. if (!(cros_ec_priv && cros_ec_priv->detected)) return 0;
  373. if (need_2nd_pass) {
  374. if (cros_ec_jump_copy(EC_IMAGE_UNKNOWN)) {
  375. return -1;
  376. }
  377. }
  378. return need_2nd_pass;
  379. }
  380. /* Returns 0 for success.
  381. *
  382. * Try latest firmware: B > A > RO
  383. *
  384. * This function assumes the EC jumps to RO at cros_ec_prepare() so that
  385. * the fwcopy[RO].flags is old (0) and A/B are new. Please also refine
  386. * this code logic if you change the cros_ec_prepare() behavior.
  387. */
  388. int cros_ec_finish(void) {
  389. if (!(cros_ec_priv && cros_ec_priv->detected)) return 0;
  390. if (try_latest_firmware) {
  391. if (fwcopy[EC_IMAGE_RW].flags &&
  392. cros_ec_jump_copy(EC_IMAGE_RW) == 0) return 0;
  393. return cros_ec_jump_copy(EC_IMAGE_RO);
  394. }
  395. return 0;
  396. }
  397. int cros_ec_read(struct flashctx *flash, uint8_t *readarr,
  398. unsigned int blockaddr, unsigned int readcnt) {
  399. int rc = 0;
  400. struct ec_params_flash_read p;
  401. int maxlen = opaque_programmer->max_data_read;
  402. uint8_t buf[maxlen];
  403. int offset = 0, count;
  404. while (offset < readcnt) {
  405. count = min(maxlen, readcnt - offset);
  406. p.offset = blockaddr + offset;
  407. p.size = count;
  408. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_READ,
  409. 0, &p, sizeof(p), buf, count);
  410. if (rc < 0) {
  411. msg_perr("CROS_EC: Flash read error at offset 0x%x\n",
  412. blockaddr + offset);
  413. return rc;
  414. } else {
  415. rc = EC_RES_SUCCESS;
  416. }
  417. memcpy(readarr + offset, buf, count);
  418. offset += count;
  419. }
  420. return rc;
  421. }
  422. /*
  423. * returns 0 to indicate area does not overlap current EC image
  424. * returns 1 to indicate area overlaps current EC image or error
  425. */
  426. static int in_current_image(unsigned int addr, unsigned int len)
  427. {
  428. enum ec_current_image image;
  429. uint32_t region_offset;
  430. uint32_t region_size;
  431. image = cros_ec_priv->current_image;
  432. region_offset = cros_ec_priv->region[image].offset;
  433. region_size = cros_ec_priv->region[image].size;
  434. if ((addr + len - 1 < region_offset) ||
  435. (addr > region_offset + region_size - 1)) {
  436. return 0;
  437. }
  438. return 1;
  439. }
  440. int cros_ec_block_erase(struct flashctx *flash,
  441. unsigned int blockaddr,
  442. unsigned int len) {
  443. struct ec_params_flash_erase erase;
  444. int rc;
  445. if (in_current_image(blockaddr, len)) {
  446. cros_ec_invalidate_copy(blockaddr, len);
  447. need_2nd_pass = 1;
  448. return ACCESS_DENIED;
  449. }
  450. erase.offset = blockaddr;
  451. erase.size = len;
  452. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_ERASE,
  453. 0, &erase, sizeof(erase), NULL, 0);
  454. if (rc == -EC_RES_ACCESS_DENIED) {
  455. // this is active image.
  456. cros_ec_invalidate_copy(blockaddr, len);
  457. need_2nd_pass = 1;
  458. return ACCESS_DENIED;
  459. }
  460. if (rc < 0) {
  461. msg_perr("CROS_EC: Flash erase error at address 0x%x, rc=%d\n",
  462. blockaddr, rc);
  463. return rc;
  464. } else {
  465. rc = EC_RES_SUCCESS;
  466. }
  467. #ifndef SOFTWARE_SYNC_ENABLED
  468. try_latest_firmware = 1;
  469. #endif
  470. return rc;
  471. }
  472. int cros_ec_write(struct flashctx *flash, uint8_t *buf, unsigned int addr,
  473. unsigned int nbytes) {
  474. int i, rc = 0;
  475. unsigned int written = 0, real_write_size;
  476. struct ec_params_flash_write p;
  477. uint8_t *packet;
  478. /*
  479. * For chrome-os-partner:33035, to workaround the undersized
  480. * outdata buffer issue in kernel.
  481. */
  482. real_write_size = min(opaque_programmer->max_data_write,
  483. cros_ec_priv->ideal_write_size);
  484. packet = malloc(sizeof(p) + real_write_size);
  485. if (!packet)
  486. return -1;
  487. for (i = 0; i < nbytes; i += written) {
  488. written = min(nbytes - i, real_write_size);
  489. p.offset = addr + i;
  490. p.size = written;
  491. if (in_current_image(p.offset, p.size)) {
  492. cros_ec_invalidate_copy(addr, nbytes);
  493. need_2nd_pass = 1;
  494. return ACCESS_DENIED;
  495. }
  496. memcpy(packet, &p, sizeof(p));
  497. memcpy(packet + sizeof(p), &buf[i], written);
  498. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_WRITE,
  499. 0, packet, sizeof(p) + p.size, NULL, 0);
  500. if (rc == -EC_RES_ACCESS_DENIED) {
  501. // this is active image.
  502. cros_ec_invalidate_copy(addr, nbytes);
  503. need_2nd_pass = 1;
  504. return ACCESS_DENIED;
  505. }
  506. if (rc < 0) break;
  507. rc = EC_RES_SUCCESS;
  508. }
  509. #ifndef SOFTWARE_SYNC_ENABLED
  510. try_latest_firmware = 1;
  511. #endif
  512. free(packet);
  513. return rc;
  514. }
  515. static int cros_ec_list_ranges(const struct flashctx *flash) {
  516. struct ec_response_flash_region_info info;
  517. int rc;
  518. rc = cros_ec_get_region_info(EC_FLASH_REGION_WP_RO, &info);
  519. if (rc < 0) {
  520. msg_perr("Cannot get the WP_RO region info: %d\n", rc);
  521. return 1;
  522. }
  523. msg_pinfo("Supported write protect range:\n");
  524. msg_pinfo(" disable: start=0x%06x len=0x%06x\n", 0, 0);
  525. msg_pinfo(" enable: start=0x%06x len=0x%06x\n", info.offset,
  526. info.size);
  527. return 0;
  528. }
  529. /*
  530. * Helper function for flash protection.
  531. *
  532. * On EC API v1, the EC write protection has been simplified to one-bit:
  533. * EC_FLASH_PROTECT_RO_AT_BOOT, which means the state is either enabled
  534. * or disabled. However, this is different from the SPI-style write protect
  535. * behavior. Thus, we re-define the flashrom command (SPI-style) so that
  536. * either SRP or range is non-zero, the EC_FLASH_PROTECT_RO_AT_BOOT is set.
  537. *
  538. * SRP Range | PROTECT_RO_AT_BOOT
  539. * 0 0 | 0
  540. * 0 non-zero | 1
  541. * 1 0 | 1
  542. * 1 non-zero | 1
  543. *
  544. *
  545. * Besides, to make the protection take effect as soon as possible, we
  546. * try to set EC_FLASH_PROTECT_RO_NOW at the same time. However, not
  547. * every EC supports RO_NOW, thus we then try to protect the entire chip.
  548. */
  549. static int set_wp(int enable) {
  550. struct ec_params_flash_protect p;
  551. struct ec_response_flash_protect r;
  552. const int ro_at_boot_flag = EC_FLASH_PROTECT_RO_AT_BOOT;
  553. const int ro_now_flag = EC_FLASH_PROTECT_RO_NOW;
  554. int need_an_ec_cold_reset = 0;
  555. int rc;
  556. /* Try to set RO_AT_BOOT and RO_NOW first */
  557. memset(&p, 0, sizeof(p));
  558. p.mask = (ro_at_boot_flag | ro_now_flag);
  559. p.flags = enable ? (ro_at_boot_flag | ro_now_flag) : 0;
  560. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_PROTECT,
  561. EC_VER_FLASH_PROTECT, &p, sizeof(p), &r, sizeof(r));
  562. if (rc < 0) {
  563. msg_perr("FAILED: Cannot set the RO_AT_BOOT and RO_NOW: %d\n",
  564. rc);
  565. return 1;
  566. }
  567. /* Read back */
  568. memset(&p, 0, sizeof(p));
  569. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_PROTECT,
  570. EC_VER_FLASH_PROTECT, &p, sizeof(p), &r, sizeof(r));
  571. if (rc < 0) {
  572. msg_perr("FAILED: Cannot get RO_AT_BOOT and RO_NOW: %d\n",
  573. rc);
  574. return 1;
  575. }
  576. if (!enable) {
  577. /* The disable case is easier to check. */
  578. if (r.flags & ro_at_boot_flag) {
  579. msg_perr("FAILED: RO_AT_BOOT is not clear.\n");
  580. return 1;
  581. } else if (r.flags & ro_now_flag) {
  582. msg_perr("FAILED: RO_NOW is asserted unexpectedly.\n");
  583. need_an_ec_cold_reset = 1;
  584. goto exit;
  585. }
  586. msg_pdbg("INFO: RO_AT_BOOT is clear.\n");
  587. return 0;
  588. }
  589. /* Check if RO_AT_BOOT is set. If not, fail in anyway. */
  590. if (r.flags & ro_at_boot_flag) {
  591. msg_pdbg("INFO: RO_AT_BOOT has been set.\n");
  592. } else {
  593. msg_perr("FAILED: RO_AT_BOOT is not set.\n");
  594. return 1;
  595. }
  596. /* Then, we check if the protection has been activated. */
  597. if (r.flags & ro_now_flag) {
  598. /* Good, RO_NOW is set. */
  599. msg_pdbg("INFO: RO_NOW is set. WP is active now.\n");
  600. } else if (r.writable_flags & EC_FLASH_PROTECT_ALL_NOW) {
  601. struct ec_params_reboot_ec reboot;
  602. msg_pdbg("WARN: RO_NOW is not set. Trying ALL_NOW.\n");
  603. memset(&p, 0, sizeof(p));
  604. p.mask = EC_FLASH_PROTECT_ALL_NOW;
  605. p.flags = EC_FLASH_PROTECT_ALL_NOW;
  606. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_PROTECT,
  607. EC_VER_FLASH_PROTECT,
  608. &p, sizeof(p), &r, sizeof(r));
  609. if (rc < 0) {
  610. msg_perr("FAILED: Cannot set ALL_NOW: %d\n", rc);
  611. return 1;
  612. }
  613. /* Read back */
  614. memset(&p, 0, sizeof(p));
  615. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_PROTECT,
  616. EC_VER_FLASH_PROTECT,
  617. &p, sizeof(p), &r, sizeof(r));
  618. if (rc < 0) {
  619. msg_perr("FAILED:Cannot get ALL_NOW: %d\n", rc);
  620. return 1;
  621. }
  622. if (!(r.flags & EC_FLASH_PROTECT_ALL_NOW)) {
  623. msg_perr("FAILED: ALL_NOW is not set.\n");
  624. need_an_ec_cold_reset = 1;
  625. goto exit;
  626. }
  627. msg_pdbg("INFO: ALL_NOW has been set. WP is active now.\n");
  628. /*
  629. * Our goal is to protect the RO ASAP. The entire protection
  630. * is just a workaround for platform not supporting RO_NOW.
  631. * It has side-effect that the RW is also protected and leads
  632. * the RW update failed. So, we arrange an EC code reset to
  633. * unlock RW ASAP.
  634. */
  635. memset(&reboot, 0, sizeof(reboot));
  636. reboot.cmd = EC_REBOOT_COLD;
  637. reboot.flags = EC_REBOOT_FLAG_ON_AP_SHUTDOWN;
  638. rc = cros_ec_priv->ec_command(EC_CMD_REBOOT_EC,
  639. 0, &reboot, sizeof(reboot), NULL, 0);
  640. if (rc < 0) {
  641. msg_perr("WARN: Cannot arrange a cold reset at next "
  642. "shutdown to unlock entire protect.\n");
  643. msg_perr(" But you can do it manually.\n");
  644. } else {
  645. msg_pdbg("INFO: A cold reset is arranged at next "
  646. "shutdown.\n");
  647. }
  648. } else {
  649. msg_perr("FAILED: RO_NOW is not set.\n");
  650. msg_perr("FAILED: The PROTECT_RO_AT_BOOT is set, but cannot "
  651. "make write protection active now.\n");
  652. need_an_ec_cold_reset = 1;
  653. }
  654. exit:
  655. if (need_an_ec_cold_reset) {
  656. msg_perr("FAILED: You may need a reboot to take effect of "
  657. "PROTECT_RO_AT_BOOT.\n");
  658. return 1;
  659. }
  660. return 0;
  661. }
  662. static int cros_ec_set_range(const struct flashctx *flash,
  663. unsigned int start, unsigned int len) {
  664. struct ec_response_flash_region_info info;
  665. int rc;
  666. /* Check if the given range is supported */
  667. rc = cros_ec_get_region_info(EC_FLASH_REGION_WP_RO, &info);
  668. if (rc < 0) {
  669. msg_perr("FAILED: Cannot get the WP_RO region info: %d\n", rc);
  670. return 1;
  671. }
  672. if ((!start && !len) || /* list supported ranges */
  673. ((start == info.offset) && (len == info.size))) {
  674. /* pass */
  675. } else {
  676. msg_perr("FAILED: Unsupported write protection range "
  677. "(0x%06x,0x%06x)\n\n", start, len);
  678. msg_perr("Currently supported range:\n");
  679. msg_perr(" disable: (0x%06x,0x%06x)\n", 0, 0);
  680. msg_perr(" enable: (0x%06x,0x%06x)\n", info.offset,
  681. info.size);
  682. return 1;
  683. }
  684. if (ignore_wp_range_command)
  685. return 0;
  686. return set_wp(!!len);
  687. }
  688. static int cros_ec_enable_writeprotect(const struct flashctx *flash,
  689. enum wp_mode wp_mode) {
  690. int ret;
  691. switch (wp_mode) {
  692. case WP_MODE_HARDWARE:
  693. ret = set_wp(1);
  694. break;
  695. default:
  696. msg_perr("%s():%d Unsupported write-protection mode\n",
  697. __func__, __LINE__);
  698. ret = 1;
  699. break;
  700. }
  701. return ret;
  702. }
  703. static int cros_ec_disable_writeprotect(const struct flashctx *flash) {
  704. /* --wp-range implicitly enables write protection on CrOS EC, so force
  705. it not to if --wp-disable is what the user really wants. */
  706. ignore_wp_range_command = 1;
  707. return set_wp(0);
  708. }
  709. static int cros_ec_wp_status(const struct flashctx *flash) {;
  710. struct ec_params_flash_protect p;
  711. struct ec_response_flash_protect r;
  712. int start, len; /* wp range */
  713. int enabled;
  714. int rc;
  715. memset(&p, 0, sizeof(p));
  716. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_PROTECT,
  717. EC_VER_FLASH_PROTECT, &p, sizeof(p), &r, sizeof(r));
  718. if (rc < 0) {
  719. msg_perr("FAILED: Cannot get the write protection status: %d\n",
  720. rc);
  721. return 1;
  722. } else if (rc < sizeof(r)) {
  723. msg_perr("FAILED: Too little data returned (expected:%zd, "
  724. "actual:%d)\n", sizeof(r), rc);
  725. return 1;
  726. }
  727. start = len = 0;
  728. if (r.flags & EC_FLASH_PROTECT_RO_AT_BOOT) {
  729. struct ec_response_flash_region_info info;
  730. msg_pdbg("%s(): EC_FLASH_PROTECT_RO_AT_BOOT is set.\n",
  731. __func__);
  732. rc = cros_ec_get_region_info(EC_FLASH_REGION_WP_RO, &info);
  733. if (rc < 0) {
  734. msg_perr("FAILED: Cannot get the WP_RO region info: "
  735. "%d\n", rc);
  736. return 1;
  737. }
  738. start = info.offset;
  739. len = info.size;
  740. } else {
  741. msg_pdbg("%s(): EC_FLASH_PROTECT_RO_AT_BOOT is clear.\n",
  742. __func__);
  743. }
  744. /*
  745. * If neither RO_NOW or ALL_NOW is set, it means write protect is
  746. * NOT active now.
  747. */
  748. if (!(r.flags & (EC_FLASH_PROTECT_RO_NOW | EC_FLASH_PROTECT_ALL_NOW)))
  749. start = len = 0;
  750. /* Remove the SPI-style messages. */
  751. enabled = r.flags & EC_FLASH_PROTECT_RO_AT_BOOT ? 1 : 0;
  752. msg_pinfo("WP: status: 0x%02x\n", enabled ? 0x80 : 0x00);
  753. msg_pinfo("WP: status.srp0: %x\n", enabled);
  754. msg_pinfo("WP: write protect is %s.\n",
  755. enabled ? "enabled" : "disabled");
  756. msg_pinfo("WP: write protect range: start=0x%08x, len=0x%08x\n",
  757. start, len);
  758. return 0;
  759. }
  760. /* perform basic "hello" test to see if we can talk to the EC */
  761. int cros_ec_test(struct cros_ec_priv *priv)
  762. {
  763. struct ec_params_hello request;
  764. struct ec_response_hello response;
  765. int rc = 0;
  766. /* Say hello to EC. */
  767. request.in_data = 0xf0e0d0c0; /* Expect EC will add on 0x01020304. */
  768. msg_pdbg("%s: sending HELLO request with 0x%08x\n",
  769. __func__, request.in_data);
  770. rc = priv->ec_command(EC_CMD_HELLO, 0, &request,
  771. sizeof(request), &response, sizeof(response));
  772. msg_pdbg("%s: response: 0x%08x\n", __func__, response.out_data);
  773. if (rc < 0 || response.out_data != 0xf1e2d3c4) {
  774. msg_pdbg("response.out_data is not 0xf1e2d3c4.\n"
  775. "rc=%d, request=0x%x response=0x%x\n",
  776. rc, request.in_data, response.out_data);
  777. return 1;
  778. }
  779. return 0;
  780. }
  781. void cros_ec_set_max_size(struct cros_ec_priv *priv,
  782. struct opaque_programmer *op) {
  783. struct ec_response_get_protocol_info info;
  784. int rc = 0;
  785. msg_pdbg("%s: sending protoinfo command\n", __func__);
  786. rc = priv->ec_command(EC_CMD_GET_PROTOCOL_INFO, 0, NULL, 0,
  787. &info, sizeof(info));
  788. msg_pdbg("%s: rc:%d\n", __func__, rc);
  789. if (rc == sizeof(info)) {
  790. op->max_data_write = min(op->max_data_write,
  791. info.max_request_packet_size -
  792. sizeof(struct ec_host_request));
  793. op->max_data_read = min(op->max_data_read,
  794. info.max_response_packet_size -
  795. sizeof(struct ec_host_response));
  796. msg_pdbg("%s: max_write:%d max_read:%d\n", __func__,
  797. op->max_data_write, op->max_data_read);
  798. }
  799. }
  800. /*
  801. * Returns 0 to indicate success, non-zero otherwise
  802. *
  803. * This function parses programmer parameters from the command line. Since
  804. * CrOS EC hangs off the "internal programmer" (AP, PCH, etc) this gets
  805. * run during internal programmer initialization.
  806. */
  807. int cros_ec_parse_param(struct cros_ec_priv *priv)
  808. {
  809. char *p;
  810. p = extract_programmer_param("dev");
  811. if (p) {
  812. unsigned int index;
  813. char *endptr = NULL;
  814. errno = 0;
  815. /*
  816. * For backward compatibility, check if the index is
  817. * a number: 0: main EC, 1: PD
  818. * works only on Samus.
  819. */
  820. index = strtoul(p, &endptr, 10);
  821. if (errno || (endptr != (p + 1)) || (strlen(p) > 1)) {
  822. msg_perr("Invalid argument: \"%s\"\n", p);
  823. return 1;
  824. }
  825. if (index > 1) {
  826. msg_perr("%s: Invalid device index\n", __func__);
  827. return 1;
  828. }
  829. priv->dev = ec_type[index];
  830. msg_pdbg("Target %s used\n", priv->dev);
  831. }
  832. p = extract_programmer_param("type");
  833. if (p) {
  834. unsigned int index;
  835. for (index = 0; index < ARRAY_SIZE(ec_type); index++)
  836. if (!strcmp(p, ec_type[index]))
  837. break;
  838. if (index == ARRAY_SIZE(ec_type)) {
  839. msg_perr("Invalid argument: \"%s\"\n", p);
  840. return 1;
  841. }
  842. priv->dev = ec_type[index];
  843. msg_pdbg("Target %s used\n", priv->dev);
  844. }
  845. p = extract_programmer_param("block");
  846. if (p) {
  847. unsigned int block;
  848. char *endptr = NULL;
  849. errno = 0;
  850. block = strtoul(p, &endptr, 0);
  851. if (errno || (strlen(p) > 10) || (endptr != (p + strlen(p)))) {
  852. msg_perr("Invalid argument: \"%s\"\n", p);
  853. return 1;
  854. }
  855. if (block <= 0) {
  856. msg_perr("%s: Invalid block size\n", __func__);
  857. return 1;
  858. }
  859. msg_pdbg("Override block size to 0x%x\n", block);
  860. priv->erase_block_size = block;
  861. }
  862. return 0;
  863. }
  864. int cros_ec_probe_size(struct flashctx *flash) {
  865. int rc;
  866. struct ec_response_flash_info info;
  867. struct ec_response_flash_spi_info spi_info;
  868. struct ec_response_get_chip_info chip_info;
  869. struct block_eraser *eraser;
  870. static struct wp wp = {
  871. .list_ranges = cros_ec_list_ranges,
  872. .set_range = cros_ec_set_range,
  873. .enable = cros_ec_enable_writeprotect,
  874. .disable = cros_ec_disable_writeprotect,
  875. .wp_status = cros_ec_wp_status,
  876. };
  877. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_INFO,
  878. 0, NULL, 0, &info, sizeof(info));
  879. if (rc < 0) {
  880. msg_perr("%s(): FLASH_INFO returns %d.\n", __func__, rc);
  881. return 0;
  882. }
  883. rc = cros_ec_get_current_image();
  884. if (rc < 0) {
  885. msg_perr("%s(): Failed to probe (no current image): %d\n",
  886. __func__, rc);
  887. return 0;
  888. }
  889. cros_ec_priv->current_image = rc;
  890. cros_ec_priv->region = &regions[0];
  891. flash->total_size = info.flash_size / 1024;
  892. flash->page_size = opaque_programmer->max_data_read;
  893. eraser = &flash->block_erasers[0];
  894. /* Allow overriding the erase block size in case EC is incorrect */
  895. if (cros_ec_priv->erase_block_size > 0)
  896. eraser->eraseblocks[0].size = cros_ec_priv->erase_block_size;
  897. else
  898. eraser->eraseblocks[0].size = info.erase_block_size;
  899. eraser->eraseblocks[0].count = info.flash_size /
  900. eraser->eraseblocks[0].size;
  901. flash->wp = &wp;
  902. /*
  903. * Some STM32 variants erase bits to 0. For now, assume that this
  904. * applies to STM32L parts.
  905. *
  906. * FIXME: This info will eventually be exposed via some EC command.
  907. * See chrome-os-partner:20973.
  908. */
  909. rc = cros_ec_priv->ec_command(EC_CMD_GET_CHIP_INFO,
  910. 0, NULL, 0, &chip_info, sizeof(chip_info));
  911. if (rc < 0) {
  912. msg_perr("%s(): CHIP_INFO returned %d.\n", __func__, rc);
  913. return 0;
  914. }
  915. if (!strncmp(chip_info.name, "stm32l", 6))
  916. flash->feature_bits |= FEATURE_ERASE_TO_ZERO;
  917. rc = set_ideal_write_size();
  918. if (rc < 0) {
  919. msg_perr("%s(): Unable to set write size\n", __func__);
  920. return 0;
  921. }
  922. rc = cros_ec_priv->ec_command(EC_CMD_FLASH_SPI_INFO,
  923. 0, NULL, 0, &spi_info, sizeof(spi_info));
  924. if (rc < 0) {
  925. static char chip_vendor[32];
  926. static char chip_name[32];
  927. memcpy(chip_vendor, chip_info.vendor, sizeof(chip_vendor));
  928. memcpy(chip_name, chip_info.name, sizeof(chip_name));
  929. flash->vendor = chip_vendor;
  930. flash->name = chip_name;
  931. flash->tested = TEST_OK_PREWU;
  932. } else {
  933. const struct flashchip *f;
  934. uint32_t mfg = spi_info.jedec[0];
  935. uint32_t model = (spi_info.jedec[1] << 8) | spi_info.jedec[2];
  936. for (f = flashchips; f && f->name; f++) {
  937. if (f->bustype != BUS_SPI)
  938. continue;
  939. if ((f->manufacture_id == mfg) &&
  940. f->model_id == model) {
  941. flash->vendor = f->vendor;
  942. flash->name = f->name;
  943. flash->tested = f->tested;
  944. break;
  945. }
  946. }
  947. }
  948. /* FIXME: EC_IMAGE_* is ordered differently from EC_FLASH_REGION_*,
  949. * so we need to be careful about using these enums as array indices */
  950. rc = cros_ec_get_region_info(EC_FLASH_REGION_RO,
  951. &cros_ec_priv->region[EC_IMAGE_RO]);
  952. if (rc) {
  953. msg_perr("%s(): Failed to probe (cannot find RO region): %d\n",
  954. __func__, rc);
  955. return 0;
  956. }
  957. rc = cros_ec_get_region_info(EC_FLASH_REGION_RW,
  958. &cros_ec_priv->region[EC_IMAGE_RW]);
  959. if (rc) {
  960. msg_perr("%s(): Failed to probe (cannot find RW region): %d\n",
  961. __func__, rc);
  962. return 0;
  963. }
  964. return 1;
  965. };