 David Hendricks
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57b7524b14
spi: Allow cached ID bytes to be cleared
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9 years ago |
 Vadim Bendebury
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3a50116286
Add partial support for S25FL256S.
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10 years ago |
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David Hendricks
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1ed1d35d8f
Skip regions locked via flash descriptor for Intel platforms
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13 years ago |
 hailfinger
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e30f6d5ea1
Add paranoid checks for correct values in essential registers in the
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14 years ago |
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hailfinger
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2cddad344a
The AAI code rewrite in r1052 introduced a bug: The writelen of AAI
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14 years ago |
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hailfinger
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c33d4730ec
Add detailed status register printing and unlocking for all ATMEL AT25*
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14 years ago |
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hailfinger
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19db09299e
Modernize SPI AAI code, blacklist IT87 SPI for AAI, allow AAI to run
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14 years ago |
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hailfinger
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59a8357d80
Some chips implement the RES (0xab) opcode, but they use a non-standard
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14 years ago |
 snelson
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4d31f0d41f
Convert chips to block_erasers:
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15 years ago |
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hailfinger
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9c5add71e0
Add Bus Pirate SPI support to flashrom.
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15 years ago |
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hailfinger
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9c290a72b3
Use a distinct return code for SPI commands with unsupported/invalid
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15 years ago |
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hailfinger
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54c1466d72
There are various reasons why a SPI command can fail. Among others, I
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15 years ago |
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hailfinger
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19376c9144
Original v2 revision: 3781
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16 years ago |
 uwe
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17efbedfba
Original v2 revision: 3779
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16 years ago |
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hailfinger
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3dd0c3ec16
Original v2 revision: 3775
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16 years ago |
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hailfinger
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222ed8c65d
Original v2 revision: 3754
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16 years ago |
 stuge
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494b4eb02f
Original v2 revision: 3418
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16 years ago |
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hailfinger
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82893120c3
Original v2 revision: 3320
|
16 years ago |
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hailfinger
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7803156eda
Original v2 revision: 3302
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16 years ago |
