events_base.c 49 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
  24. #include <linux/linkage.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/irq.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/string.h>
  29. #include <linux/bootmem.h>
  30. #include <linux/slab.h>
  31. #include <linux/irqnr.h>
  32. #include <linux/pci.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/cpuhotplug.h>
  35. #include <linux/atomic.h>
  36. #include <linux/ktime.h>
  37. #ifdef CONFIG_X86
  38. #include <asm/desc.h>
  39. #include <asm/ptrace.h>
  40. #include <asm/irq.h>
  41. #include <asm/io_apic.h>
  42. #include <asm/i8259.h>
  43. #include <asm/xen/pci.h>
  44. #endif
  45. #include <asm/sync_bitops.h>
  46. #include <asm/xen/hypercall.h>
  47. #include <asm/xen/hypervisor.h>
  48. #include <xen/page.h>
  49. #include <xen/xen.h>
  50. #include <xen/hvm.h>
  51. #include <xen/xen-ops.h>
  52. #include <xen/events.h>
  53. #include <xen/interface/xen.h>
  54. #include <xen/interface/event_channel.h>
  55. #include <xen/interface/hvm/hvm_op.h>
  56. #include <xen/interface/hvm/params.h>
  57. #include <xen/interface/physdev.h>
  58. #include <xen/interface/sched.h>
  59. #include <xen/interface/vcpu.h>
  60. #include <asm/hw_irq.h>
  61. #include "events_internal.h"
  62. #undef MODULE_PARAM_PREFIX
  63. #define MODULE_PARAM_PREFIX "xen."
  64. static uint __read_mostly event_loop_timeout = 2;
  65. module_param(event_loop_timeout, uint, 0644);
  66. static uint __read_mostly event_eoi_delay = 10;
  67. module_param(event_eoi_delay, uint, 0644);
  68. const struct evtchn_ops *evtchn_ops;
  69. /*
  70. * This lock protects updates to the following mapping and reference-count
  71. * arrays. The lock does not need to be acquired to read the mapping tables.
  72. */
  73. static DEFINE_MUTEX(irq_mapping_update_lock);
  74. /*
  75. * Lock protecting event handling loop against removing event channels.
  76. * Adding of event channels is no issue as the associated IRQ becomes active
  77. * only after everything is setup (before request_[threaded_]irq() the handler
  78. * can't be entered for an event, as the event channel will be unmasked only
  79. * then).
  80. */
  81. static DEFINE_RWLOCK(evtchn_rwlock);
  82. /*
  83. * Lock hierarchy:
  84. *
  85. * irq_mapping_update_lock
  86. * evtchn_rwlock
  87. * IRQ-desc lock
  88. * percpu eoi_list_lock
  89. * irq_info->lock
  90. */
  91. static LIST_HEAD(xen_irq_list_head);
  92. /* IRQ <-> VIRQ mapping. */
  93. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  94. /* IRQ <-> IPI mapping */
  95. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  96. int **evtchn_to_irq;
  97. #ifdef CONFIG_X86
  98. static unsigned long *pirq_eoi_map;
  99. #endif
  100. static bool (*pirq_needs_eoi)(unsigned irq);
  101. #define EVTCHN_ROW(e) (e / (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  102. #define EVTCHN_COL(e) (e % (PAGE_SIZE/sizeof(**evtchn_to_irq)))
  103. #define EVTCHN_PER_ROW (PAGE_SIZE / sizeof(**evtchn_to_irq))
  104. /* Xen will never allocate port zero for any purpose. */
  105. #define VALID_EVTCHN(chn) ((chn) != 0)
  106. static struct irq_info *legacy_info_ptrs[NR_IRQS_LEGACY];
  107. static struct irq_chip xen_dynamic_chip;
  108. static struct irq_chip xen_lateeoi_chip;
  109. static struct irq_chip xen_percpu_chip;
  110. static struct irq_chip xen_pirq_chip;
  111. static void enable_dynirq(struct irq_data *data);
  112. static void disable_dynirq(struct irq_data *data);
  113. static DEFINE_PER_CPU(unsigned int, irq_epoch);
  114. static void clear_evtchn_to_irq_row(unsigned row)
  115. {
  116. unsigned col;
  117. for (col = 0; col < EVTCHN_PER_ROW; col++)
  118. WRITE_ONCE(evtchn_to_irq[row][col], -1);
  119. }
  120. static void clear_evtchn_to_irq_all(void)
  121. {
  122. unsigned row;
  123. for (row = 0; row < EVTCHN_ROW(xen_evtchn_max_channels()); row++) {
  124. if (evtchn_to_irq[row] == NULL)
  125. continue;
  126. clear_evtchn_to_irq_row(row);
  127. }
  128. }
  129. static int set_evtchn_to_irq(unsigned evtchn, unsigned irq)
  130. {
  131. unsigned row;
  132. unsigned col;
  133. if (evtchn >= xen_evtchn_max_channels())
  134. return -EINVAL;
  135. row = EVTCHN_ROW(evtchn);
  136. col = EVTCHN_COL(evtchn);
  137. if (evtchn_to_irq[row] == NULL) {
  138. /* Unallocated irq entries return -1 anyway */
  139. if (irq == -1)
  140. return 0;
  141. evtchn_to_irq[row] = (int *)get_zeroed_page(GFP_KERNEL);
  142. if (evtchn_to_irq[row] == NULL)
  143. return -ENOMEM;
  144. clear_evtchn_to_irq_row(row);
  145. }
  146. WRITE_ONCE(evtchn_to_irq[row][col], irq);
  147. return 0;
  148. }
  149. int get_evtchn_to_irq(unsigned evtchn)
  150. {
  151. if (evtchn >= xen_evtchn_max_channels())
  152. return -1;
  153. if (evtchn_to_irq[EVTCHN_ROW(evtchn)] == NULL)
  154. return -1;
  155. return READ_ONCE(evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)]);
  156. }
  157. /* Get info for IRQ */
  158. struct irq_info *info_for_irq(unsigned irq)
  159. {
  160. if (irq < nr_legacy_irqs())
  161. return legacy_info_ptrs[irq];
  162. else
  163. return irq_get_chip_data(irq);
  164. }
  165. static void set_info_for_irq(unsigned int irq, struct irq_info *info)
  166. {
  167. if (irq < nr_legacy_irqs())
  168. legacy_info_ptrs[irq] = info;
  169. else
  170. irq_set_chip_data(irq, info);
  171. }
  172. /* Constructors for packed IRQ information. */
  173. static int xen_irq_info_common_setup(struct irq_info *info,
  174. unsigned irq,
  175. enum xen_irq_type type,
  176. unsigned evtchn,
  177. unsigned short cpu)
  178. {
  179. int ret;
  180. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  181. info->type = type;
  182. info->irq = irq;
  183. info->evtchn = evtchn;
  184. info->cpu = cpu;
  185. info->mask_reason = EVT_MASK_REASON_EXPLICIT;
  186. raw_spin_lock_init(&info->lock);
  187. ret = set_evtchn_to_irq(evtchn, irq);
  188. if (ret < 0)
  189. return ret;
  190. irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
  191. return xen_evtchn_port_setup(info);
  192. }
  193. static int xen_irq_info_evtchn_setup(unsigned irq,
  194. unsigned evtchn)
  195. {
  196. struct irq_info *info = info_for_irq(irq);
  197. return xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0);
  198. }
  199. static int xen_irq_info_ipi_setup(unsigned cpu,
  200. unsigned irq,
  201. unsigned evtchn,
  202. enum ipi_vector ipi)
  203. {
  204. struct irq_info *info = info_for_irq(irq);
  205. info->u.ipi = ipi;
  206. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  207. return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0);
  208. }
  209. static int xen_irq_info_virq_setup(unsigned cpu,
  210. unsigned irq,
  211. unsigned evtchn,
  212. unsigned virq)
  213. {
  214. struct irq_info *info = info_for_irq(irq);
  215. info->u.virq = virq;
  216. per_cpu(virq_to_irq, cpu)[virq] = irq;
  217. return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0);
  218. }
  219. static int xen_irq_info_pirq_setup(unsigned irq,
  220. unsigned evtchn,
  221. unsigned pirq,
  222. unsigned gsi,
  223. uint16_t domid,
  224. unsigned char flags)
  225. {
  226. struct irq_info *info = info_for_irq(irq);
  227. info->u.pirq.pirq = pirq;
  228. info->u.pirq.gsi = gsi;
  229. info->u.pirq.domid = domid;
  230. info->u.pirq.flags = flags;
  231. return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0);
  232. }
  233. static void xen_irq_info_cleanup(struct irq_info *info)
  234. {
  235. set_evtchn_to_irq(info->evtchn, -1);
  236. xen_evtchn_port_remove(info->evtchn, info->cpu);
  237. info->evtchn = 0;
  238. }
  239. /*
  240. * Accessors for packed IRQ information.
  241. */
  242. unsigned int evtchn_from_irq(unsigned irq)
  243. {
  244. const struct irq_info *info = NULL;
  245. if (likely(irq < nr_irqs))
  246. info = info_for_irq(irq);
  247. if (!info)
  248. return 0;
  249. return info->evtchn;
  250. }
  251. unsigned irq_from_evtchn(unsigned int evtchn)
  252. {
  253. return get_evtchn_to_irq(evtchn);
  254. }
  255. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  256. int irq_from_virq(unsigned int cpu, unsigned int virq)
  257. {
  258. return per_cpu(virq_to_irq, cpu)[virq];
  259. }
  260. static enum ipi_vector ipi_from_irq(unsigned irq)
  261. {
  262. struct irq_info *info = info_for_irq(irq);
  263. BUG_ON(info == NULL);
  264. BUG_ON(info->type != IRQT_IPI);
  265. return info->u.ipi;
  266. }
  267. static unsigned virq_from_irq(unsigned irq)
  268. {
  269. struct irq_info *info = info_for_irq(irq);
  270. BUG_ON(info == NULL);
  271. BUG_ON(info->type != IRQT_VIRQ);
  272. return info->u.virq;
  273. }
  274. static unsigned pirq_from_irq(unsigned irq)
  275. {
  276. struct irq_info *info = info_for_irq(irq);
  277. BUG_ON(info == NULL);
  278. BUG_ON(info->type != IRQT_PIRQ);
  279. return info->u.pirq.pirq;
  280. }
  281. static enum xen_irq_type type_from_irq(unsigned irq)
  282. {
  283. return info_for_irq(irq)->type;
  284. }
  285. unsigned cpu_from_irq(unsigned irq)
  286. {
  287. return info_for_irq(irq)->cpu;
  288. }
  289. unsigned int cpu_from_evtchn(unsigned int evtchn)
  290. {
  291. int irq = get_evtchn_to_irq(evtchn);
  292. unsigned ret = 0;
  293. if (irq != -1)
  294. ret = cpu_from_irq(irq);
  295. return ret;
  296. }
  297. static void do_mask(struct irq_info *info, u8 reason)
  298. {
  299. unsigned long flags;
  300. raw_spin_lock_irqsave(&info->lock, flags);
  301. if (!info->mask_reason)
  302. mask_evtchn(info->evtchn);
  303. info->mask_reason |= reason;
  304. raw_spin_unlock_irqrestore(&info->lock, flags);
  305. }
  306. static void do_unmask(struct irq_info *info, u8 reason)
  307. {
  308. unsigned long flags;
  309. raw_spin_lock_irqsave(&info->lock, flags);
  310. info->mask_reason &= ~reason;
  311. if (!info->mask_reason)
  312. unmask_evtchn(info->evtchn);
  313. raw_spin_unlock_irqrestore(&info->lock, flags);
  314. }
  315. #ifdef CONFIG_X86
  316. static bool pirq_check_eoi_map(unsigned irq)
  317. {
  318. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  319. }
  320. #endif
  321. static bool pirq_needs_eoi_flag(unsigned irq)
  322. {
  323. struct irq_info *info = info_for_irq(irq);
  324. BUG_ON(info->type != IRQT_PIRQ);
  325. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  326. }
  327. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  328. {
  329. int irq = get_evtchn_to_irq(chn);
  330. struct irq_info *info = info_for_irq(irq);
  331. BUG_ON(irq == -1);
  332. #ifdef CONFIG_SMP
  333. cpumask_copy(irq_get_affinity_mask(irq), cpumask_of(cpu));
  334. #endif
  335. xen_evtchn_port_bind_to_cpu(info, cpu);
  336. info->cpu = cpu;
  337. }
  338. /**
  339. * notify_remote_via_irq - send event to remote end of event channel via irq
  340. * @irq: irq of event channel to send event to
  341. *
  342. * Unlike notify_remote_via_evtchn(), this is safe to use across
  343. * save/restore. Notifications on a broken connection are silently
  344. * dropped.
  345. */
  346. void notify_remote_via_irq(int irq)
  347. {
  348. int evtchn = evtchn_from_irq(irq);
  349. if (VALID_EVTCHN(evtchn))
  350. notify_remote_via_evtchn(evtchn);
  351. }
  352. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  353. struct lateeoi_work {
  354. struct delayed_work delayed;
  355. spinlock_t eoi_list_lock;
  356. struct list_head eoi_list;
  357. };
  358. static DEFINE_PER_CPU(struct lateeoi_work, lateeoi);
  359. static void lateeoi_list_del(struct irq_info *info)
  360. {
  361. struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
  362. unsigned long flags;
  363. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  364. list_del_init(&info->eoi_list);
  365. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  366. }
  367. static void lateeoi_list_add(struct irq_info *info)
  368. {
  369. struct lateeoi_work *eoi = &per_cpu(lateeoi, info->eoi_cpu);
  370. struct irq_info *elem;
  371. u64 now = get_jiffies_64();
  372. unsigned long delay;
  373. unsigned long flags;
  374. if (now < info->eoi_time)
  375. delay = info->eoi_time - now;
  376. else
  377. delay = 1;
  378. spin_lock_irqsave(&eoi->eoi_list_lock, flags);
  379. if (list_empty(&eoi->eoi_list)) {
  380. list_add(&info->eoi_list, &eoi->eoi_list);
  381. mod_delayed_work_on(info->eoi_cpu, system_wq,
  382. &eoi->delayed, delay);
  383. } else {
  384. list_for_each_entry_reverse(elem, &eoi->eoi_list, eoi_list) {
  385. if (elem->eoi_time <= info->eoi_time)
  386. break;
  387. }
  388. list_add(&info->eoi_list, &elem->eoi_list);
  389. }
  390. spin_unlock_irqrestore(&eoi->eoi_list_lock, flags);
  391. }
  392. static void xen_irq_lateeoi_locked(struct irq_info *info, bool spurious)
  393. {
  394. evtchn_port_t evtchn;
  395. unsigned int cpu;
  396. unsigned int delay = 0;
  397. evtchn = info->evtchn;
  398. if (!VALID_EVTCHN(evtchn) || !list_empty(&info->eoi_list))
  399. return;
  400. if (spurious) {
  401. if ((1 << info->spurious_cnt) < (HZ << 2))
  402. info->spurious_cnt++;
  403. if (info->spurious_cnt > 1) {
  404. delay = 1 << (info->spurious_cnt - 2);
  405. if (delay > HZ)
  406. delay = HZ;
  407. if (!info->eoi_time)
  408. info->eoi_cpu = smp_processor_id();
  409. info->eoi_time = get_jiffies_64() + delay;
  410. }
  411. } else {
  412. info->spurious_cnt = 0;
  413. }
  414. cpu = info->eoi_cpu;
  415. if (info->eoi_time &&
  416. (info->irq_epoch == per_cpu(irq_epoch, cpu) || delay)) {
  417. lateeoi_list_add(info);
  418. return;
  419. }
  420. info->eoi_time = 0;
  421. /* is_active hasn't been reset yet, do it now. */
  422. smp_store_release(&info->is_active, 0);
  423. do_unmask(info, EVT_MASK_REASON_EOI_PENDING);
  424. }
  425. static void xen_irq_lateeoi_worker(struct work_struct *work)
  426. {
  427. struct lateeoi_work *eoi;
  428. struct irq_info *info;
  429. u64 now = get_jiffies_64();
  430. unsigned long flags;
  431. eoi = container_of(to_delayed_work(work), struct lateeoi_work, delayed);
  432. read_lock_irqsave(&evtchn_rwlock, flags);
  433. while (true) {
  434. spin_lock(&eoi->eoi_list_lock);
  435. info = list_first_entry_or_null(&eoi->eoi_list, struct irq_info,
  436. eoi_list);
  437. if (info == NULL || now < info->eoi_time) {
  438. spin_unlock(&eoi->eoi_list_lock);
  439. break;
  440. }
  441. list_del_init(&info->eoi_list);
  442. spin_unlock(&eoi->eoi_list_lock);
  443. info->eoi_time = 0;
  444. xen_irq_lateeoi_locked(info, false);
  445. }
  446. if (info)
  447. mod_delayed_work_on(info->eoi_cpu, system_wq,
  448. &eoi->delayed, info->eoi_time - now);
  449. read_unlock_irqrestore(&evtchn_rwlock, flags);
  450. }
  451. static void xen_cpu_init_eoi(unsigned int cpu)
  452. {
  453. struct lateeoi_work *eoi = &per_cpu(lateeoi, cpu);
  454. INIT_DELAYED_WORK(&eoi->delayed, xen_irq_lateeoi_worker);
  455. spin_lock_init(&eoi->eoi_list_lock);
  456. INIT_LIST_HEAD(&eoi->eoi_list);
  457. }
  458. void xen_irq_lateeoi(unsigned int irq, unsigned int eoi_flags)
  459. {
  460. struct irq_info *info;
  461. unsigned long flags;
  462. read_lock_irqsave(&evtchn_rwlock, flags);
  463. info = info_for_irq(irq);
  464. if (info)
  465. xen_irq_lateeoi_locked(info, eoi_flags & XEN_EOI_FLAG_SPURIOUS);
  466. read_unlock_irqrestore(&evtchn_rwlock, flags);
  467. }
  468. EXPORT_SYMBOL_GPL(xen_irq_lateeoi);
  469. static void xen_irq_init(unsigned irq)
  470. {
  471. struct irq_info *info;
  472. #ifdef CONFIG_SMP
  473. /* By default all event channels notify CPU#0. */
  474. cpumask_copy(irq_get_affinity_mask(irq), cpumask_of(0));
  475. #endif
  476. info = kzalloc(sizeof(*info), GFP_KERNEL);
  477. if (info == NULL)
  478. panic("Unable to allocate metadata for IRQ%d\n", irq);
  479. info->type = IRQT_UNBOUND;
  480. info->refcnt = -1;
  481. set_info_for_irq(irq, info);
  482. INIT_LIST_HEAD(&info->eoi_list);
  483. list_add_tail(&info->list, &xen_irq_list_head);
  484. }
  485. static int __must_check xen_allocate_irqs_dynamic(int nvec)
  486. {
  487. int i, irq = irq_alloc_descs(-1, 0, nvec, -1);
  488. if (irq >= 0) {
  489. for (i = 0; i < nvec; i++)
  490. xen_irq_init(irq + i);
  491. }
  492. return irq;
  493. }
  494. static inline int __must_check xen_allocate_irq_dynamic(void)
  495. {
  496. return xen_allocate_irqs_dynamic(1);
  497. }
  498. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  499. {
  500. int irq;
  501. /*
  502. * A PV guest has no concept of a GSI (since it has no ACPI
  503. * nor access to/knowledge of the physical APICs). Therefore
  504. * all IRQs are dynamically allocated from the entire IRQ
  505. * space.
  506. */
  507. if (xen_pv_domain() && !xen_initial_domain())
  508. return xen_allocate_irq_dynamic();
  509. /* Legacy IRQ descriptors are already allocated by the arch. */
  510. if (gsi < nr_legacy_irqs())
  511. irq = gsi;
  512. else
  513. irq = irq_alloc_desc_at(gsi, -1);
  514. xen_irq_init(irq);
  515. return irq;
  516. }
  517. static void xen_free_irq(unsigned irq)
  518. {
  519. struct irq_info *info = info_for_irq(irq);
  520. unsigned long flags;
  521. if (WARN_ON(!info))
  522. return;
  523. write_lock_irqsave(&evtchn_rwlock, flags);
  524. if (!list_empty(&info->eoi_list))
  525. lateeoi_list_del(info);
  526. list_del(&info->list);
  527. set_info_for_irq(irq, NULL);
  528. WARN_ON(info->refcnt > 0);
  529. write_unlock_irqrestore(&evtchn_rwlock, flags);
  530. kfree(info);
  531. /* Legacy IRQ descriptors are managed by the arch. */
  532. if (irq < nr_legacy_irqs())
  533. return;
  534. irq_free_desc(irq);
  535. }
  536. static void xen_evtchn_close(unsigned int port)
  537. {
  538. struct evtchn_close close;
  539. close.port = port;
  540. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  541. BUG();
  542. }
  543. static void event_handler_exit(struct irq_info *info)
  544. {
  545. smp_store_release(&info->is_active, 0);
  546. clear_evtchn(info->evtchn);
  547. }
  548. static void pirq_query_unmask(int irq)
  549. {
  550. struct physdev_irq_status_query irq_status;
  551. struct irq_info *info = info_for_irq(irq);
  552. BUG_ON(info->type != IRQT_PIRQ);
  553. irq_status.irq = pirq_from_irq(irq);
  554. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  555. irq_status.flags = 0;
  556. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  557. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  558. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  559. }
  560. static void eoi_pirq(struct irq_data *data)
  561. {
  562. struct irq_info *info = info_for_irq(data->irq);
  563. int evtchn = info ? info->evtchn : 0;
  564. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  565. int rc = 0;
  566. if (!VALID_EVTCHN(evtchn))
  567. return;
  568. if (unlikely(irqd_is_setaffinity_pending(data)) &&
  569. likely(!irqd_irq_disabled(data))) {
  570. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  571. event_handler_exit(info);
  572. irq_move_masked_irq(data);
  573. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  574. } else
  575. event_handler_exit(info);
  576. if (pirq_needs_eoi(data->irq)) {
  577. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  578. WARN_ON(rc);
  579. }
  580. }
  581. static void mask_ack_pirq(struct irq_data *data)
  582. {
  583. disable_dynirq(data);
  584. eoi_pirq(data);
  585. }
  586. static unsigned int __startup_pirq(unsigned int irq)
  587. {
  588. struct evtchn_bind_pirq bind_pirq;
  589. struct irq_info *info = info_for_irq(irq);
  590. int evtchn = evtchn_from_irq(irq);
  591. int rc;
  592. BUG_ON(info->type != IRQT_PIRQ);
  593. if (VALID_EVTCHN(evtchn))
  594. goto out;
  595. bind_pirq.pirq = pirq_from_irq(irq);
  596. /* NB. We are happy to share unless we are probing. */
  597. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  598. BIND_PIRQ__WILL_SHARE : 0;
  599. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  600. if (rc != 0) {
  601. pr_warn("Failed to obtain physical IRQ %d\n", irq);
  602. return 0;
  603. }
  604. evtchn = bind_pirq.port;
  605. pirq_query_unmask(irq);
  606. rc = set_evtchn_to_irq(evtchn, irq);
  607. if (rc)
  608. goto err;
  609. info->evtchn = evtchn;
  610. bind_evtchn_to_cpu(evtchn, 0);
  611. rc = xen_evtchn_port_setup(info);
  612. if (rc)
  613. goto err;
  614. out:
  615. do_unmask(info, EVT_MASK_REASON_EXPLICIT);
  616. eoi_pirq(irq_get_irq_data(irq));
  617. return 0;
  618. err:
  619. pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc);
  620. xen_evtchn_close(evtchn);
  621. return 0;
  622. }
  623. static unsigned int startup_pirq(struct irq_data *data)
  624. {
  625. return __startup_pirq(data->irq);
  626. }
  627. static void shutdown_pirq(struct irq_data *data)
  628. {
  629. unsigned int irq = data->irq;
  630. struct irq_info *info = info_for_irq(irq);
  631. unsigned evtchn = evtchn_from_irq(irq);
  632. BUG_ON(info->type != IRQT_PIRQ);
  633. if (!VALID_EVTCHN(evtchn))
  634. return;
  635. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  636. xen_evtchn_close(evtchn);
  637. xen_irq_info_cleanup(info);
  638. }
  639. static void enable_pirq(struct irq_data *data)
  640. {
  641. enable_dynirq(data);
  642. }
  643. static void disable_pirq(struct irq_data *data)
  644. {
  645. disable_dynirq(data);
  646. }
  647. int xen_irq_from_gsi(unsigned gsi)
  648. {
  649. struct irq_info *info;
  650. list_for_each_entry(info, &xen_irq_list_head, list) {
  651. if (info->type != IRQT_PIRQ)
  652. continue;
  653. if (info->u.pirq.gsi == gsi)
  654. return info->irq;
  655. }
  656. return -1;
  657. }
  658. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  659. static void __unbind_from_irq(unsigned int irq)
  660. {
  661. int evtchn = evtchn_from_irq(irq);
  662. struct irq_info *info = info_for_irq(irq);
  663. if (info->refcnt > 0) {
  664. info->refcnt--;
  665. if (info->refcnt != 0)
  666. return;
  667. }
  668. if (VALID_EVTCHN(evtchn)) {
  669. unsigned int cpu = cpu_from_irq(irq);
  670. xen_evtchn_close(evtchn);
  671. switch (type_from_irq(irq)) {
  672. case IRQT_VIRQ:
  673. per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1;
  674. break;
  675. case IRQT_IPI:
  676. per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1;
  677. break;
  678. default:
  679. break;
  680. }
  681. xen_irq_info_cleanup(info);
  682. }
  683. xen_free_irq(irq);
  684. }
  685. /*
  686. * Do not make any assumptions regarding the relationship between the
  687. * IRQ number returned here and the Xen pirq argument.
  688. *
  689. * Note: We don't assign an event channel until the irq actually started
  690. * up. Return an existing irq if we've already got one for the gsi.
  691. *
  692. * Shareable implies level triggered, not shareable implies edge
  693. * triggered here.
  694. */
  695. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  696. unsigned pirq, int shareable, char *name)
  697. {
  698. int irq = -1;
  699. struct physdev_irq irq_op;
  700. int ret;
  701. mutex_lock(&irq_mapping_update_lock);
  702. irq = xen_irq_from_gsi(gsi);
  703. if (irq != -1) {
  704. pr_info("%s: returning irq %d for gsi %u\n",
  705. __func__, irq, gsi);
  706. goto out;
  707. }
  708. irq = xen_allocate_irq_gsi(gsi);
  709. if (irq < 0)
  710. goto out;
  711. irq_op.irq = irq;
  712. irq_op.vector = 0;
  713. /* Only the privileged domain can do this. For non-priv, the pcifront
  714. * driver provides a PCI bus that does the call to do exactly
  715. * this in the priv domain. */
  716. if (xen_initial_domain() &&
  717. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  718. xen_free_irq(irq);
  719. irq = -ENOSPC;
  720. goto out;
  721. }
  722. ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF,
  723. shareable ? PIRQ_SHAREABLE : 0);
  724. if (ret < 0) {
  725. __unbind_from_irq(irq);
  726. irq = ret;
  727. goto out;
  728. }
  729. pirq_query_unmask(irq);
  730. /* We try to use the handler with the appropriate semantic for the
  731. * type of interrupt: if the interrupt is an edge triggered
  732. * interrupt we use handle_edge_irq.
  733. *
  734. * On the other hand if the interrupt is level triggered we use
  735. * handle_fasteoi_irq like the native code does for this kind of
  736. * interrupts.
  737. *
  738. * Depending on the Xen version, pirq_needs_eoi might return true
  739. * not only for level triggered interrupts but for edge triggered
  740. * interrupts too. In any case Xen always honors the eoi mechanism,
  741. * not injecting any more pirqs of the same kind if the first one
  742. * hasn't received an eoi yet. Therefore using the fasteoi handler
  743. * is the right choice either way.
  744. */
  745. if (shareable)
  746. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  747. handle_fasteoi_irq, name);
  748. else
  749. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  750. handle_edge_irq, name);
  751. out:
  752. mutex_unlock(&irq_mapping_update_lock);
  753. return irq;
  754. }
  755. #ifdef CONFIG_PCI_MSI
  756. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  757. {
  758. int rc;
  759. struct physdev_get_free_pirq op_get_free_pirq;
  760. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  761. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  762. WARN_ONCE(rc == -ENOSYS,
  763. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  764. return rc ? -1 : op_get_free_pirq.pirq;
  765. }
  766. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  767. int pirq, int nvec, const char *name, domid_t domid)
  768. {
  769. int i, irq, ret;
  770. mutex_lock(&irq_mapping_update_lock);
  771. irq = xen_allocate_irqs_dynamic(nvec);
  772. if (irq < 0)
  773. goto out;
  774. for (i = 0; i < nvec; i++) {
  775. irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name);
  776. ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid,
  777. i == 0 ? 0 : PIRQ_MSI_GROUP);
  778. if (ret < 0)
  779. goto error_irq;
  780. }
  781. ret = irq_set_msi_desc(irq, msidesc);
  782. if (ret < 0)
  783. goto error_irq;
  784. out:
  785. mutex_unlock(&irq_mapping_update_lock);
  786. return irq;
  787. error_irq:
  788. while (nvec--)
  789. __unbind_from_irq(irq + nvec);
  790. mutex_unlock(&irq_mapping_update_lock);
  791. return ret;
  792. }
  793. #endif
  794. int xen_destroy_irq(int irq)
  795. {
  796. struct physdev_unmap_pirq unmap_irq;
  797. struct irq_info *info = info_for_irq(irq);
  798. int rc = -ENOENT;
  799. mutex_lock(&irq_mapping_update_lock);
  800. /*
  801. * If trying to remove a vector in a MSI group different
  802. * than the first one skip the PIRQ unmap unless this vector
  803. * is the first one in the group.
  804. */
  805. if (xen_initial_domain() && !(info->u.pirq.flags & PIRQ_MSI_GROUP)) {
  806. unmap_irq.pirq = info->u.pirq.pirq;
  807. unmap_irq.domid = info->u.pirq.domid;
  808. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  809. /* If another domain quits without making the pci_disable_msix
  810. * call, the Xen hypervisor takes care of freeing the PIRQs
  811. * (free_domain_pirqs).
  812. */
  813. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  814. pr_info("domain %d does not have %d anymore\n",
  815. info->u.pirq.domid, info->u.pirq.pirq);
  816. else if (rc) {
  817. pr_warn("unmap irq failed %d\n", rc);
  818. goto out;
  819. }
  820. }
  821. xen_free_irq(irq);
  822. out:
  823. mutex_unlock(&irq_mapping_update_lock);
  824. return rc;
  825. }
  826. int xen_irq_from_pirq(unsigned pirq)
  827. {
  828. int irq;
  829. struct irq_info *info;
  830. mutex_lock(&irq_mapping_update_lock);
  831. list_for_each_entry(info, &xen_irq_list_head, list) {
  832. if (info->type != IRQT_PIRQ)
  833. continue;
  834. irq = info->irq;
  835. if (info->u.pirq.pirq == pirq)
  836. goto out;
  837. }
  838. irq = -1;
  839. out:
  840. mutex_unlock(&irq_mapping_update_lock);
  841. return irq;
  842. }
  843. int xen_pirq_from_irq(unsigned irq)
  844. {
  845. return pirq_from_irq(irq);
  846. }
  847. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  848. static int bind_evtchn_to_irq_chip(evtchn_port_t evtchn, struct irq_chip *chip)
  849. {
  850. int irq;
  851. int ret;
  852. if (evtchn >= xen_evtchn_max_channels())
  853. return -ENOMEM;
  854. mutex_lock(&irq_mapping_update_lock);
  855. irq = get_evtchn_to_irq(evtchn);
  856. if (irq == -1) {
  857. irq = xen_allocate_irq_dynamic();
  858. if (irq < 0)
  859. goto out;
  860. irq_set_chip_and_handler_name(irq, chip,
  861. handle_edge_irq, "event");
  862. ret = xen_irq_info_evtchn_setup(irq, evtchn);
  863. if (ret < 0) {
  864. __unbind_from_irq(irq);
  865. irq = ret;
  866. goto out;
  867. }
  868. /* New interdomain events are bound to VCPU 0. */
  869. bind_evtchn_to_cpu(evtchn, 0);
  870. } else {
  871. struct irq_info *info = info_for_irq(irq);
  872. WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
  873. }
  874. out:
  875. mutex_unlock(&irq_mapping_update_lock);
  876. return irq;
  877. }
  878. int bind_evtchn_to_irq(evtchn_port_t evtchn)
  879. {
  880. return bind_evtchn_to_irq_chip(evtchn, &xen_dynamic_chip);
  881. }
  882. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  883. int bind_evtchn_to_irq_lateeoi(evtchn_port_t evtchn)
  884. {
  885. return bind_evtchn_to_irq_chip(evtchn, &xen_lateeoi_chip);
  886. }
  887. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq_lateeoi);
  888. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  889. {
  890. struct evtchn_bind_ipi bind_ipi;
  891. int evtchn, irq;
  892. int ret;
  893. mutex_lock(&irq_mapping_update_lock);
  894. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  895. if (irq == -1) {
  896. irq = xen_allocate_irq_dynamic();
  897. if (irq < 0)
  898. goto out;
  899. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  900. handle_percpu_irq, "ipi");
  901. bind_ipi.vcpu = xen_vcpu_nr(cpu);
  902. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  903. &bind_ipi) != 0)
  904. BUG();
  905. evtchn = bind_ipi.port;
  906. ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
  907. if (ret < 0) {
  908. __unbind_from_irq(irq);
  909. irq = ret;
  910. goto out;
  911. }
  912. bind_evtchn_to_cpu(evtchn, cpu);
  913. } else {
  914. struct irq_info *info = info_for_irq(irq);
  915. WARN_ON(info == NULL || info->type != IRQT_IPI);
  916. }
  917. out:
  918. mutex_unlock(&irq_mapping_update_lock);
  919. return irq;
  920. }
  921. static int bind_interdomain_evtchn_to_irq_chip(unsigned int remote_domain,
  922. evtchn_port_t remote_port,
  923. struct irq_chip *chip)
  924. {
  925. struct evtchn_bind_interdomain bind_interdomain;
  926. int err;
  927. bind_interdomain.remote_dom = remote_domain;
  928. bind_interdomain.remote_port = remote_port;
  929. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  930. &bind_interdomain);
  931. return err ? : bind_evtchn_to_irq_chip(bind_interdomain.local_port,
  932. chip);
  933. }
  934. int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  935. evtchn_port_t remote_port)
  936. {
  937. return bind_interdomain_evtchn_to_irq_chip(remote_domain, remote_port,
  938. &xen_dynamic_chip);
  939. }
  940. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq);
  941. int bind_interdomain_evtchn_to_irq_lateeoi(unsigned int remote_domain,
  942. evtchn_port_t remote_port)
  943. {
  944. return bind_interdomain_evtchn_to_irq_chip(remote_domain, remote_port,
  945. &xen_lateeoi_chip);
  946. }
  947. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irq_lateeoi);
  948. static int find_virq(unsigned int virq, unsigned int cpu)
  949. {
  950. struct evtchn_status status;
  951. int port, rc = -ENOENT;
  952. memset(&status, 0, sizeof(status));
  953. for (port = 0; port < xen_evtchn_max_channels(); port++) {
  954. status.dom = DOMID_SELF;
  955. status.port = port;
  956. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  957. if (rc < 0)
  958. continue;
  959. if (status.status != EVTCHNSTAT_virq)
  960. continue;
  961. if (status.u.virq == virq && status.vcpu == xen_vcpu_nr(cpu)) {
  962. rc = port;
  963. break;
  964. }
  965. }
  966. return rc;
  967. }
  968. /**
  969. * xen_evtchn_nr_channels - number of usable event channel ports
  970. *
  971. * This may be less than the maximum supported by the current
  972. * hypervisor ABI. Use xen_evtchn_max_channels() for the maximum
  973. * supported.
  974. */
  975. unsigned xen_evtchn_nr_channels(void)
  976. {
  977. return evtchn_ops->nr_channels();
  978. }
  979. EXPORT_SYMBOL_GPL(xen_evtchn_nr_channels);
  980. int bind_virq_to_irq(unsigned int virq, unsigned int cpu, bool percpu)
  981. {
  982. struct evtchn_bind_virq bind_virq;
  983. int evtchn, irq, ret;
  984. mutex_lock(&irq_mapping_update_lock);
  985. irq = per_cpu(virq_to_irq, cpu)[virq];
  986. if (irq == -1) {
  987. irq = xen_allocate_irq_dynamic();
  988. if (irq < 0)
  989. goto out;
  990. if (percpu)
  991. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  992. handle_percpu_irq, "virq");
  993. else
  994. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  995. handle_edge_irq, "virq");
  996. bind_virq.virq = virq;
  997. bind_virq.vcpu = xen_vcpu_nr(cpu);
  998. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  999. &bind_virq);
  1000. if (ret == 0)
  1001. evtchn = bind_virq.port;
  1002. else {
  1003. if (ret == -EEXIST)
  1004. ret = find_virq(virq, cpu);
  1005. BUG_ON(ret < 0);
  1006. evtchn = ret;
  1007. }
  1008. ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
  1009. if (ret < 0) {
  1010. __unbind_from_irq(irq);
  1011. irq = ret;
  1012. goto out;
  1013. }
  1014. bind_evtchn_to_cpu(evtchn, cpu);
  1015. } else {
  1016. struct irq_info *info = info_for_irq(irq);
  1017. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  1018. }
  1019. out:
  1020. mutex_unlock(&irq_mapping_update_lock);
  1021. return irq;
  1022. }
  1023. static void unbind_from_irq(unsigned int irq)
  1024. {
  1025. mutex_lock(&irq_mapping_update_lock);
  1026. __unbind_from_irq(irq);
  1027. mutex_unlock(&irq_mapping_update_lock);
  1028. }
  1029. static int bind_evtchn_to_irqhandler_chip(evtchn_port_t evtchn,
  1030. irq_handler_t handler,
  1031. unsigned long irqflags,
  1032. const char *devname, void *dev_id,
  1033. struct irq_chip *chip)
  1034. {
  1035. int irq, retval;
  1036. irq = bind_evtchn_to_irq_chip(evtchn, chip);
  1037. if (irq < 0)
  1038. return irq;
  1039. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1040. if (retval != 0) {
  1041. unbind_from_irq(irq);
  1042. return retval;
  1043. }
  1044. return irq;
  1045. }
  1046. int bind_evtchn_to_irqhandler(evtchn_port_t evtchn,
  1047. irq_handler_t handler,
  1048. unsigned long irqflags,
  1049. const char *devname, void *dev_id)
  1050. {
  1051. return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
  1052. devname, dev_id,
  1053. &xen_dynamic_chip);
  1054. }
  1055. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  1056. int bind_evtchn_to_irqhandler_lateeoi(evtchn_port_t evtchn,
  1057. irq_handler_t handler,
  1058. unsigned long irqflags,
  1059. const char *devname, void *dev_id)
  1060. {
  1061. return bind_evtchn_to_irqhandler_chip(evtchn, handler, irqflags,
  1062. devname, dev_id,
  1063. &xen_lateeoi_chip);
  1064. }
  1065. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler_lateeoi);
  1066. static int bind_interdomain_evtchn_to_irqhandler_chip(
  1067. unsigned int remote_domain, evtchn_port_t remote_port,
  1068. irq_handler_t handler, unsigned long irqflags,
  1069. const char *devname, void *dev_id, struct irq_chip *chip)
  1070. {
  1071. int irq, retval;
  1072. irq = bind_interdomain_evtchn_to_irq_chip(remote_domain, remote_port,
  1073. chip);
  1074. if (irq < 0)
  1075. return irq;
  1076. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1077. if (retval != 0) {
  1078. unbind_from_irq(irq);
  1079. return retval;
  1080. }
  1081. return irq;
  1082. }
  1083. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  1084. evtchn_port_t remote_port,
  1085. irq_handler_t handler,
  1086. unsigned long irqflags,
  1087. const char *devname,
  1088. void *dev_id)
  1089. {
  1090. return bind_interdomain_evtchn_to_irqhandler_chip(remote_domain,
  1091. remote_port, handler, irqflags, devname,
  1092. dev_id, &xen_dynamic_chip);
  1093. }
  1094. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  1095. int bind_interdomain_evtchn_to_irqhandler_lateeoi(unsigned int remote_domain,
  1096. evtchn_port_t remote_port,
  1097. irq_handler_t handler,
  1098. unsigned long irqflags,
  1099. const char *devname,
  1100. void *dev_id)
  1101. {
  1102. return bind_interdomain_evtchn_to_irqhandler_chip(remote_domain,
  1103. remote_port, handler, irqflags, devname,
  1104. dev_id, &xen_lateeoi_chip);
  1105. }
  1106. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler_lateeoi);
  1107. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  1108. irq_handler_t handler,
  1109. unsigned long irqflags, const char *devname, void *dev_id)
  1110. {
  1111. int irq, retval;
  1112. irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU);
  1113. if (irq < 0)
  1114. return irq;
  1115. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1116. if (retval != 0) {
  1117. unbind_from_irq(irq);
  1118. return retval;
  1119. }
  1120. return irq;
  1121. }
  1122. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  1123. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  1124. unsigned int cpu,
  1125. irq_handler_t handler,
  1126. unsigned long irqflags,
  1127. const char *devname,
  1128. void *dev_id)
  1129. {
  1130. int irq, retval;
  1131. irq = bind_ipi_to_irq(ipi, cpu);
  1132. if (irq < 0)
  1133. return irq;
  1134. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  1135. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  1136. if (retval != 0) {
  1137. unbind_from_irq(irq);
  1138. return retval;
  1139. }
  1140. return irq;
  1141. }
  1142. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  1143. {
  1144. struct irq_info *info = info_for_irq(irq);
  1145. if (WARN_ON(!info))
  1146. return;
  1147. free_irq(irq, dev_id);
  1148. unbind_from_irq(irq);
  1149. }
  1150. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  1151. /**
  1152. * xen_set_irq_priority() - set an event channel priority.
  1153. * @irq:irq bound to an event channel.
  1154. * @priority: priority between XEN_IRQ_PRIORITY_MAX and XEN_IRQ_PRIORITY_MIN.
  1155. */
  1156. int xen_set_irq_priority(unsigned irq, unsigned priority)
  1157. {
  1158. struct evtchn_set_priority set_priority;
  1159. set_priority.port = evtchn_from_irq(irq);
  1160. set_priority.priority = priority;
  1161. return HYPERVISOR_event_channel_op(EVTCHNOP_set_priority,
  1162. &set_priority);
  1163. }
  1164. EXPORT_SYMBOL_GPL(xen_set_irq_priority);
  1165. int evtchn_make_refcounted(unsigned int evtchn)
  1166. {
  1167. int irq = get_evtchn_to_irq(evtchn);
  1168. struct irq_info *info;
  1169. if (irq == -1)
  1170. return -ENOENT;
  1171. info = info_for_irq(irq);
  1172. if (!info)
  1173. return -ENOENT;
  1174. WARN_ON(info->refcnt != -1);
  1175. info->refcnt = 1;
  1176. return 0;
  1177. }
  1178. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  1179. int evtchn_get(unsigned int evtchn)
  1180. {
  1181. int irq;
  1182. struct irq_info *info;
  1183. int err = -ENOENT;
  1184. if (evtchn >= xen_evtchn_max_channels())
  1185. return -EINVAL;
  1186. mutex_lock(&irq_mapping_update_lock);
  1187. irq = get_evtchn_to_irq(evtchn);
  1188. if (irq == -1)
  1189. goto done;
  1190. info = info_for_irq(irq);
  1191. if (!info)
  1192. goto done;
  1193. err = -EINVAL;
  1194. if (info->refcnt <= 0 || info->refcnt == SHRT_MAX)
  1195. goto done;
  1196. info->refcnt++;
  1197. err = 0;
  1198. done:
  1199. mutex_unlock(&irq_mapping_update_lock);
  1200. return err;
  1201. }
  1202. EXPORT_SYMBOL_GPL(evtchn_get);
  1203. void evtchn_put(unsigned int evtchn)
  1204. {
  1205. int irq = get_evtchn_to_irq(evtchn);
  1206. if (WARN_ON(irq == -1))
  1207. return;
  1208. unbind_from_irq(irq);
  1209. }
  1210. EXPORT_SYMBOL_GPL(evtchn_put);
  1211. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  1212. {
  1213. int irq;
  1214. #ifdef CONFIG_X86
  1215. if (unlikely(vector == XEN_NMI_VECTOR)) {
  1216. int rc = HYPERVISOR_vcpu_op(VCPUOP_send_nmi, xen_vcpu_nr(cpu),
  1217. NULL);
  1218. if (rc < 0)
  1219. printk(KERN_WARNING "Sending nmi to CPU%d failed (rc:%d)\n", cpu, rc);
  1220. return;
  1221. }
  1222. #endif
  1223. irq = per_cpu(ipi_to_irq, cpu)[vector];
  1224. BUG_ON(irq < 0);
  1225. notify_remote_via_irq(irq);
  1226. }
  1227. struct evtchn_loop_ctrl {
  1228. ktime_t timeout;
  1229. unsigned count;
  1230. bool defer_eoi;
  1231. };
  1232. void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl)
  1233. {
  1234. int irq;
  1235. struct irq_info *info;
  1236. irq = get_evtchn_to_irq(port);
  1237. if (irq == -1)
  1238. return;
  1239. /*
  1240. * Check for timeout every 256 events.
  1241. * We are setting the timeout value only after the first 256
  1242. * events in order to not hurt the common case of few loop
  1243. * iterations. The 256 is basically an arbitrary value.
  1244. *
  1245. * In case we are hitting the timeout we need to defer all further
  1246. * EOIs in order to ensure to leave the event handling loop rather
  1247. * sooner than later.
  1248. */
  1249. if (!ctrl->defer_eoi && !(++ctrl->count & 0xff)) {
  1250. ktime_t kt = ktime_get();
  1251. if (!ctrl->timeout) {
  1252. kt = ktime_add_ms(kt,
  1253. jiffies_to_msecs(event_loop_timeout));
  1254. ctrl->timeout = kt;
  1255. } else if (kt > ctrl->timeout) {
  1256. ctrl->defer_eoi = true;
  1257. }
  1258. }
  1259. info = info_for_irq(irq);
  1260. if (xchg_acquire(&info->is_active, 1))
  1261. return;
  1262. if (ctrl->defer_eoi) {
  1263. info->eoi_cpu = smp_processor_id();
  1264. info->irq_epoch = __this_cpu_read(irq_epoch);
  1265. info->eoi_time = get_jiffies_64() + event_eoi_delay;
  1266. }
  1267. generic_handle_irq(irq);
  1268. }
  1269. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  1270. static void __xen_evtchn_do_upcall(void)
  1271. {
  1272. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1273. int cpu = get_cpu();
  1274. unsigned count;
  1275. struct evtchn_loop_ctrl ctrl = { 0 };
  1276. read_lock(&evtchn_rwlock);
  1277. do {
  1278. vcpu_info->evtchn_upcall_pending = 0;
  1279. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  1280. goto out;
  1281. xen_evtchn_handle_events(cpu, &ctrl);
  1282. BUG_ON(!irqs_disabled());
  1283. count = __this_cpu_read(xed_nesting_count);
  1284. __this_cpu_write(xed_nesting_count, 0);
  1285. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1286. out:
  1287. read_unlock(&evtchn_rwlock);
  1288. /*
  1289. * Increment irq_epoch only now to defer EOIs only for
  1290. * xen_irq_lateeoi() invocations occurring from inside the loop
  1291. * above.
  1292. */
  1293. __this_cpu_inc(irq_epoch);
  1294. put_cpu();
  1295. }
  1296. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1297. {
  1298. struct pt_regs *old_regs = set_irq_regs(regs);
  1299. irq_enter();
  1300. #ifdef CONFIG_X86
  1301. inc_irq_stat(irq_hv_callback_count);
  1302. #endif
  1303. __xen_evtchn_do_upcall();
  1304. irq_exit();
  1305. set_irq_regs(old_regs);
  1306. }
  1307. void xen_hvm_evtchn_do_upcall(void)
  1308. {
  1309. __xen_evtchn_do_upcall();
  1310. }
  1311. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1312. /* Rebind a new event channel to an existing irq. */
  1313. void rebind_evtchn_irq(int evtchn, int irq)
  1314. {
  1315. struct irq_info *info = info_for_irq(irq);
  1316. if (WARN_ON(!info))
  1317. return;
  1318. /* Make sure the irq is masked, since the new event channel
  1319. will also be masked. */
  1320. disable_irq(irq);
  1321. mutex_lock(&irq_mapping_update_lock);
  1322. /* After resume the irq<->evtchn mappings are all cleared out */
  1323. BUG_ON(get_evtchn_to_irq(evtchn) != -1);
  1324. /* Expect irq to have been bound before,
  1325. so there should be a proper type */
  1326. BUG_ON(info->type == IRQT_UNBOUND);
  1327. (void)xen_irq_info_evtchn_setup(irq, evtchn);
  1328. mutex_unlock(&irq_mapping_update_lock);
  1329. bind_evtchn_to_cpu(evtchn, info->cpu);
  1330. /* This will be deferred until interrupt is processed */
  1331. irq_set_affinity(irq, cpumask_of(info->cpu));
  1332. /* Unmask the event channel. */
  1333. enable_irq(irq);
  1334. }
  1335. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1336. static int xen_rebind_evtchn_to_cpu(struct irq_info *info, unsigned int tcpu)
  1337. {
  1338. struct evtchn_bind_vcpu bind_vcpu;
  1339. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1340. if (!VALID_EVTCHN(evtchn))
  1341. return -1;
  1342. if (!xen_support_evtchn_rebind())
  1343. return -1;
  1344. /* Send future instances of this interrupt to other vcpu. */
  1345. bind_vcpu.port = evtchn;
  1346. bind_vcpu.vcpu = xen_vcpu_nr(tcpu);
  1347. /*
  1348. * Mask the event while changing the VCPU binding to prevent
  1349. * it being delivered on an unexpected VCPU.
  1350. */
  1351. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1352. /*
  1353. * If this fails, it usually just indicates that we're dealing with a
  1354. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1355. * it, but don't do the xenlinux-level rebind in that case.
  1356. */
  1357. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1358. bind_evtchn_to_cpu(evtchn, tcpu);
  1359. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1360. return 0;
  1361. }
  1362. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1363. bool force)
  1364. {
  1365. unsigned tcpu = cpumask_first_and(dest, cpu_online_mask);
  1366. int ret = xen_rebind_evtchn_to_cpu(info_for_irq(data->irq), tcpu);
  1367. if (!ret)
  1368. irq_data_update_effective_affinity(data, cpumask_of(tcpu));
  1369. return ret;
  1370. }
  1371. /* To be called with desc->lock held. */
  1372. int xen_set_affinity_evtchn(struct irq_desc *desc, unsigned int tcpu)
  1373. {
  1374. struct irq_data *d = irq_desc_get_irq_data(desc);
  1375. return set_affinity_irq(d, cpumask_of(tcpu), false);
  1376. }
  1377. EXPORT_SYMBOL_GPL(xen_set_affinity_evtchn);
  1378. static void enable_dynirq(struct irq_data *data)
  1379. {
  1380. struct irq_info *info = info_for_irq(data->irq);
  1381. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1382. if (VALID_EVTCHN(evtchn))
  1383. do_unmask(info, EVT_MASK_REASON_EXPLICIT);
  1384. }
  1385. static void disable_dynirq(struct irq_data *data)
  1386. {
  1387. struct irq_info *info = info_for_irq(data->irq);
  1388. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1389. if (VALID_EVTCHN(evtchn))
  1390. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  1391. }
  1392. static void ack_dynirq(struct irq_data *data)
  1393. {
  1394. struct irq_info *info = info_for_irq(data->irq);
  1395. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1396. if (!VALID_EVTCHN(evtchn))
  1397. return;
  1398. if (unlikely(irqd_is_setaffinity_pending(data)) &&
  1399. likely(!irqd_irq_disabled(data))) {
  1400. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1401. event_handler_exit(info);
  1402. irq_move_masked_irq(data);
  1403. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1404. } else
  1405. event_handler_exit(info);
  1406. }
  1407. static void mask_ack_dynirq(struct irq_data *data)
  1408. {
  1409. disable_dynirq(data);
  1410. ack_dynirq(data);
  1411. }
  1412. static void lateeoi_ack_dynirq(struct irq_data *data)
  1413. {
  1414. struct irq_info *info = info_for_irq(data->irq);
  1415. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1416. if (!VALID_EVTCHN(evtchn))
  1417. return;
  1418. do_mask(info, EVT_MASK_REASON_EOI_PENDING);
  1419. if (unlikely(irqd_is_setaffinity_pending(data)) &&
  1420. likely(!irqd_irq_disabled(data))) {
  1421. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1422. clear_evtchn(evtchn);
  1423. irq_move_masked_irq(data);
  1424. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1425. } else
  1426. clear_evtchn(evtchn);
  1427. }
  1428. static void lateeoi_mask_ack_dynirq(struct irq_data *data)
  1429. {
  1430. struct irq_info *info = info_for_irq(data->irq);
  1431. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1432. if (VALID_EVTCHN(evtchn)) {
  1433. do_mask(info, EVT_MASK_REASON_EXPLICIT);
  1434. ack_dynirq(data);
  1435. }
  1436. }
  1437. static int retrigger_dynirq(struct irq_data *data)
  1438. {
  1439. struct irq_info *info = info_for_irq(data->irq);
  1440. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1441. if (!VALID_EVTCHN(evtchn))
  1442. return 0;
  1443. do_mask(info, EVT_MASK_REASON_TEMPORARY);
  1444. set_evtchn(evtchn);
  1445. do_unmask(info, EVT_MASK_REASON_TEMPORARY);
  1446. return 1;
  1447. }
  1448. static void restore_pirqs(void)
  1449. {
  1450. int pirq, rc, irq, gsi;
  1451. struct physdev_map_pirq map_irq;
  1452. struct irq_info *info;
  1453. list_for_each_entry(info, &xen_irq_list_head, list) {
  1454. if (info->type != IRQT_PIRQ)
  1455. continue;
  1456. pirq = info->u.pirq.pirq;
  1457. gsi = info->u.pirq.gsi;
  1458. irq = info->irq;
  1459. /* save/restore of PT devices doesn't work, so at this point the
  1460. * only devices present are GSI based emulated devices */
  1461. if (!gsi)
  1462. continue;
  1463. map_irq.domid = DOMID_SELF;
  1464. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1465. map_irq.index = gsi;
  1466. map_irq.pirq = pirq;
  1467. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1468. if (rc) {
  1469. pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1470. gsi, irq, pirq, rc);
  1471. xen_free_irq(irq);
  1472. continue;
  1473. }
  1474. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1475. __startup_pirq(irq);
  1476. }
  1477. }
  1478. static void restore_cpu_virqs(unsigned int cpu)
  1479. {
  1480. struct evtchn_bind_virq bind_virq;
  1481. int virq, irq, evtchn;
  1482. for (virq = 0; virq < NR_VIRQS; virq++) {
  1483. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1484. continue;
  1485. BUG_ON(virq_from_irq(irq) != virq);
  1486. /* Get a new binding from Xen. */
  1487. bind_virq.virq = virq;
  1488. bind_virq.vcpu = xen_vcpu_nr(cpu);
  1489. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1490. &bind_virq) != 0)
  1491. BUG();
  1492. evtchn = bind_virq.port;
  1493. /* Record the new mapping. */
  1494. (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq);
  1495. bind_evtchn_to_cpu(evtchn, cpu);
  1496. }
  1497. }
  1498. static void restore_cpu_ipis(unsigned int cpu)
  1499. {
  1500. struct evtchn_bind_ipi bind_ipi;
  1501. int ipi, irq, evtchn;
  1502. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1503. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1504. continue;
  1505. BUG_ON(ipi_from_irq(irq) != ipi);
  1506. /* Get a new binding from Xen. */
  1507. bind_ipi.vcpu = xen_vcpu_nr(cpu);
  1508. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1509. &bind_ipi) != 0)
  1510. BUG();
  1511. evtchn = bind_ipi.port;
  1512. /* Record the new mapping. */
  1513. (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi);
  1514. bind_evtchn_to_cpu(evtchn, cpu);
  1515. }
  1516. }
  1517. /* Clear an irq's pending state, in preparation for polling on it */
  1518. void xen_clear_irq_pending(int irq)
  1519. {
  1520. struct irq_info *info = info_for_irq(irq);
  1521. evtchn_port_t evtchn = info ? info->evtchn : 0;
  1522. if (VALID_EVTCHN(evtchn))
  1523. event_handler_exit(info);
  1524. }
  1525. EXPORT_SYMBOL(xen_clear_irq_pending);
  1526. void xen_set_irq_pending(int irq)
  1527. {
  1528. int evtchn = evtchn_from_irq(irq);
  1529. if (VALID_EVTCHN(evtchn))
  1530. set_evtchn(evtchn);
  1531. }
  1532. bool xen_test_irq_pending(int irq)
  1533. {
  1534. int evtchn = evtchn_from_irq(irq);
  1535. bool ret = false;
  1536. if (VALID_EVTCHN(evtchn))
  1537. ret = test_evtchn(evtchn);
  1538. return ret;
  1539. }
  1540. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1541. * the irq will be disabled so it won't deliver an interrupt. */
  1542. void xen_poll_irq_timeout(int irq, u64 timeout)
  1543. {
  1544. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1545. if (VALID_EVTCHN(evtchn)) {
  1546. struct sched_poll poll;
  1547. poll.nr_ports = 1;
  1548. poll.timeout = timeout;
  1549. set_xen_guest_handle(poll.ports, &evtchn);
  1550. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1551. BUG();
  1552. }
  1553. }
  1554. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1555. /* Poll waiting for an irq to become pending. In the usual case, the
  1556. * irq will be disabled so it won't deliver an interrupt. */
  1557. void xen_poll_irq(int irq)
  1558. {
  1559. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1560. }
  1561. /* Check whether the IRQ line is shared with other guests. */
  1562. int xen_test_irq_shared(int irq)
  1563. {
  1564. struct irq_info *info = info_for_irq(irq);
  1565. struct physdev_irq_status_query irq_status;
  1566. if (WARN_ON(!info))
  1567. return -ENOENT;
  1568. irq_status.irq = info->u.pirq.pirq;
  1569. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1570. return 0;
  1571. return !(irq_status.flags & XENIRQSTAT_shared);
  1572. }
  1573. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1574. void xen_irq_resume(void)
  1575. {
  1576. unsigned int cpu;
  1577. struct irq_info *info;
  1578. /* New event-channel space is not 'live' yet. */
  1579. xen_evtchn_resume();
  1580. /* No IRQ <-> event-channel mappings. */
  1581. list_for_each_entry(info, &xen_irq_list_head, list)
  1582. info->evtchn = 0; /* zap event-channel binding */
  1583. clear_evtchn_to_irq_all();
  1584. for_each_possible_cpu(cpu) {
  1585. restore_cpu_virqs(cpu);
  1586. restore_cpu_ipis(cpu);
  1587. }
  1588. restore_pirqs();
  1589. }
  1590. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1591. .name = "xen-dyn",
  1592. .irq_disable = disable_dynirq,
  1593. .irq_mask = disable_dynirq,
  1594. .irq_unmask = enable_dynirq,
  1595. .irq_ack = ack_dynirq,
  1596. .irq_mask_ack = mask_ack_dynirq,
  1597. .irq_set_affinity = set_affinity_irq,
  1598. .irq_retrigger = retrigger_dynirq,
  1599. };
  1600. static struct irq_chip xen_lateeoi_chip __read_mostly = {
  1601. /* The chip name needs to contain "xen-dyn" for irqbalance to work. */
  1602. .name = "xen-dyn-lateeoi",
  1603. .irq_disable = disable_dynirq,
  1604. .irq_mask = disable_dynirq,
  1605. .irq_unmask = enable_dynirq,
  1606. .irq_ack = lateeoi_ack_dynirq,
  1607. .irq_mask_ack = lateeoi_mask_ack_dynirq,
  1608. .irq_set_affinity = set_affinity_irq,
  1609. .irq_retrigger = retrigger_dynirq,
  1610. };
  1611. static struct irq_chip xen_pirq_chip __read_mostly = {
  1612. .name = "xen-pirq",
  1613. .irq_startup = startup_pirq,
  1614. .irq_shutdown = shutdown_pirq,
  1615. .irq_enable = enable_pirq,
  1616. .irq_disable = disable_pirq,
  1617. .irq_mask = disable_dynirq,
  1618. .irq_unmask = enable_dynirq,
  1619. .irq_ack = eoi_pirq,
  1620. .irq_eoi = eoi_pirq,
  1621. .irq_mask_ack = mask_ack_pirq,
  1622. .irq_set_affinity = set_affinity_irq,
  1623. .irq_retrigger = retrigger_dynirq,
  1624. };
  1625. static struct irq_chip xen_percpu_chip __read_mostly = {
  1626. .name = "xen-percpu",
  1627. .irq_disable = disable_dynirq,
  1628. .irq_mask = disable_dynirq,
  1629. .irq_unmask = enable_dynirq,
  1630. .irq_ack = ack_dynirq,
  1631. };
  1632. #ifdef CONFIG_XEN_PVHVM
  1633. /* Vector callbacks are better than PCI interrupts to receive event
  1634. * channel notifications because we can receive vector callbacks on any
  1635. * vcpu and we don't need PCI support or APIC interactions. */
  1636. void xen_callback_vector(void)
  1637. {
  1638. int rc;
  1639. uint64_t callback_via;
  1640. if (xen_have_vector_callback) {
  1641. callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR);
  1642. rc = xen_set_callback_via(callback_via);
  1643. if (rc) {
  1644. pr_err("Request for Xen HVM callback vector failed\n");
  1645. xen_have_vector_callback = 0;
  1646. return;
  1647. }
  1648. pr_info_once("Xen HVM callback vector for event delivery is enabled\n");
  1649. alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR,
  1650. xen_hvm_callback_vector);
  1651. }
  1652. }
  1653. #else
  1654. void xen_callback_vector(void) {}
  1655. #endif
  1656. static bool fifo_events = true;
  1657. module_param(fifo_events, bool, 0);
  1658. static int xen_evtchn_cpu_prepare(unsigned int cpu)
  1659. {
  1660. int ret = 0;
  1661. xen_cpu_init_eoi(cpu);
  1662. if (evtchn_ops->percpu_init)
  1663. ret = evtchn_ops->percpu_init(cpu);
  1664. return ret;
  1665. }
  1666. static int xen_evtchn_cpu_dead(unsigned int cpu)
  1667. {
  1668. int ret = 0;
  1669. if (evtchn_ops->percpu_deinit)
  1670. ret = evtchn_ops->percpu_deinit(cpu);
  1671. return ret;
  1672. }
  1673. void __init xen_init_IRQ(void)
  1674. {
  1675. int ret = -EINVAL;
  1676. unsigned int evtchn;
  1677. if (fifo_events)
  1678. ret = xen_evtchn_fifo_init();
  1679. if (ret < 0)
  1680. xen_evtchn_2l_init();
  1681. xen_cpu_init_eoi(smp_processor_id());
  1682. cpuhp_setup_state_nocalls(CPUHP_XEN_EVTCHN_PREPARE,
  1683. "xen/evtchn:prepare",
  1684. xen_evtchn_cpu_prepare, xen_evtchn_cpu_dead);
  1685. evtchn_to_irq = kcalloc(EVTCHN_ROW(xen_evtchn_max_channels()),
  1686. sizeof(*evtchn_to_irq), GFP_KERNEL);
  1687. BUG_ON(!evtchn_to_irq);
  1688. /* No event channels are 'live' right now. */
  1689. for (evtchn = 0; evtchn < xen_evtchn_nr_channels(); evtchn++)
  1690. mask_evtchn(evtchn);
  1691. pirq_needs_eoi = pirq_needs_eoi_flag;
  1692. #ifdef CONFIG_X86
  1693. if (xen_pv_domain()) {
  1694. irq_ctx_init(smp_processor_id());
  1695. if (xen_initial_domain())
  1696. pci_xen_initial_domain();
  1697. }
  1698. if (xen_feature(XENFEAT_hvm_callback_vector))
  1699. xen_callback_vector();
  1700. if (xen_hvm_domain()) {
  1701. native_init_IRQ();
  1702. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1703. * __acpi_register_gsi can point at the right function */
  1704. pci_xen_hvm_init();
  1705. } else {
  1706. int rc;
  1707. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1708. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1709. eoi_gmfn.gmfn = virt_to_gfn(pirq_eoi_map);
  1710. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1711. if (rc != 0) {
  1712. free_page((unsigned long) pirq_eoi_map);
  1713. pirq_eoi_map = NULL;
  1714. } else
  1715. pirq_needs_eoi = pirq_check_eoi_map;
  1716. }
  1717. #endif
  1718. }