platform.c 14 KB

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  1. /*
  2. * platform.c - DesignWare HS OTG Controller platform driver
  3. *
  4. * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions, and the following disclaimer,
  11. * without modification.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. The names of the above-listed copyright holders may not be used
  16. * to endorse or promote products derived from this software without
  17. * specific prior written permission.
  18. *
  19. * ALTERNATIVELY, this software may be distributed under the terms of the
  20. * GNU General Public License ("GPL") as published by the Free Software
  21. * Foundation; either version 2 of the License, or (at your option) any
  22. * later version.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  25. * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  28. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  29. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  30. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  31. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  32. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  33. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. */
  36. #include <linux/kernel.h>
  37. #include <linux/module.h>
  38. #include <linux/slab.h>
  39. #include <linux/clk.h>
  40. #include <linux/device.h>
  41. #include <linux/dma-mapping.h>
  42. #include <linux/of_device.h>
  43. #include <linux/mutex.h>
  44. #include <linux/platform_device.h>
  45. #include <linux/phy/phy.h>
  46. #include <linux/platform_data/s3c-hsotg.h>
  47. #include <linux/reset.h>
  48. #include <linux/usb/of.h>
  49. #include "core.h"
  50. #include "hcd.h"
  51. #include "debug.h"
  52. static const char dwc2_driver_name[] = "dwc2";
  53. /*
  54. * Check the dr_mode against the module configuration and hardware
  55. * capabilities.
  56. *
  57. * The hardware, module, and dr_mode, can each be set to host, device,
  58. * or otg. Check that all these values are compatible and adjust the
  59. * value of dr_mode if possible.
  60. *
  61. * actual
  62. * HW MOD dr_mode dr_mode
  63. * ------------------------------
  64. * HST HST any : HST
  65. * HST DEV any : ---
  66. * HST OTG any : HST
  67. *
  68. * DEV HST any : ---
  69. * DEV DEV any : DEV
  70. * DEV OTG any : DEV
  71. *
  72. * OTG HST any : HST
  73. * OTG DEV any : DEV
  74. * OTG OTG any : dr_mode
  75. */
  76. static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
  77. {
  78. enum usb_dr_mode mode;
  79. hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
  80. if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
  81. hsotg->dr_mode = USB_DR_MODE_OTG;
  82. mode = hsotg->dr_mode;
  83. if (dwc2_hw_is_device(hsotg)) {
  84. if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
  85. dev_err(hsotg->dev,
  86. "Controller does not support host mode.\n");
  87. return -EINVAL;
  88. }
  89. mode = USB_DR_MODE_PERIPHERAL;
  90. } else if (dwc2_hw_is_host(hsotg)) {
  91. if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
  92. dev_err(hsotg->dev,
  93. "Controller does not support device mode.\n");
  94. return -EINVAL;
  95. }
  96. mode = USB_DR_MODE_HOST;
  97. } else {
  98. if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
  99. mode = USB_DR_MODE_HOST;
  100. else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
  101. mode = USB_DR_MODE_PERIPHERAL;
  102. }
  103. if (mode != hsotg->dr_mode) {
  104. dev_warn(hsotg->dev,
  105. "Configuration mismatch. dr_mode forced to %s\n",
  106. mode == USB_DR_MODE_HOST ? "host" : "device");
  107. hsotg->dr_mode = mode;
  108. }
  109. return 0;
  110. }
  111. static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
  112. {
  113. struct platform_device *pdev = to_platform_device(hsotg->dev);
  114. int ret;
  115. ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
  116. hsotg->supplies);
  117. if (ret)
  118. return ret;
  119. if (hsotg->clk) {
  120. ret = clk_prepare_enable(hsotg->clk);
  121. if (ret)
  122. return ret;
  123. }
  124. if (hsotg->uphy) {
  125. ret = usb_phy_init(hsotg->uphy);
  126. } else if (hsotg->plat && hsotg->plat->phy_init) {
  127. ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
  128. } else {
  129. ret = phy_power_on(hsotg->phy);
  130. if (ret == 0)
  131. ret = phy_init(hsotg->phy);
  132. }
  133. return ret;
  134. }
  135. /**
  136. * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
  137. * @hsotg: The driver state
  138. *
  139. * A wrapper for platform code responsible for controlling
  140. * low-level USB platform resources (phy, clock, regulators)
  141. */
  142. int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
  143. {
  144. int ret = __dwc2_lowlevel_hw_enable(hsotg);
  145. if (ret == 0)
  146. hsotg->ll_hw_enabled = true;
  147. return ret;
  148. }
  149. static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
  150. {
  151. struct platform_device *pdev = to_platform_device(hsotg->dev);
  152. int ret = 0;
  153. if (hsotg->uphy) {
  154. usb_phy_shutdown(hsotg->uphy);
  155. } else if (hsotg->plat && hsotg->plat->phy_exit) {
  156. ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
  157. } else {
  158. ret = phy_exit(hsotg->phy);
  159. if (ret == 0)
  160. ret = phy_power_off(hsotg->phy);
  161. }
  162. if (ret)
  163. return ret;
  164. if (hsotg->clk)
  165. clk_disable_unprepare(hsotg->clk);
  166. ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
  167. hsotg->supplies);
  168. return ret;
  169. }
  170. /**
  171. * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
  172. * @hsotg: The driver state
  173. *
  174. * A wrapper for platform code responsible for controlling
  175. * low-level USB platform resources (phy, clock, regulators)
  176. */
  177. int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
  178. {
  179. int ret = __dwc2_lowlevel_hw_disable(hsotg);
  180. if (ret == 0)
  181. hsotg->ll_hw_enabled = false;
  182. return ret;
  183. }
  184. static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
  185. {
  186. int i, ret;
  187. hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
  188. if (IS_ERR(hsotg->reset)) {
  189. ret = PTR_ERR(hsotg->reset);
  190. dev_err(hsotg->dev, "error getting reset control %d\n", ret);
  191. return ret;
  192. }
  193. reset_control_deassert(hsotg->reset);
  194. /* Set default UTMI width */
  195. hsotg->phyif = GUSBCFG_PHYIF16;
  196. /*
  197. * Attempt to find a generic PHY, then look for an old style
  198. * USB PHY and then fall back to pdata
  199. */
  200. hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
  201. if (IS_ERR(hsotg->phy)) {
  202. ret = PTR_ERR(hsotg->phy);
  203. switch (ret) {
  204. case -ENODEV:
  205. case -ENOSYS:
  206. hsotg->phy = NULL;
  207. break;
  208. case -EPROBE_DEFER:
  209. return ret;
  210. default:
  211. dev_err(hsotg->dev, "error getting phy %d\n", ret);
  212. return ret;
  213. }
  214. }
  215. if (!hsotg->phy) {
  216. hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
  217. if (IS_ERR(hsotg->uphy)) {
  218. ret = PTR_ERR(hsotg->uphy);
  219. switch (ret) {
  220. case -ENODEV:
  221. case -ENXIO:
  222. hsotg->uphy = NULL;
  223. break;
  224. case -EPROBE_DEFER:
  225. return ret;
  226. default:
  227. dev_err(hsotg->dev, "error getting usb phy %d\n",
  228. ret);
  229. return ret;
  230. }
  231. }
  232. }
  233. hsotg->plat = dev_get_platdata(hsotg->dev);
  234. if (hsotg->phy) {
  235. /*
  236. * If using the generic PHY framework, check if the PHY bus
  237. * width is 8-bit and set the phyif appropriately.
  238. */
  239. if (phy_get_bus_width(hsotg->phy) == 8)
  240. hsotg->phyif = GUSBCFG_PHYIF8;
  241. }
  242. /* Clock */
  243. hsotg->clk = devm_clk_get(hsotg->dev, "otg");
  244. if (IS_ERR(hsotg->clk)) {
  245. hsotg->clk = NULL;
  246. dev_dbg(hsotg->dev, "cannot get otg clock\n");
  247. }
  248. /* Regulators */
  249. for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
  250. hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
  251. ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
  252. hsotg->supplies);
  253. if (ret) {
  254. dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
  255. return ret;
  256. }
  257. return 0;
  258. }
  259. /**
  260. * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
  261. * DWC_otg driver
  262. *
  263. * @dev: Platform device
  264. *
  265. * This routine is called, for example, when the rmmod command is executed. The
  266. * device may or may not be electrically present. If it is present, the driver
  267. * stops device processing. Any resources used on behalf of this device are
  268. * freed.
  269. */
  270. static int dwc2_driver_remove(struct platform_device *dev)
  271. {
  272. struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
  273. dwc2_debugfs_exit(hsotg);
  274. if (hsotg->hcd_enabled)
  275. dwc2_hcd_remove(hsotg);
  276. if (hsotg->gadget_enabled)
  277. dwc2_hsotg_remove(hsotg);
  278. if (hsotg->ll_hw_enabled)
  279. dwc2_lowlevel_hw_disable(hsotg);
  280. reset_control_assert(hsotg->reset);
  281. return 0;
  282. }
  283. /**
  284. * dwc2_driver_shutdown() - Called on device shutdown
  285. *
  286. * @dev: Platform device
  287. *
  288. * In specific conditions (involving usb hubs) dwc2 devices can create a
  289. * lot of interrupts, even to the point of overwhelming devices running
  290. * at low frequencies. Some devices need to do special clock handling
  291. * at shutdown-time which may bring the system clock below the threshold
  292. * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
  293. * prevents reboots/poweroffs from getting stuck in such cases.
  294. */
  295. static void dwc2_driver_shutdown(struct platform_device *dev)
  296. {
  297. struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
  298. dwc2_disable_global_interrupts(hsotg);
  299. synchronize_irq(hsotg->irq);
  300. }
  301. /**
  302. * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
  303. * driver
  304. *
  305. * @dev: Platform device
  306. *
  307. * This routine creates the driver components required to control the device
  308. * (core, HCD, and PCD) and initializes the device. The driver components are
  309. * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
  310. * in the device private data. This allows the driver to access the dwc2_hsotg
  311. * structure on subsequent calls to driver methods for this device.
  312. */
  313. static int dwc2_driver_probe(struct platform_device *dev)
  314. {
  315. struct dwc2_hsotg *hsotg;
  316. struct resource *res;
  317. int retval;
  318. hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
  319. if (!hsotg)
  320. return -ENOMEM;
  321. hsotg->dev = &dev->dev;
  322. /*
  323. * Use reasonable defaults so platforms don't have to provide these.
  324. */
  325. if (!dev->dev.dma_mask)
  326. dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
  327. retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
  328. if (retval)
  329. return retval;
  330. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  331. hsotg->regs = devm_ioremap_resource(&dev->dev, res);
  332. if (IS_ERR(hsotg->regs))
  333. return PTR_ERR(hsotg->regs);
  334. dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
  335. (unsigned long)res->start, hsotg->regs);
  336. retval = dwc2_lowlevel_hw_init(hsotg);
  337. if (retval)
  338. return retval;
  339. spin_lock_init(&hsotg->lock);
  340. hsotg->irq = platform_get_irq(dev, 0);
  341. if (hsotg->irq < 0) {
  342. dev_err(&dev->dev, "missing IRQ resource\n");
  343. return hsotg->irq;
  344. }
  345. dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
  346. hsotg->irq);
  347. retval = devm_request_irq(hsotg->dev, hsotg->irq,
  348. dwc2_handle_common_intr, IRQF_SHARED,
  349. dev_name(hsotg->dev), hsotg);
  350. if (retval)
  351. return retval;
  352. retval = dwc2_lowlevel_hw_enable(hsotg);
  353. if (retval)
  354. return retval;
  355. retval = dwc2_get_dr_mode(hsotg);
  356. if (retval)
  357. goto error;
  358. /*
  359. * Reset before dwc2_get_hwparams() then it could get power-on real
  360. * reset value form registers.
  361. */
  362. dwc2_core_reset_and_force_dr_mode(hsotg);
  363. /* Detect config values from hardware */
  364. retval = dwc2_get_hwparams(hsotg);
  365. if (retval)
  366. goto error;
  367. dwc2_force_dr_mode(hsotg);
  368. retval = dwc2_init_params(hsotg);
  369. if (retval)
  370. goto error;
  371. if (hsotg->dr_mode != USB_DR_MODE_HOST) {
  372. retval = dwc2_gadget_init(hsotg, hsotg->irq);
  373. if (retval)
  374. goto error;
  375. hsotg->gadget_enabled = 1;
  376. }
  377. if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
  378. retval = dwc2_hcd_init(hsotg);
  379. if (retval) {
  380. if (hsotg->gadget_enabled)
  381. dwc2_hsotg_remove(hsotg);
  382. goto error;
  383. }
  384. hsotg->hcd_enabled = 1;
  385. }
  386. platform_set_drvdata(dev, hsotg);
  387. dwc2_debugfs_init(hsotg);
  388. /* Gadget code manages lowlevel hw on its own */
  389. if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
  390. dwc2_lowlevel_hw_disable(hsotg);
  391. #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
  392. IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
  393. /* Postponed adding a new gadget to the udc class driver list */
  394. if (hsotg->gadget_enabled) {
  395. retval = usb_add_gadget_udc(hsotg->dev, &hsotg->gadget);
  396. if (retval) {
  397. hsotg->gadget.udc = NULL;
  398. dwc2_hsotg_remove(hsotg);
  399. goto error;
  400. }
  401. }
  402. #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
  403. return 0;
  404. error:
  405. if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL)
  406. dwc2_lowlevel_hw_disable(hsotg);
  407. return retval;
  408. }
  409. static int __maybe_unused dwc2_suspend(struct device *dev)
  410. {
  411. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  412. int ret = 0;
  413. if (dwc2_is_device_mode(dwc2))
  414. dwc2_hsotg_suspend(dwc2);
  415. if (dwc2->ll_hw_enabled)
  416. ret = __dwc2_lowlevel_hw_disable(dwc2);
  417. return ret;
  418. }
  419. static int __maybe_unused dwc2_resume(struct device *dev)
  420. {
  421. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  422. int ret = 0;
  423. if (dwc2->ll_hw_enabled) {
  424. ret = __dwc2_lowlevel_hw_enable(dwc2);
  425. if (ret)
  426. return ret;
  427. }
  428. if (dwc2_is_device_mode(dwc2))
  429. ret = dwc2_hsotg_resume(dwc2);
  430. return ret;
  431. }
  432. static const struct dev_pm_ops dwc2_dev_pm_ops = {
  433. SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
  434. };
  435. static struct platform_driver dwc2_platform_driver = {
  436. .driver = {
  437. .name = dwc2_driver_name,
  438. .of_match_table = dwc2_of_match_table,
  439. .pm = &dwc2_dev_pm_ops,
  440. },
  441. .probe = dwc2_driver_probe,
  442. .remove = dwc2_driver_remove,
  443. .shutdown = dwc2_driver_shutdown,
  444. };
  445. module_platform_driver(dwc2_platform_driver);
  446. MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
  447. MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
  448. MODULE_LICENSE("Dual BSD/GPL");