spi-sc18is602.c 8.4 KB

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  1. /*
  2. * NXP SC18IS602/603 SPI driver
  3. *
  4. * Copyright (C) Guenter Roeck <linux@roeck-us.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/err.h>
  18. #include <linux/module.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/i2c.h>
  21. #include <linux/delay.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/of_device.h>
  24. #include <linux/of.h>
  25. #include <linux/platform_data/sc18is602.h>
  26. #include <linux/gpio/consumer.h>
  27. enum chips { sc18is602, sc18is602b, sc18is603 };
  28. #define SC18IS602_BUFSIZ 200
  29. #define SC18IS602_CLOCK 7372000
  30. #define SC18IS602_MODE_CPHA BIT(2)
  31. #define SC18IS602_MODE_CPOL BIT(3)
  32. #define SC18IS602_MODE_LSB_FIRST BIT(5)
  33. #define SC18IS602_MODE_CLOCK_DIV_4 0x0
  34. #define SC18IS602_MODE_CLOCK_DIV_16 0x1
  35. #define SC18IS602_MODE_CLOCK_DIV_64 0x2
  36. #define SC18IS602_MODE_CLOCK_DIV_128 0x3
  37. struct sc18is602 {
  38. struct spi_master *master;
  39. struct device *dev;
  40. u8 ctrl;
  41. u32 freq;
  42. u32 speed;
  43. /* I2C data */
  44. struct i2c_client *client;
  45. enum chips id;
  46. u8 buffer[SC18IS602_BUFSIZ + 1];
  47. int tlen; /* Data queued for tx in buffer */
  48. int rindex; /* Receive data index in buffer */
  49. struct gpio_desc *reset;
  50. };
  51. static int sc18is602_wait_ready(struct sc18is602 *hw, int len)
  52. {
  53. int i, err;
  54. int usecs = 1000000 * len / hw->speed + 1;
  55. u8 dummy[1];
  56. for (i = 0; i < 10; i++) {
  57. err = i2c_master_recv(hw->client, dummy, 1);
  58. if (err >= 0)
  59. return 0;
  60. usleep_range(usecs, usecs * 2);
  61. }
  62. return -ETIMEDOUT;
  63. }
  64. static int sc18is602_txrx(struct sc18is602 *hw, struct spi_message *msg,
  65. struct spi_transfer *t, bool do_transfer)
  66. {
  67. unsigned int len = t->len;
  68. int ret;
  69. if (hw->tlen == 0) {
  70. /* First byte (I2C command) is chip select */
  71. hw->buffer[0] = 1 << msg->spi->chip_select;
  72. hw->tlen = 1;
  73. hw->rindex = 0;
  74. }
  75. /*
  76. * We can not immediately send data to the chip, since each I2C message
  77. * resembles a full SPI message (from CS active to CS inactive).
  78. * Enqueue messages up to the first read or until do_transfer is true.
  79. */
  80. if (t->tx_buf) {
  81. memcpy(&hw->buffer[hw->tlen], t->tx_buf, len);
  82. hw->tlen += len;
  83. if (t->rx_buf)
  84. do_transfer = true;
  85. else
  86. hw->rindex = hw->tlen - 1;
  87. } else if (t->rx_buf) {
  88. /*
  89. * For receive-only transfers we still need to perform a dummy
  90. * write to receive data from the SPI chip.
  91. * Read data starts at the end of transmit data (minus 1 to
  92. * account for CS).
  93. */
  94. hw->rindex = hw->tlen - 1;
  95. memset(&hw->buffer[hw->tlen], 0, len);
  96. hw->tlen += len;
  97. do_transfer = true;
  98. }
  99. if (do_transfer && hw->tlen > 1) {
  100. ret = sc18is602_wait_ready(hw, SC18IS602_BUFSIZ);
  101. if (ret < 0)
  102. return ret;
  103. ret = i2c_master_send(hw->client, hw->buffer, hw->tlen);
  104. if (ret < 0)
  105. return ret;
  106. if (ret != hw->tlen)
  107. return -EIO;
  108. if (t->rx_buf) {
  109. int rlen = hw->rindex + len;
  110. ret = sc18is602_wait_ready(hw, hw->tlen);
  111. if (ret < 0)
  112. return ret;
  113. ret = i2c_master_recv(hw->client, hw->buffer, rlen);
  114. if (ret < 0)
  115. return ret;
  116. if (ret != rlen)
  117. return -EIO;
  118. memcpy(t->rx_buf, &hw->buffer[hw->rindex], len);
  119. }
  120. hw->tlen = 0;
  121. }
  122. return len;
  123. }
  124. static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode)
  125. {
  126. u8 ctrl = 0;
  127. int ret;
  128. if (mode & SPI_CPHA)
  129. ctrl |= SC18IS602_MODE_CPHA;
  130. if (mode & SPI_CPOL)
  131. ctrl |= SC18IS602_MODE_CPOL;
  132. if (mode & SPI_LSB_FIRST)
  133. ctrl |= SC18IS602_MODE_LSB_FIRST;
  134. /* Find the closest clock speed */
  135. if (hz >= hw->freq / 4) {
  136. ctrl |= SC18IS602_MODE_CLOCK_DIV_4;
  137. hw->speed = hw->freq / 4;
  138. } else if (hz >= hw->freq / 16) {
  139. ctrl |= SC18IS602_MODE_CLOCK_DIV_16;
  140. hw->speed = hw->freq / 16;
  141. } else if (hz >= hw->freq / 64) {
  142. ctrl |= SC18IS602_MODE_CLOCK_DIV_64;
  143. hw->speed = hw->freq / 64;
  144. } else {
  145. ctrl |= SC18IS602_MODE_CLOCK_DIV_128;
  146. hw->speed = hw->freq / 128;
  147. }
  148. /*
  149. * Don't do anything if the control value did not change. The initial
  150. * value of 0xff for hw->ctrl ensures that the correct mode will be set
  151. * with the first call to this function.
  152. */
  153. if (ctrl == hw->ctrl)
  154. return 0;
  155. ret = i2c_smbus_write_byte_data(hw->client, 0xf0, ctrl);
  156. if (ret < 0)
  157. return ret;
  158. hw->ctrl = ctrl;
  159. return 0;
  160. }
  161. static int sc18is602_check_transfer(struct spi_device *spi,
  162. struct spi_transfer *t, int tlen)
  163. {
  164. if (t && t->len + tlen > SC18IS602_BUFSIZ)
  165. return -EINVAL;
  166. return 0;
  167. }
  168. static int sc18is602_transfer_one(struct spi_master *master,
  169. struct spi_message *m)
  170. {
  171. struct sc18is602 *hw = spi_master_get_devdata(master);
  172. struct spi_device *spi = m->spi;
  173. struct spi_transfer *t;
  174. int status = 0;
  175. hw->tlen = 0;
  176. list_for_each_entry(t, &m->transfers, transfer_list) {
  177. bool do_transfer;
  178. status = sc18is602_check_transfer(spi, t, hw->tlen);
  179. if (status < 0)
  180. break;
  181. status = sc18is602_setup_transfer(hw, t->speed_hz, spi->mode);
  182. if (status < 0)
  183. break;
  184. do_transfer = t->cs_change || list_is_last(&t->transfer_list,
  185. &m->transfers);
  186. if (t->len) {
  187. status = sc18is602_txrx(hw, m, t, do_transfer);
  188. if (status < 0)
  189. break;
  190. m->actual_length += status;
  191. }
  192. status = 0;
  193. if (t->delay_usecs)
  194. udelay(t->delay_usecs);
  195. }
  196. m->status = status;
  197. spi_finalize_current_message(master);
  198. return status;
  199. }
  200. static int sc18is602_setup(struct spi_device *spi)
  201. {
  202. struct sc18is602 *hw = spi_master_get_devdata(spi->master);
  203. /* SC18IS602 does not support CS2 */
  204. if (hw->id == sc18is602 && spi->chip_select == 2)
  205. return -ENXIO;
  206. return 0;
  207. }
  208. static int sc18is602_probe(struct i2c_client *client,
  209. const struct i2c_device_id *id)
  210. {
  211. struct device *dev = &client->dev;
  212. struct device_node *np = dev->of_node;
  213. struct sc18is602_platform_data *pdata = dev_get_platdata(dev);
  214. struct sc18is602 *hw;
  215. struct spi_master *master;
  216. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  217. I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  218. return -EINVAL;
  219. master = devm_spi_alloc_master(dev, sizeof(struct sc18is602));
  220. if (!master)
  221. return -ENOMEM;
  222. hw = spi_master_get_devdata(master);
  223. i2c_set_clientdata(client, hw);
  224. /* assert reset and then release */
  225. hw->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
  226. if (IS_ERR(hw->reset))
  227. return PTR_ERR(hw->reset);
  228. gpiod_set_value_cansleep(hw->reset, 0);
  229. hw->master = master;
  230. hw->client = client;
  231. hw->dev = dev;
  232. hw->ctrl = 0xff;
  233. if (client->dev.of_node)
  234. hw->id = (enum chips)of_device_get_match_data(&client->dev);
  235. else
  236. hw->id = id->driver_data;
  237. switch (hw->id) {
  238. case sc18is602:
  239. case sc18is602b:
  240. master->num_chipselect = 4;
  241. hw->freq = SC18IS602_CLOCK;
  242. break;
  243. case sc18is603:
  244. master->num_chipselect = 2;
  245. if (pdata) {
  246. hw->freq = pdata->clock_frequency;
  247. } else {
  248. const __be32 *val;
  249. int len;
  250. val = of_get_property(np, "clock-frequency", &len);
  251. if (val && len >= sizeof(__be32))
  252. hw->freq = be32_to_cpup(val);
  253. }
  254. if (!hw->freq)
  255. hw->freq = SC18IS602_CLOCK;
  256. break;
  257. }
  258. master->bus_num = np ? -1 : client->adapter->nr;
  259. master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST;
  260. master->bits_per_word_mask = SPI_BPW_MASK(8);
  261. master->setup = sc18is602_setup;
  262. master->transfer_one_message = sc18is602_transfer_one;
  263. master->dev.of_node = np;
  264. master->min_speed_hz = hw->freq / 128;
  265. master->max_speed_hz = hw->freq / 4;
  266. return devm_spi_register_master(dev, master);
  267. }
  268. static const struct i2c_device_id sc18is602_id[] = {
  269. { "sc18is602", sc18is602 },
  270. { "sc18is602b", sc18is602b },
  271. { "sc18is603", sc18is603 },
  272. { }
  273. };
  274. MODULE_DEVICE_TABLE(i2c, sc18is602_id);
  275. static const struct of_device_id sc18is602_of_match[] = {
  276. {
  277. .compatible = "nxp,sc18is602",
  278. .data = (void *)sc18is602
  279. },
  280. {
  281. .compatible = "nxp,sc18is602b",
  282. .data = (void *)sc18is602b
  283. },
  284. {
  285. .compatible = "nxp,sc18is603",
  286. .data = (void *)sc18is603
  287. },
  288. { },
  289. };
  290. MODULE_DEVICE_TABLE(of, sc18is602_of_match);
  291. static struct i2c_driver sc18is602_driver = {
  292. .driver = {
  293. .name = "sc18is602",
  294. .of_match_table = of_match_ptr(sc18is602_of_match),
  295. },
  296. .probe = sc18is602_probe,
  297. .id_table = sc18is602_id,
  298. };
  299. module_i2c_driver(sc18is602_driver);
  300. MODULE_DESCRIPTION("SC18IC602/603 SPI Master Driver");
  301. MODULE_AUTHOR("Guenter Roeck");
  302. MODULE_LICENSE("GPL");