pmcraid.c 165 KB

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  1. /*
  2. * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
  3. *
  4. * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
  5. * PMC-Sierra Inc
  6. *
  7. * Copyright (C) 2008, 2009 PMC Sierra Inc
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
  22. * USA
  23. *
  24. */
  25. #include <linux/fs.h>
  26. #include <linux/init.h>
  27. #include <linux/types.h>
  28. #include <linux/errno.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ioport.h>
  31. #include <linux/delay.h>
  32. #include <linux/pci.h>
  33. #include <linux/wait.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/sched.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/firmware.h>
  39. #include <linux/module.h>
  40. #include <linux/moduleparam.h>
  41. #include <linux/hdreg.h>
  42. #include <linux/io.h>
  43. #include <linux/slab.h>
  44. #include <asm/irq.h>
  45. #include <asm/processor.h>
  46. #include <linux/libata.h>
  47. #include <linux/mutex.h>
  48. #include <linux/ktime.h>
  49. #include <scsi/scsi.h>
  50. #include <scsi/scsi_host.h>
  51. #include <scsi/scsi_device.h>
  52. #include <scsi/scsi_tcq.h>
  53. #include <scsi/scsi_eh.h>
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsicam.h>
  56. #include "pmcraid.h"
  57. /*
  58. * Module configuration parameters
  59. */
  60. static unsigned int pmcraid_debug_log;
  61. static unsigned int pmcraid_disable_aen;
  62. static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
  63. static unsigned int pmcraid_enable_msix;
  64. /*
  65. * Data structures to support multiple adapters by the LLD.
  66. * pmcraid_adapter_count - count of configured adapters
  67. */
  68. static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
  69. /*
  70. * Supporting user-level control interface through IOCTL commands.
  71. * pmcraid_major - major number to use
  72. * pmcraid_minor - minor number(s) to use
  73. */
  74. static unsigned int pmcraid_major;
  75. static struct class *pmcraid_class;
  76. static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
  77. /*
  78. * Module parameters
  79. */
  80. MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
  81. MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
  82. MODULE_LICENSE("GPL");
  83. MODULE_VERSION(PMCRAID_DRIVER_VERSION);
  84. module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
  85. MODULE_PARM_DESC(log_level,
  86. "Enables firmware error code logging, default :1 high-severity"
  87. " errors, 2: all errors including high-severity errors,"
  88. " 0: disables logging");
  89. module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
  90. MODULE_PARM_DESC(debug,
  91. "Enable driver verbose message logging. Set 1 to enable."
  92. "(default: 0)");
  93. module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
  94. MODULE_PARM_DESC(disable_aen,
  95. "Disable driver aen notifications to apps. Set 1 to disable."
  96. "(default: 0)");
  97. /* chip specific constants for PMC MaxRAID controllers (same for
  98. * 0x5220 and 0x8010
  99. */
  100. static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
  101. {
  102. .ioastatus = 0x0,
  103. .ioarrin = 0x00040,
  104. .mailbox = 0x7FC30,
  105. .global_intr_mask = 0x00034,
  106. .ioa_host_intr = 0x0009C,
  107. .ioa_host_intr_clr = 0x000A0,
  108. .ioa_host_msix_intr = 0x7FC40,
  109. .ioa_host_mask = 0x7FC28,
  110. .ioa_host_mask_clr = 0x7FC28,
  111. .host_ioa_intr = 0x00020,
  112. .host_ioa_intr_clr = 0x00020,
  113. .transop_timeout = 300
  114. }
  115. };
  116. /*
  117. * PCI device ids supported by pmcraid driver
  118. */
  119. static struct pci_device_id pmcraid_pci_table[] = {
  120. { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
  121. 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
  122. },
  123. {}
  124. };
  125. MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
  126. /**
  127. * pmcraid_slave_alloc - Prepare for commands to a device
  128. * @scsi_dev: scsi device struct
  129. *
  130. * This function is called by mid-layer prior to sending any command to the new
  131. * device. Stores resource entry details of the device in scsi_device struct.
  132. * Queuecommand uses the resource handle and other details to fill up IOARCB
  133. * while sending commands to the device.
  134. *
  135. * Return value:
  136. * 0 on success / -ENXIO if device does not exist
  137. */
  138. static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
  139. {
  140. struct pmcraid_resource_entry *temp, *res = NULL;
  141. struct pmcraid_instance *pinstance;
  142. u8 target, bus, lun;
  143. unsigned long lock_flags;
  144. int rc = -ENXIO;
  145. u16 fw_version;
  146. pinstance = shost_priv(scsi_dev->host);
  147. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  148. /* Driver exposes VSET and GSCSI resources only; all other device types
  149. * are not exposed. Resource list is synchronized using resource lock
  150. * so any traversal or modifications to the list should be done inside
  151. * this lock
  152. */
  153. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  154. list_for_each_entry(temp, &pinstance->used_res_q, queue) {
  155. /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
  156. if (RES_IS_VSET(temp->cfg_entry)) {
  157. if (fw_version <= PMCRAID_FW_VERSION_1)
  158. target = temp->cfg_entry.unique_flags1;
  159. else
  160. target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
  161. if (target > PMCRAID_MAX_VSET_TARGETS)
  162. continue;
  163. bus = PMCRAID_VSET_BUS_ID;
  164. lun = 0;
  165. } else if (RES_IS_GSCSI(temp->cfg_entry)) {
  166. target = RES_TARGET(temp->cfg_entry.resource_address);
  167. bus = PMCRAID_PHYS_BUS_ID;
  168. lun = RES_LUN(temp->cfg_entry.resource_address);
  169. } else {
  170. continue;
  171. }
  172. if (bus == scsi_dev->channel &&
  173. target == scsi_dev->id &&
  174. lun == scsi_dev->lun) {
  175. res = temp;
  176. break;
  177. }
  178. }
  179. if (res) {
  180. res->scsi_dev = scsi_dev;
  181. scsi_dev->hostdata = res;
  182. res->change_detected = 0;
  183. atomic_set(&res->read_failures, 0);
  184. atomic_set(&res->write_failures, 0);
  185. rc = 0;
  186. }
  187. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  188. return rc;
  189. }
  190. /**
  191. * pmcraid_slave_configure - Configures a SCSI device
  192. * @scsi_dev: scsi device struct
  193. *
  194. * This function is executed by SCSI mid layer just after a device is first
  195. * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
  196. * timeout value (default 30s) will be over-written to a higher value (60s)
  197. * and max_sectors value will be over-written to 512. It also sets queue depth
  198. * to host->cmd_per_lun value
  199. *
  200. * Return value:
  201. * 0 on success
  202. */
  203. static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
  204. {
  205. struct pmcraid_resource_entry *res = scsi_dev->hostdata;
  206. if (!res)
  207. return 0;
  208. /* LLD exposes VSETs and Enclosure devices only */
  209. if (RES_IS_GSCSI(res->cfg_entry) &&
  210. scsi_dev->type != TYPE_ENCLOSURE)
  211. return -ENXIO;
  212. pmcraid_info("configuring %x:%x:%x:%x\n",
  213. scsi_dev->host->unique_id,
  214. scsi_dev->channel,
  215. scsi_dev->id,
  216. (u8)scsi_dev->lun);
  217. if (RES_IS_GSCSI(res->cfg_entry)) {
  218. scsi_dev->allow_restart = 1;
  219. } else if (RES_IS_VSET(res->cfg_entry)) {
  220. scsi_dev->allow_restart = 1;
  221. blk_queue_rq_timeout(scsi_dev->request_queue,
  222. PMCRAID_VSET_IO_TIMEOUT);
  223. blk_queue_max_hw_sectors(scsi_dev->request_queue,
  224. PMCRAID_VSET_MAX_SECTORS);
  225. }
  226. /*
  227. * We never want to report TCQ support for these types of devices.
  228. */
  229. if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
  230. scsi_dev->tagged_supported = 0;
  231. return 0;
  232. }
  233. /**
  234. * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
  235. *
  236. * @scsi_dev: scsi device struct
  237. *
  238. * This is called by mid-layer before removing a device. Pointer assignments
  239. * done in pmcraid_slave_alloc will be reset to NULL here.
  240. *
  241. * Return value
  242. * none
  243. */
  244. static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
  245. {
  246. struct pmcraid_resource_entry *res;
  247. res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
  248. if (res)
  249. res->scsi_dev = NULL;
  250. scsi_dev->hostdata = NULL;
  251. }
  252. /**
  253. * pmcraid_change_queue_depth - Change the device's queue depth
  254. * @scsi_dev: scsi device struct
  255. * @depth: depth to set
  256. *
  257. * Return value
  258. * actual depth set
  259. */
  260. static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
  261. {
  262. if (depth > PMCRAID_MAX_CMD_PER_LUN)
  263. depth = PMCRAID_MAX_CMD_PER_LUN;
  264. return scsi_change_queue_depth(scsi_dev, depth);
  265. }
  266. /**
  267. * pmcraid_init_cmdblk - initializes a command block
  268. *
  269. * @cmd: pointer to struct pmcraid_cmd to be initialized
  270. * @index: if >=0 first time initialization; otherwise reinitialization
  271. *
  272. * Return Value
  273. * None
  274. */
  275. static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
  276. {
  277. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  278. dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
  279. if (index >= 0) {
  280. /* first time initialization (called from probe) */
  281. u32 ioasa_offset =
  282. offsetof(struct pmcraid_control_block, ioasa);
  283. cmd->index = index;
  284. ioarcb->response_handle = cpu_to_le32(index << 2);
  285. ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
  286. ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
  287. ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
  288. } else {
  289. /* re-initialization of various lengths, called once command is
  290. * processed by IOA
  291. */
  292. memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
  293. ioarcb->hrrq_id = 0;
  294. ioarcb->request_flags0 = 0;
  295. ioarcb->request_flags1 = 0;
  296. ioarcb->cmd_timeout = 0;
  297. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
  298. ioarcb->ioadl_bus_addr = 0;
  299. ioarcb->ioadl_length = 0;
  300. ioarcb->data_transfer_length = 0;
  301. ioarcb->add_cmd_param_length = 0;
  302. ioarcb->add_cmd_param_offset = 0;
  303. cmd->ioa_cb->ioasa.ioasc = 0;
  304. cmd->ioa_cb->ioasa.residual_data_length = 0;
  305. cmd->time_left = 0;
  306. }
  307. cmd->cmd_done = NULL;
  308. cmd->scsi_cmd = NULL;
  309. cmd->release = 0;
  310. cmd->completion_req = 0;
  311. cmd->sense_buffer = NULL;
  312. cmd->sense_buffer_dma = 0;
  313. cmd->dma_handle = 0;
  314. init_timer(&cmd->timer);
  315. }
  316. /**
  317. * pmcraid_reinit_cmdblk - reinitialize a command block
  318. *
  319. * @cmd: pointer to struct pmcraid_cmd to be reinitialized
  320. *
  321. * Return Value
  322. * None
  323. */
  324. static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
  325. {
  326. pmcraid_init_cmdblk(cmd, -1);
  327. }
  328. /**
  329. * pmcraid_get_free_cmd - get a free cmd block from command block pool
  330. * @pinstance: adapter instance structure
  331. *
  332. * Return Value:
  333. * returns pointer to cmd block or NULL if no blocks are available
  334. */
  335. static struct pmcraid_cmd *pmcraid_get_free_cmd(
  336. struct pmcraid_instance *pinstance
  337. )
  338. {
  339. struct pmcraid_cmd *cmd = NULL;
  340. unsigned long lock_flags;
  341. /* free cmd block list is protected by free_pool_lock */
  342. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  343. if (!list_empty(&pinstance->free_cmd_pool)) {
  344. cmd = list_entry(pinstance->free_cmd_pool.next,
  345. struct pmcraid_cmd, free_list);
  346. list_del(&cmd->free_list);
  347. }
  348. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  349. /* Initialize the command block before giving it the caller */
  350. if (cmd != NULL)
  351. pmcraid_reinit_cmdblk(cmd);
  352. return cmd;
  353. }
  354. /**
  355. * pmcraid_return_cmd - return a completed command block back into free pool
  356. * @cmd: pointer to the command block
  357. *
  358. * Return Value:
  359. * nothing
  360. */
  361. static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
  362. {
  363. struct pmcraid_instance *pinstance = cmd->drv_inst;
  364. unsigned long lock_flags;
  365. spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
  366. list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
  367. spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
  368. }
  369. /**
  370. * pmcraid_read_interrupts - reads IOA interrupts
  371. *
  372. * @pinstance: pointer to adapter instance structure
  373. *
  374. * Return value
  375. * interrupts read from IOA
  376. */
  377. static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
  378. {
  379. return (pinstance->interrupt_mode) ?
  380. ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
  381. ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  382. }
  383. /**
  384. * pmcraid_disable_interrupts - Masks and clears all specified interrupts
  385. *
  386. * @pinstance: pointer to per adapter instance structure
  387. * @intrs: interrupts to disable
  388. *
  389. * Return Value
  390. * None
  391. */
  392. static void pmcraid_disable_interrupts(
  393. struct pmcraid_instance *pinstance,
  394. u32 intrs
  395. )
  396. {
  397. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  398. u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
  399. iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
  400. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  401. ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  402. if (!pinstance->interrupt_mode) {
  403. iowrite32(intrs,
  404. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  405. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  406. }
  407. }
  408. /**
  409. * pmcraid_enable_interrupts - Enables specified interrupts
  410. *
  411. * @pinstance: pointer to per adapter instance structure
  412. * @intr: interrupts to enable
  413. *
  414. * Return Value
  415. * None
  416. */
  417. static void pmcraid_enable_interrupts(
  418. struct pmcraid_instance *pinstance,
  419. u32 intrs
  420. )
  421. {
  422. u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
  423. u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
  424. iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
  425. if (!pinstance->interrupt_mode) {
  426. iowrite32(~intrs,
  427. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  428. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  429. }
  430. pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
  431. ioread32(pinstance->int_regs.global_interrupt_mask_reg),
  432. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
  433. }
  434. /**
  435. * pmcraid_clr_trans_op - clear trans to op interrupt
  436. *
  437. * @pinstance: pointer to per adapter instance structure
  438. *
  439. * Return Value
  440. * None
  441. */
  442. static void pmcraid_clr_trans_op(
  443. struct pmcraid_instance *pinstance
  444. )
  445. {
  446. unsigned long lock_flags;
  447. if (!pinstance->interrupt_mode) {
  448. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  449. pinstance->int_regs.ioa_host_interrupt_mask_reg);
  450. ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  451. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  452. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  453. ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
  454. }
  455. if (pinstance->reset_cmd != NULL) {
  456. del_timer(&pinstance->reset_cmd->timer);
  457. spin_lock_irqsave(
  458. pinstance->host->host_lock, lock_flags);
  459. pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
  460. spin_unlock_irqrestore(
  461. pinstance->host->host_lock, lock_flags);
  462. }
  463. }
  464. /**
  465. * pmcraid_reset_type - Determine the required reset type
  466. * @pinstance: pointer to adapter instance structure
  467. *
  468. * IOA requires hard reset if any of the following conditions is true.
  469. * 1. If HRRQ valid interrupt is not masked
  470. * 2. IOA reset alert doorbell is set
  471. * 3. If there are any error interrupts
  472. */
  473. static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
  474. {
  475. u32 mask;
  476. u32 intrs;
  477. u32 alerts;
  478. mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
  479. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  480. alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  481. if ((mask & INTRS_HRRQ_VALID) == 0 ||
  482. (alerts & DOORBELL_IOA_RESET_ALERT) ||
  483. (intrs & PMCRAID_ERROR_INTERRUPTS)) {
  484. pmcraid_info("IOA requires hard reset\n");
  485. pinstance->ioa_hard_reset = 1;
  486. }
  487. /* If unit check is active, trigger the dump */
  488. if (intrs & INTRS_IOA_UNIT_CHECK)
  489. pinstance->ioa_unit_check = 1;
  490. }
  491. /**
  492. * pmcraid_bist_done - completion function for PCI BIST
  493. * @cmd: pointer to reset command
  494. * Return Value
  495. * none
  496. */
  497. static void pmcraid_ioa_reset(struct pmcraid_cmd *);
  498. static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
  499. {
  500. struct pmcraid_instance *pinstance = cmd->drv_inst;
  501. unsigned long lock_flags;
  502. int rc;
  503. u16 pci_reg;
  504. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  505. /* If PCI config space can't be accessed wait for another two secs */
  506. if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
  507. cmd->time_left > 0) {
  508. pmcraid_info("BIST not complete, waiting another 2 secs\n");
  509. cmd->timer.expires = jiffies + cmd->time_left;
  510. cmd->time_left = 0;
  511. cmd->timer.data = (unsigned long)cmd;
  512. cmd->timer.function =
  513. (void (*)(unsigned long))pmcraid_bist_done;
  514. add_timer(&cmd->timer);
  515. } else {
  516. cmd->time_left = 0;
  517. pmcraid_info("BIST is complete, proceeding with reset\n");
  518. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  519. pmcraid_ioa_reset(cmd);
  520. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  521. }
  522. }
  523. /**
  524. * pmcraid_start_bist - starts BIST
  525. * @cmd: pointer to reset cmd
  526. * Return Value
  527. * none
  528. */
  529. static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
  530. {
  531. struct pmcraid_instance *pinstance = cmd->drv_inst;
  532. u32 doorbells, intrs;
  533. /* proceed with bist and wait for 2 seconds */
  534. iowrite32(DOORBELL_IOA_START_BIST,
  535. pinstance->int_regs.host_ioa_interrupt_reg);
  536. doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  537. intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  538. pmcraid_info("doorbells after start bist: %x intrs: %x\n",
  539. doorbells, intrs);
  540. cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  541. cmd->timer.data = (unsigned long)cmd;
  542. cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
  543. cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
  544. add_timer(&cmd->timer);
  545. }
  546. /**
  547. * pmcraid_reset_alert_done - completion routine for reset_alert
  548. * @cmd: pointer to command block used in reset sequence
  549. * Return value
  550. * None
  551. */
  552. static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
  553. {
  554. struct pmcraid_instance *pinstance = cmd->drv_inst;
  555. u32 status = ioread32(pinstance->ioa_status);
  556. unsigned long lock_flags;
  557. /* if the critical operation in progress bit is set or the wait times
  558. * out, invoke reset engine to proceed with hard reset. If there is
  559. * some more time to wait, restart the timer
  560. */
  561. if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
  562. cmd->time_left <= 0) {
  563. pmcraid_info("critical op is reset proceeding with reset\n");
  564. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  565. pmcraid_ioa_reset(cmd);
  566. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  567. } else {
  568. pmcraid_info("critical op is not yet reset waiting again\n");
  569. /* restart timer if some more time is available to wait */
  570. cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  571. cmd->timer.data = (unsigned long)cmd;
  572. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  573. cmd->timer.function =
  574. (void (*)(unsigned long))pmcraid_reset_alert_done;
  575. add_timer(&cmd->timer);
  576. }
  577. }
  578. /**
  579. * pmcraid_reset_alert - alerts IOA for a possible reset
  580. * @cmd : command block to be used for reset sequence.
  581. *
  582. * Return Value
  583. * returns 0 if pci config-space is accessible and RESET_DOORBELL is
  584. * successfully written to IOA. Returns non-zero in case pci_config_space
  585. * is not accessible
  586. */
  587. static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
  588. static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
  589. {
  590. struct pmcraid_instance *pinstance = cmd->drv_inst;
  591. u32 doorbells;
  592. int rc;
  593. u16 pci_reg;
  594. /* If we are able to access IOA PCI config space, alert IOA that we are
  595. * going to reset it soon. This enables IOA to preserv persistent error
  596. * data if any. In case memory space is not accessible, proceed with
  597. * BIST or slot_reset
  598. */
  599. rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
  600. if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
  601. /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
  602. * reset IOA doesn't generate any interrupts when CRITICAL
  603. * OPERATION bit is reset. A timer is started to wait for this
  604. * bit to be reset.
  605. */
  606. cmd->time_left = PMCRAID_RESET_TIMEOUT;
  607. cmd->timer.data = (unsigned long)cmd;
  608. cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
  609. cmd->timer.function =
  610. (void (*)(unsigned long))pmcraid_reset_alert_done;
  611. add_timer(&cmd->timer);
  612. iowrite32(DOORBELL_IOA_RESET_ALERT,
  613. pinstance->int_regs.host_ioa_interrupt_reg);
  614. doorbells =
  615. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  616. pmcraid_info("doorbells after reset alert: %x\n", doorbells);
  617. } else {
  618. pmcraid_info("PCI config is not accessible starting BIST\n");
  619. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  620. pmcraid_start_bist(cmd);
  621. }
  622. }
  623. /**
  624. * pmcraid_timeout_handler - Timeout handler for internally generated ops
  625. *
  626. * @cmd : pointer to command structure, that got timedout
  627. *
  628. * This function blocks host requests and initiates an adapter reset.
  629. *
  630. * Return value:
  631. * None
  632. */
  633. static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
  634. {
  635. struct pmcraid_instance *pinstance = cmd->drv_inst;
  636. unsigned long lock_flags;
  637. dev_info(&pinstance->pdev->dev,
  638. "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
  639. cmd->ioa_cb->ioarcb.cdb[0]);
  640. /* Command timeouts result in hard reset sequence. The command that got
  641. * timed out may be the one used as part of reset sequence. In this
  642. * case restart reset sequence using the same command block even if
  643. * reset is in progress. Otherwise fail this command and get a free
  644. * command block to restart the reset sequence.
  645. */
  646. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  647. if (!pinstance->ioa_reset_in_progress) {
  648. pinstance->ioa_reset_attempts = 0;
  649. cmd = pmcraid_get_free_cmd(pinstance);
  650. /* If we are out of command blocks, just return here itself.
  651. * Some other command's timeout handler can do the reset job
  652. */
  653. if (cmd == NULL) {
  654. spin_unlock_irqrestore(pinstance->host->host_lock,
  655. lock_flags);
  656. pmcraid_err("no free cmnd block for timeout handler\n");
  657. return;
  658. }
  659. pinstance->reset_cmd = cmd;
  660. pinstance->ioa_reset_in_progress = 1;
  661. } else {
  662. pmcraid_info("reset is already in progress\n");
  663. if (pinstance->reset_cmd != cmd) {
  664. /* This command should have been given to IOA, this
  665. * command will be completed by fail_outstanding_cmds
  666. * anyway
  667. */
  668. pmcraid_err("cmd is pending but reset in progress\n");
  669. }
  670. /* If this command was being used as part of the reset
  671. * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
  672. * causes fail_outstanding_commands not to return the command
  673. * block back to free pool
  674. */
  675. if (cmd == pinstance->reset_cmd)
  676. cmd->cmd_done = pmcraid_ioa_reset;
  677. }
  678. /* Notify apps of important IOA bringup/bringdown sequences */
  679. if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
  680. pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
  681. pmcraid_notify_ioastate(pinstance,
  682. PMC_DEVICE_EVENT_RESET_START);
  683. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  684. scsi_block_requests(pinstance->host);
  685. pmcraid_reset_alert(cmd);
  686. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  687. }
  688. /**
  689. * pmcraid_internal_done - completion routine for internally generated cmds
  690. *
  691. * @cmd: command that got response from IOA
  692. *
  693. * Return Value:
  694. * none
  695. */
  696. static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
  697. {
  698. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  699. cmd->ioa_cb->ioarcb.cdb[0],
  700. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  701. /* Some of the internal commands are sent with callers blocking for the
  702. * response. Same will be indicated as part of cmd->completion_req
  703. * field. Response path needs to wake up any waiters waiting for cmd
  704. * completion if this flag is set.
  705. */
  706. if (cmd->completion_req) {
  707. cmd->completion_req = 0;
  708. complete(&cmd->wait_for_completion);
  709. }
  710. /* most of the internal commands are completed by caller itself, so
  711. * no need to return the command block back to free pool until we are
  712. * required to do so (e.g once done with initialization).
  713. */
  714. if (cmd->release) {
  715. cmd->release = 0;
  716. pmcraid_return_cmd(cmd);
  717. }
  718. }
  719. /**
  720. * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
  721. *
  722. * @cmd: command that got response from IOA
  723. *
  724. * This routine is called after driver re-reads configuration table due to a
  725. * lost CCN. It returns the command block back to free pool and schedules
  726. * worker thread to add/delete devices into the system.
  727. *
  728. * Return Value:
  729. * none
  730. */
  731. static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
  732. {
  733. pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
  734. cmd->ioa_cb->ioarcb.cdb[0],
  735. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  736. if (cmd->release) {
  737. cmd->release = 0;
  738. pmcraid_return_cmd(cmd);
  739. }
  740. pmcraid_info("scheduling worker for config table reinitialization\n");
  741. schedule_work(&cmd->drv_inst->worker_q);
  742. }
  743. /**
  744. * pmcraid_erp_done - Process completion of SCSI error response from device
  745. * @cmd: pmcraid_command
  746. *
  747. * This function copies the sense buffer into the scsi_cmd struct and completes
  748. * scsi_cmd by calling scsi_done function.
  749. *
  750. * Return value:
  751. * none
  752. */
  753. static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
  754. {
  755. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  756. struct pmcraid_instance *pinstance = cmd->drv_inst;
  757. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  758. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
  759. scsi_cmd->result |= (DID_ERROR << 16);
  760. scmd_printk(KERN_INFO, scsi_cmd,
  761. "command CDB[0] = %x failed with IOASC: 0x%08X\n",
  762. cmd->ioa_cb->ioarcb.cdb[0], ioasc);
  763. }
  764. /* if we had allocated sense buffers for request sense, copy the sense
  765. * release the buffers
  766. */
  767. if (cmd->sense_buffer != NULL) {
  768. memcpy(scsi_cmd->sense_buffer,
  769. cmd->sense_buffer,
  770. SCSI_SENSE_BUFFERSIZE);
  771. pci_free_consistent(pinstance->pdev,
  772. SCSI_SENSE_BUFFERSIZE,
  773. cmd->sense_buffer, cmd->sense_buffer_dma);
  774. cmd->sense_buffer = NULL;
  775. cmd->sense_buffer_dma = 0;
  776. }
  777. scsi_dma_unmap(scsi_cmd);
  778. pmcraid_return_cmd(cmd);
  779. scsi_cmd->scsi_done(scsi_cmd);
  780. }
  781. /**
  782. * pmcraid_fire_command - sends an IOA command to adapter
  783. *
  784. * This function adds the given block into pending command list
  785. * and returns without waiting
  786. *
  787. * @cmd : command to be sent to the device
  788. *
  789. * Return Value
  790. * None
  791. */
  792. static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
  793. {
  794. struct pmcraid_instance *pinstance = cmd->drv_inst;
  795. unsigned long lock_flags;
  796. /* Add this command block to pending cmd pool. We do this prior to
  797. * writting IOARCB to ioarrin because IOA might complete the command
  798. * by the time we are about to add it to the list. Response handler
  799. * (isr/tasklet) looks for cmd block in the pending pending list.
  800. */
  801. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  802. list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
  803. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  804. atomic_inc(&pinstance->outstanding_cmds);
  805. /* driver writes lower 32-bit value of IOARCB address only */
  806. mb();
  807. iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
  808. }
  809. /**
  810. * pmcraid_send_cmd - fires a command to IOA
  811. *
  812. * This function also sets up timeout function, and command completion
  813. * function
  814. *
  815. * @cmd: pointer to the command block to be fired to IOA
  816. * @cmd_done: command completion function, called once IOA responds
  817. * @timeout: timeout to wait for this command completion
  818. * @timeout_func: timeout handler
  819. *
  820. * Return value
  821. * none
  822. */
  823. static void pmcraid_send_cmd(
  824. struct pmcraid_cmd *cmd,
  825. void (*cmd_done) (struct pmcraid_cmd *),
  826. unsigned long timeout,
  827. void (*timeout_func) (struct pmcraid_cmd *)
  828. )
  829. {
  830. /* initialize done function */
  831. cmd->cmd_done = cmd_done;
  832. if (timeout_func) {
  833. /* setup timeout handler */
  834. cmd->timer.data = (unsigned long)cmd;
  835. cmd->timer.expires = jiffies + timeout;
  836. cmd->timer.function = (void (*)(unsigned long))timeout_func;
  837. add_timer(&cmd->timer);
  838. }
  839. /* fire the command to IOA */
  840. _pmcraid_fire_command(cmd);
  841. }
  842. /**
  843. * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
  844. * @cmd: pointer to the command block used for sending IOA shutdown command
  845. *
  846. * Return value
  847. * None
  848. */
  849. static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
  850. {
  851. struct pmcraid_instance *pinstance = cmd->drv_inst;
  852. unsigned long lock_flags;
  853. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  854. pmcraid_ioa_reset(cmd);
  855. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  856. }
  857. /**
  858. * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
  859. *
  860. * @cmd: pointer to the command block used as part of reset sequence
  861. *
  862. * Return Value
  863. * None
  864. */
  865. static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
  866. {
  867. pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
  868. cmd->ioa_cb->ioarcb.cdb[0],
  869. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  870. /* Note that commands sent during reset require next command to be sent
  871. * to IOA. Hence reinit the done function as well as timeout function
  872. */
  873. pmcraid_reinit_cmdblk(cmd);
  874. cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
  875. cmd->ioa_cb->ioarcb.resource_handle =
  876. cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  877. cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
  878. cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
  879. /* fire shutdown command to hardware. */
  880. pmcraid_info("firing normal shutdown command (%d) to IOA\n",
  881. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
  882. pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
  883. pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
  884. PMCRAID_SHUTDOWN_TIMEOUT,
  885. pmcraid_timeout_handler);
  886. }
  887. /**
  888. * pmcraid_get_fwversion_done - completion function for get_fwversion
  889. *
  890. * @cmd: pointer to command block used to send INQUIRY command
  891. *
  892. * Return Value
  893. * none
  894. */
  895. static void pmcraid_querycfg(struct pmcraid_cmd *);
  896. static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
  897. {
  898. struct pmcraid_instance *pinstance = cmd->drv_inst;
  899. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  900. unsigned long lock_flags;
  901. /* configuration table entry size depends on firmware version. If fw
  902. * version is not known, it is not possible to interpret IOA config
  903. * table
  904. */
  905. if (ioasc) {
  906. pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
  907. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  908. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  909. pmcraid_reset_alert(cmd);
  910. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  911. } else {
  912. pmcraid_querycfg(cmd);
  913. }
  914. }
  915. /**
  916. * pmcraid_get_fwversion - reads firmware version information
  917. *
  918. * @cmd: pointer to command block used to send INQUIRY command
  919. *
  920. * Return Value
  921. * none
  922. */
  923. static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
  924. {
  925. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  926. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  927. struct pmcraid_instance *pinstance = cmd->drv_inst;
  928. u16 data_size = sizeof(struct pmcraid_inquiry_data);
  929. pmcraid_reinit_cmdblk(cmd);
  930. ioarcb->request_type = REQ_TYPE_SCSI;
  931. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  932. ioarcb->cdb[0] = INQUIRY;
  933. ioarcb->cdb[1] = 1;
  934. ioarcb->cdb[2] = 0xD0;
  935. ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
  936. ioarcb->cdb[4] = data_size & 0xFF;
  937. /* Since entire inquiry data it can be part of IOARCB itself
  938. */
  939. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  940. offsetof(struct pmcraid_ioarcb,
  941. add_data.u.ioadl[0]));
  942. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  943. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  944. ioarcb->request_flags0 |= NO_LINK_DESCS;
  945. ioarcb->data_transfer_length = cpu_to_le32(data_size);
  946. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  947. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  948. ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
  949. ioadl->data_len = cpu_to_le32(data_size);
  950. pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
  951. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  952. }
  953. /**
  954. * pmcraid_identify_hrrq - registers host rrq buffers with IOA
  955. * @cmd: pointer to command block to be used for identify hrrq
  956. *
  957. * Return Value
  958. * none
  959. */
  960. static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
  961. {
  962. struct pmcraid_instance *pinstance = cmd->drv_inst;
  963. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  964. int index = cmd->hrrq_index;
  965. __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
  966. __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
  967. void (*done_function)(struct pmcraid_cmd *);
  968. pmcraid_reinit_cmdblk(cmd);
  969. cmd->hrrq_index = index + 1;
  970. if (cmd->hrrq_index < pinstance->num_hrrq) {
  971. done_function = pmcraid_identify_hrrq;
  972. } else {
  973. cmd->hrrq_index = 0;
  974. done_function = pmcraid_get_fwversion;
  975. }
  976. /* Initialize ioarcb */
  977. ioarcb->request_type = REQ_TYPE_IOACMD;
  978. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  979. /* initialize the hrrq number where IOA will respond to this command */
  980. ioarcb->hrrq_id = index;
  981. ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
  982. ioarcb->cdb[1] = index;
  983. /* IOA expects 64-bit pci address to be written in B.E format
  984. * (i.e cdb[2]=MSByte..cdb[9]=LSB.
  985. */
  986. pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
  987. hrrq_addr, ioarcb->ioarcb_bus_addr, index);
  988. memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
  989. memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
  990. /* Subsequent commands require HRRQ identification to be successful.
  991. * Note that this gets called even during reset from SCSI mid-layer
  992. * or tasklet
  993. */
  994. pmcraid_send_cmd(cmd, done_function,
  995. PMCRAID_INTERNAL_TIMEOUT,
  996. pmcraid_timeout_handler);
  997. }
  998. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
  999. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
  1000. /**
  1001. * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
  1002. *
  1003. * @cmd: initialized command block pointer
  1004. *
  1005. * Return Value
  1006. * none
  1007. */
  1008. static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
  1009. {
  1010. if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
  1011. atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
  1012. else
  1013. atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
  1014. pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
  1015. }
  1016. /**
  1017. * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
  1018. *
  1019. * @pinstance: pointer to adapter instance structure
  1020. * @type: HCAM type
  1021. *
  1022. * Return Value
  1023. * pointer to initialized pmcraid_cmd structure or NULL
  1024. */
  1025. static struct pmcraid_cmd *pmcraid_init_hcam
  1026. (
  1027. struct pmcraid_instance *pinstance,
  1028. u8 type
  1029. )
  1030. {
  1031. struct pmcraid_cmd *cmd;
  1032. struct pmcraid_ioarcb *ioarcb;
  1033. struct pmcraid_ioadl_desc *ioadl;
  1034. struct pmcraid_hostrcb *hcam;
  1035. void (*cmd_done) (struct pmcraid_cmd *);
  1036. dma_addr_t dma;
  1037. int rcb_size;
  1038. cmd = pmcraid_get_free_cmd(pinstance);
  1039. if (!cmd) {
  1040. pmcraid_err("no free command blocks for hcam\n");
  1041. return cmd;
  1042. }
  1043. if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
  1044. rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
  1045. cmd_done = pmcraid_process_ccn;
  1046. dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
  1047. hcam = &pinstance->ccn;
  1048. } else {
  1049. rcb_size = sizeof(struct pmcraid_hcam_ldn);
  1050. cmd_done = pmcraid_process_ldn;
  1051. dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
  1052. hcam = &pinstance->ldn;
  1053. }
  1054. /* initialize command pointer used for HCAM registration */
  1055. hcam->cmd = cmd;
  1056. ioarcb = &cmd->ioa_cb->ioarcb;
  1057. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  1058. offsetof(struct pmcraid_ioarcb,
  1059. add_data.u.ioadl[0]));
  1060. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  1061. ioadl = ioarcb->add_data.u.ioadl;
  1062. /* Initialize ioarcb */
  1063. ioarcb->request_type = REQ_TYPE_HCAM;
  1064. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  1065. ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
  1066. ioarcb->cdb[1] = type;
  1067. ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
  1068. ioarcb->cdb[8] = (rcb_size) & 0xFF;
  1069. ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
  1070. ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
  1071. ioadl[0].data_len = cpu_to_le32(rcb_size);
  1072. ioadl[0].address = cpu_to_le64(dma);
  1073. cmd->cmd_done = cmd_done;
  1074. return cmd;
  1075. }
  1076. /**
  1077. * pmcraid_send_hcam - Send an HCAM to IOA
  1078. * @pinstance: ioa config struct
  1079. * @type: HCAM type
  1080. *
  1081. * This function will send a Host Controlled Async command to IOA.
  1082. *
  1083. * Return value:
  1084. * none
  1085. */
  1086. static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
  1087. {
  1088. struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
  1089. pmcraid_send_hcam_cmd(cmd);
  1090. }
  1091. /**
  1092. * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
  1093. *
  1094. * @cmd: pointer to cmd that is used as cancelling command
  1095. * @cmd_to_cancel: pointer to the command that needs to be cancelled
  1096. */
  1097. static void pmcraid_prepare_cancel_cmd(
  1098. struct pmcraid_cmd *cmd,
  1099. struct pmcraid_cmd *cmd_to_cancel
  1100. )
  1101. {
  1102. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  1103. __be64 ioarcb_addr;
  1104. /* IOARCB address of the command to be cancelled is given in
  1105. * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
  1106. * IOARCB address are not masked.
  1107. */
  1108. ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
  1109. /* Get the resource handle to where the command to be aborted has been
  1110. * sent.
  1111. */
  1112. ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
  1113. ioarcb->request_type = REQ_TYPE_IOACMD;
  1114. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  1115. ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
  1116. memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
  1117. }
  1118. /**
  1119. * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
  1120. *
  1121. * @cmd: command to be used as cancelling command
  1122. * @type: HCAM type
  1123. * @cmd_done: op done function for the cancelling command
  1124. */
  1125. static void pmcraid_cancel_hcam(
  1126. struct pmcraid_cmd *cmd,
  1127. u8 type,
  1128. void (*cmd_done) (struct pmcraid_cmd *)
  1129. )
  1130. {
  1131. struct pmcraid_instance *pinstance;
  1132. struct pmcraid_hostrcb *hcam;
  1133. pinstance = cmd->drv_inst;
  1134. hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
  1135. &pinstance->ldn : &pinstance->ccn;
  1136. /* prepare for cancelling previous hcam command. If the HCAM is
  1137. * currently not pending with IOA, we would have hcam->cmd as non-null
  1138. */
  1139. if (hcam->cmd == NULL)
  1140. return;
  1141. pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
  1142. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  1143. * schedule queuecommand while we are doing this
  1144. */
  1145. pmcraid_send_cmd(cmd, cmd_done,
  1146. PMCRAID_INTERNAL_TIMEOUT,
  1147. pmcraid_timeout_handler);
  1148. }
  1149. /**
  1150. * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
  1151. *
  1152. * @cmd: command block to be used for cancelling the HCAM
  1153. */
  1154. static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
  1155. {
  1156. pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
  1157. cmd->ioa_cb->ioarcb.cdb[0],
  1158. le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
  1159. pmcraid_reinit_cmdblk(cmd);
  1160. pmcraid_cancel_hcam(cmd,
  1161. PMCRAID_HCAM_CODE_CONFIG_CHANGE,
  1162. pmcraid_ioa_shutdown);
  1163. }
  1164. /**
  1165. * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
  1166. *
  1167. * @cmd: command block to be used for cancelling the HCAM
  1168. */
  1169. static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
  1170. {
  1171. pmcraid_cancel_hcam(cmd,
  1172. PMCRAID_HCAM_CODE_LOG_DATA,
  1173. pmcraid_cancel_ccn);
  1174. }
  1175. /**
  1176. * pmcraid_expose_resource - check if the resource can be exposed to OS
  1177. *
  1178. * @fw_version: firmware version code
  1179. * @cfgte: pointer to configuration table entry of the resource
  1180. *
  1181. * Return value:
  1182. * true if resource can be added to midlayer, false(0) otherwise
  1183. */
  1184. static int pmcraid_expose_resource(u16 fw_version,
  1185. struct pmcraid_config_table_entry *cfgte)
  1186. {
  1187. int retval = 0;
  1188. if (cfgte->resource_type == RES_TYPE_VSET) {
  1189. if (fw_version <= PMCRAID_FW_VERSION_1)
  1190. retval = ((cfgte->unique_flags1 & 0x80) == 0);
  1191. else
  1192. retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
  1193. (cfgte->unique_flags1 & 0x80) == 0);
  1194. } else if (cfgte->resource_type == RES_TYPE_GSCSI)
  1195. retval = (RES_BUS(cfgte->resource_address) !=
  1196. PMCRAID_VIRTUAL_ENCL_BUS_ID);
  1197. return retval;
  1198. }
  1199. /* attributes supported by pmcraid_event_family */
  1200. enum {
  1201. PMCRAID_AEN_ATTR_UNSPEC,
  1202. PMCRAID_AEN_ATTR_EVENT,
  1203. __PMCRAID_AEN_ATTR_MAX,
  1204. };
  1205. #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
  1206. /* commands supported by pmcraid_event_family */
  1207. enum {
  1208. PMCRAID_AEN_CMD_UNSPEC,
  1209. PMCRAID_AEN_CMD_EVENT,
  1210. __PMCRAID_AEN_CMD_MAX,
  1211. };
  1212. #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
  1213. static struct genl_multicast_group pmcraid_mcgrps[] = {
  1214. { .name = "events", /* not really used - see ID discussion below */ },
  1215. };
  1216. static struct genl_family pmcraid_event_family __ro_after_init = {
  1217. .module = THIS_MODULE,
  1218. .name = "pmcraid",
  1219. .version = 1,
  1220. .maxattr = PMCRAID_AEN_ATTR_MAX,
  1221. .mcgrps = pmcraid_mcgrps,
  1222. .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
  1223. };
  1224. /**
  1225. * pmcraid_netlink_init - registers pmcraid_event_family
  1226. *
  1227. * Return value:
  1228. * 0 if the pmcraid_event_family is successfully registered
  1229. * with netlink generic, non-zero otherwise
  1230. */
  1231. static int __init pmcraid_netlink_init(void)
  1232. {
  1233. int result;
  1234. result = genl_register_family(&pmcraid_event_family);
  1235. if (result)
  1236. return result;
  1237. pmcraid_info("registered NETLINK GENERIC group: %d\n",
  1238. pmcraid_event_family.id);
  1239. return result;
  1240. }
  1241. /**
  1242. * pmcraid_netlink_release - unregisters pmcraid_event_family
  1243. *
  1244. * Return value:
  1245. * none
  1246. */
  1247. static void pmcraid_netlink_release(void)
  1248. {
  1249. genl_unregister_family(&pmcraid_event_family);
  1250. }
  1251. /**
  1252. * pmcraid_notify_aen - sends event msg to user space application
  1253. * @pinstance: pointer to adapter instance structure
  1254. * @type: HCAM type
  1255. *
  1256. * Return value:
  1257. * 0 if success, error value in case of any failure.
  1258. */
  1259. static int pmcraid_notify_aen(
  1260. struct pmcraid_instance *pinstance,
  1261. struct pmcraid_aen_msg *aen_msg,
  1262. u32 data_size
  1263. )
  1264. {
  1265. struct sk_buff *skb;
  1266. void *msg_header;
  1267. u32 total_size, nla_genl_hdr_total_size;
  1268. int result;
  1269. aen_msg->hostno = (pinstance->host->unique_id << 16 |
  1270. MINOR(pinstance->cdev.dev));
  1271. aen_msg->length = data_size;
  1272. data_size += sizeof(*aen_msg);
  1273. total_size = nla_total_size(data_size);
  1274. /* Add GENL_HDR to total_size */
  1275. nla_genl_hdr_total_size =
  1276. (total_size + (GENL_HDRLEN +
  1277. ((struct genl_family *)&pmcraid_event_family)->hdrsize)
  1278. + NLMSG_HDRLEN);
  1279. skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
  1280. if (!skb) {
  1281. pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
  1282. total_size);
  1283. return -ENOMEM;
  1284. }
  1285. /* add the genetlink message header */
  1286. msg_header = genlmsg_put(skb, 0, 0,
  1287. &pmcraid_event_family, 0,
  1288. PMCRAID_AEN_CMD_EVENT);
  1289. if (!msg_header) {
  1290. pmcraid_err("failed to copy command details\n");
  1291. nlmsg_free(skb);
  1292. return -ENOMEM;
  1293. }
  1294. result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
  1295. if (result) {
  1296. pmcraid_err("failed to copy AEN attribute data\n");
  1297. nlmsg_free(skb);
  1298. return -EINVAL;
  1299. }
  1300. /* send genetlink multicast message to notify appplications */
  1301. genlmsg_end(skb, msg_header);
  1302. result = genlmsg_multicast(&pmcraid_event_family, skb,
  1303. 0, 0, GFP_ATOMIC);
  1304. /* If there are no listeners, genlmsg_multicast may return non-zero
  1305. * value.
  1306. */
  1307. if (result)
  1308. pmcraid_info("error (%x) sending aen event message\n", result);
  1309. return result;
  1310. }
  1311. /**
  1312. * pmcraid_notify_ccn - notifies about CCN event msg to user space
  1313. * @pinstance: pointer adapter instance structure
  1314. *
  1315. * Return value:
  1316. * 0 if success, error value in case of any failure
  1317. */
  1318. static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
  1319. {
  1320. return pmcraid_notify_aen(pinstance,
  1321. pinstance->ccn.msg,
  1322. le32_to_cpu(pinstance->ccn.hcam->data_len) +
  1323. sizeof(struct pmcraid_hcam_hdr));
  1324. }
  1325. /**
  1326. * pmcraid_notify_ldn - notifies about CCN event msg to user space
  1327. * @pinstance: pointer adapter instance structure
  1328. *
  1329. * Return value:
  1330. * 0 if success, error value in case of any failure
  1331. */
  1332. static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
  1333. {
  1334. return pmcraid_notify_aen(pinstance,
  1335. pinstance->ldn.msg,
  1336. le32_to_cpu(pinstance->ldn.hcam->data_len) +
  1337. sizeof(struct pmcraid_hcam_hdr));
  1338. }
  1339. /**
  1340. * pmcraid_notify_ioastate - sends IOA state event msg to user space
  1341. * @pinstance: pointer adapter instance structure
  1342. * @evt: controller state event to be sent
  1343. *
  1344. * Return value:
  1345. * 0 if success, error value in case of any failure
  1346. */
  1347. static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
  1348. {
  1349. pinstance->scn.ioa_state = evt;
  1350. pmcraid_notify_aen(pinstance,
  1351. &pinstance->scn.msg,
  1352. sizeof(u32));
  1353. }
  1354. /**
  1355. * pmcraid_handle_config_change - Handle a config change from the adapter
  1356. * @pinstance: pointer to per adapter instance structure
  1357. *
  1358. * Return value:
  1359. * none
  1360. */
  1361. static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
  1362. {
  1363. struct pmcraid_config_table_entry *cfg_entry;
  1364. struct pmcraid_hcam_ccn *ccn_hcam;
  1365. struct pmcraid_cmd *cmd;
  1366. struct pmcraid_cmd *cfgcmd;
  1367. struct pmcraid_resource_entry *res = NULL;
  1368. unsigned long lock_flags;
  1369. unsigned long host_lock_flags;
  1370. u32 new_entry = 1;
  1371. u32 hidden_entry = 0;
  1372. u16 fw_version;
  1373. int rc;
  1374. ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
  1375. cfg_entry = &ccn_hcam->cfg_entry;
  1376. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  1377. pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
  1378. res: %x:%x:%x:%x\n",
  1379. le32_to_cpu(pinstance->ccn.hcam->ilid),
  1380. pinstance->ccn.hcam->op_code,
  1381. (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
  1382. ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
  1383. pinstance->ccn.hcam->notification_type,
  1384. pinstance->ccn.hcam->notification_lost,
  1385. pinstance->ccn.hcam->flags,
  1386. pinstance->host->unique_id,
  1387. RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
  1388. (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
  1389. RES_BUS(cfg_entry->resource_address)),
  1390. RES_IS_VSET(*cfg_entry) ?
  1391. (fw_version <= PMCRAID_FW_VERSION_1 ?
  1392. cfg_entry->unique_flags1 :
  1393. le16_to_cpu(cfg_entry->array_id) & 0xFF) :
  1394. RES_TARGET(cfg_entry->resource_address),
  1395. RES_LUN(cfg_entry->resource_address));
  1396. /* If this HCAM indicates a lost notification, read the config table */
  1397. if (pinstance->ccn.hcam->notification_lost) {
  1398. cfgcmd = pmcraid_get_free_cmd(pinstance);
  1399. if (cfgcmd) {
  1400. pmcraid_info("lost CCN, reading config table\b");
  1401. pinstance->reinit_cfg_table = 1;
  1402. pmcraid_querycfg(cfgcmd);
  1403. } else {
  1404. pmcraid_err("lost CCN, no free cmd for querycfg\n");
  1405. }
  1406. goto out_notify_apps;
  1407. }
  1408. /* If this resource is not going to be added to mid-layer, just notify
  1409. * applications and return. If this notification is about hiding a VSET
  1410. * resource, check if it was exposed already.
  1411. */
  1412. if (pinstance->ccn.hcam->notification_type ==
  1413. NOTIFICATION_TYPE_ENTRY_CHANGED &&
  1414. cfg_entry->resource_type == RES_TYPE_VSET) {
  1415. hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
  1416. } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
  1417. goto out_notify_apps;
  1418. }
  1419. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  1420. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  1421. rc = memcmp(&res->cfg_entry.resource_address,
  1422. &cfg_entry->resource_address,
  1423. sizeof(cfg_entry->resource_address));
  1424. if (!rc) {
  1425. new_entry = 0;
  1426. break;
  1427. }
  1428. }
  1429. if (new_entry) {
  1430. if (hidden_entry) {
  1431. spin_unlock_irqrestore(&pinstance->resource_lock,
  1432. lock_flags);
  1433. goto out_notify_apps;
  1434. }
  1435. /* If there are more number of resources than what driver can
  1436. * manage, do not notify the applications about the CCN. Just
  1437. * ignore this notifications and re-register the same HCAM
  1438. */
  1439. if (list_empty(&pinstance->free_res_q)) {
  1440. spin_unlock_irqrestore(&pinstance->resource_lock,
  1441. lock_flags);
  1442. pmcraid_err("too many resources attached\n");
  1443. spin_lock_irqsave(pinstance->host->host_lock,
  1444. host_lock_flags);
  1445. pmcraid_send_hcam(pinstance,
  1446. PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1447. spin_unlock_irqrestore(pinstance->host->host_lock,
  1448. host_lock_flags);
  1449. return;
  1450. }
  1451. res = list_entry(pinstance->free_res_q.next,
  1452. struct pmcraid_resource_entry, queue);
  1453. list_del(&res->queue);
  1454. res->scsi_dev = NULL;
  1455. res->reset_progress = 0;
  1456. list_add_tail(&res->queue, &pinstance->used_res_q);
  1457. }
  1458. memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
  1459. if (pinstance->ccn.hcam->notification_type ==
  1460. NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
  1461. if (res->scsi_dev) {
  1462. if (fw_version <= PMCRAID_FW_VERSION_1)
  1463. res->cfg_entry.unique_flags1 &= 0x7F;
  1464. else
  1465. res->cfg_entry.array_id &= cpu_to_le16(0xFF);
  1466. res->change_detected = RES_CHANGE_DEL;
  1467. res->cfg_entry.resource_handle =
  1468. PMCRAID_INVALID_RES_HANDLE;
  1469. schedule_work(&pinstance->worker_q);
  1470. } else {
  1471. /* This may be one of the non-exposed resources */
  1472. list_move_tail(&res->queue, &pinstance->free_res_q);
  1473. }
  1474. } else if (!res->scsi_dev) {
  1475. res->change_detected = RES_CHANGE_ADD;
  1476. schedule_work(&pinstance->worker_q);
  1477. }
  1478. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  1479. out_notify_apps:
  1480. /* Notify configuration changes to registered applications.*/
  1481. if (!pmcraid_disable_aen)
  1482. pmcraid_notify_ccn(pinstance);
  1483. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1484. if (cmd)
  1485. pmcraid_send_hcam_cmd(cmd);
  1486. }
  1487. /**
  1488. * pmcraid_get_error_info - return error string for an ioasc
  1489. * @ioasc: ioasc code
  1490. * Return Value
  1491. * none
  1492. */
  1493. static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
  1494. {
  1495. int i;
  1496. for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
  1497. if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
  1498. return &pmcraid_ioasc_error_table[i];
  1499. }
  1500. return NULL;
  1501. }
  1502. /**
  1503. * pmcraid_ioasc_logger - log IOASC information based user-settings
  1504. * @ioasc: ioasc code
  1505. * @cmd: pointer to command that resulted in 'ioasc'
  1506. */
  1507. static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
  1508. {
  1509. struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
  1510. if (error_info == NULL ||
  1511. cmd->drv_inst->current_log_level < error_info->log_level)
  1512. return;
  1513. /* log the error string */
  1514. pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
  1515. cmd->ioa_cb->ioarcb.cdb[0],
  1516. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  1517. ioasc, error_info->error_string);
  1518. }
  1519. /**
  1520. * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
  1521. *
  1522. * @pinstance: pointer to per adapter instance structure
  1523. *
  1524. * Return value:
  1525. * none
  1526. */
  1527. static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
  1528. {
  1529. struct pmcraid_hcam_ldn *hcam_ldn;
  1530. u32 ioasc;
  1531. hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1532. pmcraid_info
  1533. ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
  1534. pinstance->ldn.hcam->ilid,
  1535. pinstance->ldn.hcam->op_code,
  1536. pinstance->ldn.hcam->notification_type,
  1537. pinstance->ldn.hcam->notification_lost,
  1538. pinstance->ldn.hcam->flags,
  1539. pinstance->ldn.hcam->overlay_id);
  1540. /* log only the errors, no need to log informational log entries */
  1541. if (pinstance->ldn.hcam->notification_type !=
  1542. NOTIFICATION_TYPE_ERROR_LOG)
  1543. return;
  1544. if (pinstance->ldn.hcam->notification_lost ==
  1545. HOSTRCB_NOTIFICATIONS_LOST)
  1546. dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
  1547. ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
  1548. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  1549. ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
  1550. dev_info(&pinstance->pdev->dev,
  1551. "UnitAttention due to IOA Bus Reset\n");
  1552. scsi_report_bus_reset(
  1553. pinstance->host,
  1554. RES_BUS(hcam_ldn->error_log.fd_ra));
  1555. }
  1556. return;
  1557. }
  1558. /**
  1559. * pmcraid_process_ccn - Op done function for a CCN.
  1560. * @cmd: pointer to command struct
  1561. *
  1562. * This function is the op done function for a configuration
  1563. * change notification
  1564. *
  1565. * Return value:
  1566. * none
  1567. */
  1568. static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
  1569. {
  1570. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1571. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1572. unsigned long lock_flags;
  1573. pinstance->ccn.cmd = NULL;
  1574. pmcraid_return_cmd(cmd);
  1575. /* If driver initiated IOA reset happened while this hcam was pending
  1576. * with IOA, or IOA bringdown sequence is in progress, no need to
  1577. * re-register the hcam
  1578. */
  1579. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1580. atomic_read(&pinstance->ccn.ignore) == 1) {
  1581. return;
  1582. } else if (ioasc) {
  1583. dev_info(&pinstance->pdev->dev,
  1584. "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
  1585. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  1586. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1587. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  1588. } else {
  1589. pmcraid_handle_config_change(pinstance);
  1590. }
  1591. }
  1592. /**
  1593. * pmcraid_process_ldn - op done function for an LDN
  1594. * @cmd: pointer to command block
  1595. *
  1596. * Return value
  1597. * none
  1598. */
  1599. static void pmcraid_initiate_reset(struct pmcraid_instance *);
  1600. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
  1601. static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
  1602. {
  1603. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1604. struct pmcraid_hcam_ldn *ldn_hcam =
  1605. (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
  1606. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  1607. u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
  1608. unsigned long lock_flags;
  1609. /* return the command block back to freepool */
  1610. pinstance->ldn.cmd = NULL;
  1611. pmcraid_return_cmd(cmd);
  1612. /* If driver initiated IOA reset happened while this hcam was pending
  1613. * with IOA, no need to re-register the hcam as reset engine will do it
  1614. * once reset sequence is complete
  1615. */
  1616. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  1617. atomic_read(&pinstance->ccn.ignore) == 1) {
  1618. return;
  1619. } else if (!ioasc) {
  1620. pmcraid_handle_error_log(pinstance);
  1621. if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
  1622. spin_lock_irqsave(pinstance->host->host_lock,
  1623. lock_flags);
  1624. pmcraid_initiate_reset(pinstance);
  1625. spin_unlock_irqrestore(pinstance->host->host_lock,
  1626. lock_flags);
  1627. return;
  1628. }
  1629. if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
  1630. pinstance->timestamp_error = 1;
  1631. pmcraid_set_timestamp(cmd);
  1632. }
  1633. } else {
  1634. dev_info(&pinstance->pdev->dev,
  1635. "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
  1636. }
  1637. /* send netlink message for HCAM notification if enabled */
  1638. if (!pmcraid_disable_aen)
  1639. pmcraid_notify_ldn(pinstance);
  1640. cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1641. if (cmd)
  1642. pmcraid_send_hcam_cmd(cmd);
  1643. }
  1644. /**
  1645. * pmcraid_register_hcams - register HCAMs for CCN and LDN
  1646. *
  1647. * @pinstance: pointer per adapter instance structure
  1648. *
  1649. * Return Value
  1650. * none
  1651. */
  1652. static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
  1653. {
  1654. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
  1655. pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
  1656. }
  1657. /**
  1658. * pmcraid_unregister_hcams - cancel HCAMs registered already
  1659. * @cmd: pointer to command used as part of reset sequence
  1660. */
  1661. static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
  1662. {
  1663. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1664. /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
  1665. * handling hcam response though it is not necessary. In order to
  1666. * prevent this, set 'ignore', so that bring-down sequence doesn't
  1667. * re-send any more hcams
  1668. */
  1669. atomic_set(&pinstance->ccn.ignore, 1);
  1670. atomic_set(&pinstance->ldn.ignore, 1);
  1671. /* If adapter reset was forced as part of runtime reset sequence,
  1672. * start the reset sequence. Reset will be triggered even in case
  1673. * IOA unit_check.
  1674. */
  1675. if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
  1676. pinstance->ioa_unit_check) {
  1677. pinstance->force_ioa_reset = 0;
  1678. pinstance->ioa_unit_check = 0;
  1679. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1680. pmcraid_reset_alert(cmd);
  1681. return;
  1682. }
  1683. /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
  1684. * one after the other. So CCN cancellation will be triggered by
  1685. * pmcraid_cancel_ldn itself.
  1686. */
  1687. pmcraid_cancel_ldn(cmd);
  1688. }
  1689. /**
  1690. * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
  1691. * @pinstance: pointer to adapter instance structure
  1692. * Return Value
  1693. * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
  1694. */
  1695. static void pmcraid_reinit_buffers(struct pmcraid_instance *);
  1696. static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
  1697. {
  1698. u32 intrs;
  1699. pmcraid_reinit_buffers(pinstance);
  1700. intrs = pmcraid_read_interrupts(pinstance);
  1701. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  1702. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  1703. if (!pinstance->interrupt_mode) {
  1704. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1705. pinstance->int_regs.
  1706. ioa_host_interrupt_mask_reg);
  1707. iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
  1708. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  1709. }
  1710. return 1;
  1711. } else {
  1712. return 0;
  1713. }
  1714. }
  1715. /**
  1716. * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
  1717. * @cmd : pointer to reset command block
  1718. *
  1719. * Return Value
  1720. * none
  1721. */
  1722. static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
  1723. {
  1724. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1725. u32 int_reg;
  1726. u32 doorbell;
  1727. /* There will be an interrupt when Transition to Operational bit is
  1728. * set so tasklet would execute next reset task. The timeout handler
  1729. * would re-initiate a reset
  1730. */
  1731. cmd->cmd_done = pmcraid_ioa_reset;
  1732. cmd->timer.data = (unsigned long)cmd;
  1733. cmd->timer.expires = jiffies +
  1734. msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
  1735. cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
  1736. if (!timer_pending(&cmd->timer))
  1737. add_timer(&cmd->timer);
  1738. /* Enable destructive diagnostics on IOA if it is not yet in
  1739. * operational state
  1740. */
  1741. doorbell = DOORBELL_RUNTIME_RESET |
  1742. DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
  1743. /* Since we do RESET_ALERT and Start BIST we have to again write
  1744. * MSIX Doorbell to indicate the interrupt mode
  1745. */
  1746. if (pinstance->interrupt_mode) {
  1747. iowrite32(DOORBELL_INTR_MODE_MSIX,
  1748. pinstance->int_regs.host_ioa_interrupt_reg);
  1749. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  1750. }
  1751. iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
  1752. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1753. int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
  1754. pmcraid_info("Waiting for IOA to become operational %x:%x\n",
  1755. ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
  1756. int_reg);
  1757. }
  1758. /**
  1759. * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
  1760. *
  1761. * @pinstance: pointer to adapter instance structure
  1762. *
  1763. * Return Value
  1764. * none
  1765. */
  1766. static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
  1767. {
  1768. pmcraid_info("%s is not yet implemented\n", __func__);
  1769. }
  1770. /**
  1771. * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
  1772. * @pinstance: pointer to adapter instance structure
  1773. *
  1774. * This function fails all outstanding ops. If they are submitted to IOA
  1775. * already, it sends cancel all messages if IOA is still accepting IOARCBs,
  1776. * otherwise just completes the commands and returns the cmd blocks to free
  1777. * pool.
  1778. *
  1779. * Return value:
  1780. * none
  1781. */
  1782. static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
  1783. {
  1784. struct pmcraid_cmd *cmd, *temp;
  1785. unsigned long lock_flags;
  1786. /* pending command list is protected by pending_pool_lock. Its
  1787. * traversal must be done as within this lock
  1788. */
  1789. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1790. list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
  1791. free_list) {
  1792. list_del(&cmd->free_list);
  1793. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  1794. lock_flags);
  1795. cmd->ioa_cb->ioasa.ioasc =
  1796. cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
  1797. cmd->ioa_cb->ioasa.ilid =
  1798. cpu_to_le32(PMCRAID_DRIVER_ILID);
  1799. /* In case the command timer is still running */
  1800. del_timer(&cmd->timer);
  1801. /* If this is an IO command, complete it by invoking scsi_done
  1802. * function. If this is one of the internal commands other
  1803. * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
  1804. * complete it
  1805. */
  1806. if (cmd->scsi_cmd) {
  1807. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  1808. __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
  1809. scsi_cmd->result |= DID_ERROR << 16;
  1810. scsi_dma_unmap(scsi_cmd);
  1811. pmcraid_return_cmd(cmd);
  1812. pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
  1813. le32_to_cpu(resp) >> 2,
  1814. cmd->ioa_cb->ioarcb.cdb[0],
  1815. scsi_cmd->result);
  1816. scsi_cmd->scsi_done(scsi_cmd);
  1817. } else if (cmd->cmd_done == pmcraid_internal_done ||
  1818. cmd->cmd_done == pmcraid_erp_done) {
  1819. cmd->cmd_done(cmd);
  1820. } else if (cmd->cmd_done != pmcraid_ioa_reset &&
  1821. cmd->cmd_done != pmcraid_ioa_shutdown_done) {
  1822. pmcraid_return_cmd(cmd);
  1823. }
  1824. atomic_dec(&pinstance->outstanding_cmds);
  1825. spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
  1826. }
  1827. spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
  1828. }
  1829. /**
  1830. * pmcraid_ioa_reset - Implementation of IOA reset logic
  1831. *
  1832. * @cmd: pointer to the cmd block to be used for entire reset process
  1833. *
  1834. * This function executes most of the steps required for IOA reset. This gets
  1835. * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
  1836. * 'eh_' thread. Access to variables used for controlling the reset sequence is
  1837. * synchronized using host lock. Various functions called during reset process
  1838. * would make use of a single command block, pointer to which is also stored in
  1839. * adapter instance structure.
  1840. *
  1841. * Return Value
  1842. * None
  1843. */
  1844. static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
  1845. {
  1846. struct pmcraid_instance *pinstance = cmd->drv_inst;
  1847. u8 reset_complete = 0;
  1848. pinstance->ioa_reset_in_progress = 1;
  1849. if (pinstance->reset_cmd != cmd) {
  1850. pmcraid_err("reset is called with different command block\n");
  1851. pinstance->reset_cmd = cmd;
  1852. }
  1853. pmcraid_info("reset_engine: state = %d, command = %p\n",
  1854. pinstance->ioa_state, cmd);
  1855. switch (pinstance->ioa_state) {
  1856. case IOA_STATE_DEAD:
  1857. /* If IOA is offline, whatever may be the reset reason, just
  1858. * return. callers might be waiting on the reset wait_q, wake
  1859. * up them
  1860. */
  1861. pmcraid_err("IOA is offline no reset is possible\n");
  1862. reset_complete = 1;
  1863. break;
  1864. case IOA_STATE_IN_BRINGDOWN:
  1865. /* we enter here, once ioa shutdown command is processed by IOA
  1866. * Alert IOA for a possible reset. If reset alert fails, IOA
  1867. * goes through hard-reset
  1868. */
  1869. pmcraid_disable_interrupts(pinstance, ~0);
  1870. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1871. pmcraid_reset_alert(cmd);
  1872. break;
  1873. case IOA_STATE_UNKNOWN:
  1874. /* We may be called during probe or resume. Some pre-processing
  1875. * is required for prior to reset
  1876. */
  1877. scsi_block_requests(pinstance->host);
  1878. /* If asked to reset while IOA was processing responses or
  1879. * there are any error responses then IOA may require
  1880. * hard-reset.
  1881. */
  1882. if (pinstance->ioa_hard_reset == 0) {
  1883. if (ioread32(pinstance->ioa_status) &
  1884. INTRS_TRANSITION_TO_OPERATIONAL) {
  1885. pmcraid_info("sticky bit set, bring-up\n");
  1886. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1887. pmcraid_reinit_cmdblk(cmd);
  1888. pmcraid_identify_hrrq(cmd);
  1889. } else {
  1890. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1891. pmcraid_soft_reset(cmd);
  1892. }
  1893. } else {
  1894. /* Alert IOA of a possible reset and wait for critical
  1895. * operation in progress bit to reset
  1896. */
  1897. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1898. pmcraid_reset_alert(cmd);
  1899. }
  1900. break;
  1901. case IOA_STATE_IN_RESET_ALERT:
  1902. /* If critical operation in progress bit is reset or wait gets
  1903. * timed out, reset proceeds with starting BIST on the IOA.
  1904. * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
  1905. * they are 3 or more, reset engine marks IOA dead and returns
  1906. */
  1907. pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
  1908. pmcraid_start_bist(cmd);
  1909. break;
  1910. case IOA_STATE_IN_HARD_RESET:
  1911. pinstance->ioa_reset_attempts++;
  1912. /* retry reset if we haven't reached maximum allowed limit */
  1913. if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
  1914. pinstance->ioa_reset_attempts = 0;
  1915. pmcraid_err("IOA didn't respond marking it as dead\n");
  1916. pinstance->ioa_state = IOA_STATE_DEAD;
  1917. if (pinstance->ioa_bringdown)
  1918. pmcraid_notify_ioastate(pinstance,
  1919. PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
  1920. else
  1921. pmcraid_notify_ioastate(pinstance,
  1922. PMC_DEVICE_EVENT_RESET_FAILED);
  1923. reset_complete = 1;
  1924. break;
  1925. }
  1926. /* Once either bist or pci reset is done, restore PCI config
  1927. * space. If this fails, proceed with hard reset again
  1928. */
  1929. pci_restore_state(pinstance->pdev);
  1930. /* fail all pending commands */
  1931. pmcraid_fail_outstanding_cmds(pinstance);
  1932. /* check if unit check is active, if so extract dump */
  1933. if (pinstance->ioa_unit_check) {
  1934. pmcraid_info("unit check is active\n");
  1935. pinstance->ioa_unit_check = 0;
  1936. pmcraid_get_dump(pinstance);
  1937. pinstance->ioa_reset_attempts--;
  1938. pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
  1939. pmcraid_reset_alert(cmd);
  1940. break;
  1941. }
  1942. /* if the reset reason is to bring-down the ioa, we might be
  1943. * done with the reset restore pci_config_space and complete
  1944. * the reset
  1945. */
  1946. if (pinstance->ioa_bringdown) {
  1947. pmcraid_info("bringing down the adapter\n");
  1948. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  1949. pinstance->ioa_bringdown = 0;
  1950. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  1951. pmcraid_notify_ioastate(pinstance,
  1952. PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
  1953. reset_complete = 1;
  1954. } else {
  1955. /* bring-up IOA, so proceed with soft reset
  1956. * Reinitialize hrrq_buffers and their indices also
  1957. * enable interrupts after a pci_restore_state
  1958. */
  1959. if (pmcraid_reset_enable_ioa(pinstance)) {
  1960. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1961. pmcraid_info("bringing up the adapter\n");
  1962. pmcraid_reinit_cmdblk(cmd);
  1963. pmcraid_identify_hrrq(cmd);
  1964. } else {
  1965. pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
  1966. pmcraid_soft_reset(cmd);
  1967. }
  1968. }
  1969. break;
  1970. case IOA_STATE_IN_SOFT_RESET:
  1971. /* TRANSITION TO OPERATIONAL is on so start initialization
  1972. * sequence
  1973. */
  1974. pmcraid_info("In softreset proceeding with bring-up\n");
  1975. pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
  1976. /* Initialization commands start with HRRQ identification. From
  1977. * now on tasklet completes most of the commands as IOA is up
  1978. * and intrs are enabled
  1979. */
  1980. pmcraid_identify_hrrq(cmd);
  1981. break;
  1982. case IOA_STATE_IN_BRINGUP:
  1983. /* we are done with bringing up of IOA, change the ioa_state to
  1984. * operational and wake up any waiters
  1985. */
  1986. pinstance->ioa_state = IOA_STATE_OPERATIONAL;
  1987. reset_complete = 1;
  1988. break;
  1989. case IOA_STATE_OPERATIONAL:
  1990. default:
  1991. /* When IOA is operational and a reset is requested, check for
  1992. * the reset reason. If reset is to bring down IOA, unregister
  1993. * HCAMs and initiate shutdown; if adapter reset is forced then
  1994. * restart reset sequence again
  1995. */
  1996. if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
  1997. pinstance->force_ioa_reset == 0) {
  1998. pmcraid_notify_ioastate(pinstance,
  1999. PMC_DEVICE_EVENT_RESET_SUCCESS);
  2000. reset_complete = 1;
  2001. } else {
  2002. if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
  2003. pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
  2004. pmcraid_reinit_cmdblk(cmd);
  2005. pmcraid_unregister_hcams(cmd);
  2006. }
  2007. break;
  2008. }
  2009. /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
  2010. * OPERATIONAL. Reset all control variables used during reset, wake up
  2011. * any waiting threads and let the SCSI mid-layer send commands. Note
  2012. * that host_lock must be held before invoking scsi_report_bus_reset.
  2013. */
  2014. if (reset_complete) {
  2015. pinstance->ioa_reset_in_progress = 0;
  2016. pinstance->ioa_reset_attempts = 0;
  2017. pinstance->reset_cmd = NULL;
  2018. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2019. pinstance->ioa_bringdown = 0;
  2020. pmcraid_return_cmd(cmd);
  2021. /* If target state is to bring up the adapter, proceed with
  2022. * hcam registration and resource exposure to mid-layer.
  2023. */
  2024. if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
  2025. pmcraid_register_hcams(pinstance);
  2026. wake_up_all(&pinstance->reset_wait_q);
  2027. }
  2028. return;
  2029. }
  2030. /**
  2031. * pmcraid_initiate_reset - initiates reset sequence. This is called from
  2032. * ISR/tasklet during error interrupts including IOA unit check. If reset
  2033. * is already in progress, it just returns, otherwise initiates IOA reset
  2034. * to bring IOA up to operational state.
  2035. *
  2036. * @pinstance: pointer to adapter instance structure
  2037. *
  2038. * Return value
  2039. * none
  2040. */
  2041. static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
  2042. {
  2043. struct pmcraid_cmd *cmd;
  2044. /* If the reset is already in progress, just return, otherwise start
  2045. * reset sequence and return
  2046. */
  2047. if (!pinstance->ioa_reset_in_progress) {
  2048. scsi_block_requests(pinstance->host);
  2049. cmd = pmcraid_get_free_cmd(pinstance);
  2050. if (cmd == NULL) {
  2051. pmcraid_err("no cmnd blocks for initiate_reset\n");
  2052. return;
  2053. }
  2054. pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
  2055. pinstance->reset_cmd = cmd;
  2056. pinstance->force_ioa_reset = 1;
  2057. pmcraid_notify_ioastate(pinstance,
  2058. PMC_DEVICE_EVENT_RESET_START);
  2059. pmcraid_ioa_reset(cmd);
  2060. }
  2061. }
  2062. /**
  2063. * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
  2064. * or bringdown IOA
  2065. * @pinstance: pointer adapter instance structure
  2066. * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
  2067. * @target_state: expected target state after reset
  2068. *
  2069. * Note: This command initiates reset and waits for its completion. Hence this
  2070. * should not be called from isr/timer/tasklet functions (timeout handlers,
  2071. * error response handlers and interrupt handlers).
  2072. *
  2073. * Return Value
  2074. * 1 in case ioa_state is not target_state, 0 otherwise.
  2075. */
  2076. static int pmcraid_reset_reload(
  2077. struct pmcraid_instance *pinstance,
  2078. u8 shutdown_type,
  2079. u8 target_state
  2080. )
  2081. {
  2082. struct pmcraid_cmd *reset_cmd = NULL;
  2083. unsigned long lock_flags;
  2084. int reset = 1;
  2085. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2086. if (pinstance->ioa_reset_in_progress) {
  2087. pmcraid_info("reset_reload: reset is already in progress\n");
  2088. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2089. wait_event(pinstance->reset_wait_q,
  2090. !pinstance->ioa_reset_in_progress);
  2091. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2092. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2093. pmcraid_info("reset_reload: IOA is dead\n");
  2094. goto out_unlock;
  2095. }
  2096. if (pinstance->ioa_state == target_state) {
  2097. reset = 0;
  2098. goto out_unlock;
  2099. }
  2100. }
  2101. pmcraid_info("reset_reload: proceeding with reset\n");
  2102. scsi_block_requests(pinstance->host);
  2103. reset_cmd = pmcraid_get_free_cmd(pinstance);
  2104. if (reset_cmd == NULL) {
  2105. pmcraid_err("no free cmnd for reset_reload\n");
  2106. goto out_unlock;
  2107. }
  2108. if (shutdown_type == SHUTDOWN_NORMAL)
  2109. pinstance->ioa_bringdown = 1;
  2110. pinstance->ioa_shutdown_type = shutdown_type;
  2111. pinstance->reset_cmd = reset_cmd;
  2112. pinstance->force_ioa_reset = reset;
  2113. pmcraid_info("reset_reload: initiating reset\n");
  2114. pmcraid_ioa_reset(reset_cmd);
  2115. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2116. pmcraid_info("reset_reload: waiting for reset to complete\n");
  2117. wait_event(pinstance->reset_wait_q,
  2118. !pinstance->ioa_reset_in_progress);
  2119. pmcraid_info("reset_reload: reset is complete !!\n");
  2120. scsi_unblock_requests(pinstance->host);
  2121. return pinstance->ioa_state != target_state;
  2122. out_unlock:
  2123. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2124. return reset;
  2125. }
  2126. /**
  2127. * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
  2128. *
  2129. * @pinstance: pointer to adapter instance structure
  2130. *
  2131. * Return Value
  2132. * whatever is returned from pmcraid_reset_reload
  2133. */
  2134. static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
  2135. {
  2136. return pmcraid_reset_reload(pinstance,
  2137. SHUTDOWN_NORMAL,
  2138. IOA_STATE_UNKNOWN);
  2139. }
  2140. /**
  2141. * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
  2142. *
  2143. * @pinstance: pointer to adapter instance structure
  2144. *
  2145. * Return Value
  2146. * whatever is returned from pmcraid_reset_reload
  2147. */
  2148. static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
  2149. {
  2150. pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
  2151. return pmcraid_reset_reload(pinstance,
  2152. SHUTDOWN_NONE,
  2153. IOA_STATE_OPERATIONAL);
  2154. }
  2155. /**
  2156. * pmcraid_request_sense - Send request sense to a device
  2157. * @cmd: pmcraid command struct
  2158. *
  2159. * This function sends a request sense to a device as a result of a check
  2160. * condition. This method re-uses the same command block that failed earlier.
  2161. */
  2162. static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
  2163. {
  2164. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2165. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2166. /* allocate DMAable memory for sense buffers */
  2167. cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
  2168. SCSI_SENSE_BUFFERSIZE,
  2169. &cmd->sense_buffer_dma);
  2170. if (cmd->sense_buffer == NULL) {
  2171. pmcraid_err
  2172. ("couldn't allocate sense buffer for request sense\n");
  2173. pmcraid_erp_done(cmd);
  2174. return;
  2175. }
  2176. /* re-use the command block */
  2177. memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
  2178. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2179. ioarcb->request_flags0 = (SYNC_COMPLETE |
  2180. NO_LINK_DESCS |
  2181. INHIBIT_UL_CHECK);
  2182. ioarcb->request_type = REQ_TYPE_SCSI;
  2183. ioarcb->cdb[0] = REQUEST_SENSE;
  2184. ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  2185. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2186. offsetof(struct pmcraid_ioarcb,
  2187. add_data.u.ioadl[0]));
  2188. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  2189. ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2190. ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
  2191. ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
  2192. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  2193. /* request sense might be called as part of error response processing
  2194. * which runs in tasklets context. It is possible that mid-layer might
  2195. * schedule queuecommand during this time, hence, writting to IOARRIN
  2196. * must be protect by host_lock
  2197. */
  2198. pmcraid_send_cmd(cmd, pmcraid_erp_done,
  2199. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2200. pmcraid_timeout_handler);
  2201. }
  2202. /**
  2203. * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
  2204. * @cmd: command that failed
  2205. * @sense: true if request_sense is required after cancel all
  2206. *
  2207. * This function sends a cancel all to a device to clear the queue.
  2208. */
  2209. static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
  2210. {
  2211. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2212. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2213. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2214. void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
  2215. : pmcraid_request_sense;
  2216. memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
  2217. ioarcb->request_flags0 = SYNC_OVERRIDE;
  2218. ioarcb->request_type = REQ_TYPE_IOACMD;
  2219. ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
  2220. if (RES_IS_GSCSI(res->cfg_entry))
  2221. ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
  2222. ioarcb->ioadl_bus_addr = 0;
  2223. ioarcb->ioadl_length = 0;
  2224. ioarcb->data_transfer_length = 0;
  2225. ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
  2226. /* writing to IOARRIN must be protected by host_lock, as mid-layer
  2227. * schedule queuecommand while we are doing this
  2228. */
  2229. pmcraid_send_cmd(cmd, cmd_done,
  2230. PMCRAID_REQUEST_SENSE_TIMEOUT,
  2231. pmcraid_timeout_handler);
  2232. }
  2233. /**
  2234. * pmcraid_frame_auto_sense: frame fixed format sense information
  2235. *
  2236. * @cmd: pointer to failing command block
  2237. *
  2238. * Return value
  2239. * none
  2240. */
  2241. static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
  2242. {
  2243. u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
  2244. struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
  2245. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2246. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2247. u32 failing_lba = 0;
  2248. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  2249. cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  2250. if (RES_IS_VSET(res->cfg_entry) &&
  2251. ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
  2252. ioasa->u.vset.failing_lba_hi != 0) {
  2253. sense_buf[0] = 0x72;
  2254. sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2255. sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2256. sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2257. sense_buf[7] = 12;
  2258. sense_buf[8] = 0;
  2259. sense_buf[9] = 0x0A;
  2260. sense_buf[10] = 0x80;
  2261. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
  2262. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  2263. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  2264. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  2265. sense_buf[15] = failing_lba & 0x000000ff;
  2266. failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
  2267. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  2268. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  2269. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  2270. sense_buf[19] = failing_lba & 0x000000ff;
  2271. } else {
  2272. sense_buf[0] = 0x70;
  2273. sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
  2274. sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
  2275. sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
  2276. if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
  2277. if (RES_IS_VSET(res->cfg_entry))
  2278. failing_lba =
  2279. le32_to_cpu(ioasa->u.
  2280. vset.failing_lba_lo);
  2281. sense_buf[0] |= 0x80;
  2282. sense_buf[3] = (failing_lba >> 24) & 0xff;
  2283. sense_buf[4] = (failing_lba >> 16) & 0xff;
  2284. sense_buf[5] = (failing_lba >> 8) & 0xff;
  2285. sense_buf[6] = failing_lba & 0xff;
  2286. }
  2287. sense_buf[7] = 6; /* additional length */
  2288. }
  2289. }
  2290. /**
  2291. * pmcraid_error_handler - Error response handlers for a SCSI op
  2292. * @cmd: pointer to pmcraid_cmd that has failed
  2293. *
  2294. * This function determines whether or not to initiate ERP on the affected
  2295. * device. This is called from a tasklet, which doesn't hold any locks.
  2296. *
  2297. * Return value:
  2298. * 0 it caller can complete the request, otherwise 1 where in error
  2299. * handler itself completes the request and returns the command block
  2300. * back to free-pool
  2301. */
  2302. static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
  2303. {
  2304. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2305. struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
  2306. struct pmcraid_instance *pinstance = cmd->drv_inst;
  2307. struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
  2308. u32 ioasc = le32_to_cpu(ioasa->ioasc);
  2309. u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
  2310. u32 sense_copied = 0;
  2311. if (!res) {
  2312. pmcraid_info("resource pointer is NULL\n");
  2313. return 0;
  2314. }
  2315. /* If this was a SCSI read/write command keep count of errors */
  2316. if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
  2317. atomic_inc(&res->read_failures);
  2318. else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
  2319. atomic_inc(&res->write_failures);
  2320. if (!RES_IS_GSCSI(res->cfg_entry) &&
  2321. masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
  2322. pmcraid_frame_auto_sense(cmd);
  2323. }
  2324. /* Log IOASC/IOASA information based on user settings */
  2325. pmcraid_ioasc_logger(ioasc, cmd);
  2326. switch (masked_ioasc) {
  2327. case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
  2328. scsi_cmd->result |= (DID_ABORT << 16);
  2329. break;
  2330. case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
  2331. case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
  2332. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  2333. break;
  2334. case PMCRAID_IOASC_NR_SYNC_REQUIRED:
  2335. res->sync_reqd = 1;
  2336. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  2337. break;
  2338. case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
  2339. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  2340. break;
  2341. case PMCRAID_IOASC_UA_BUS_WAS_RESET:
  2342. case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
  2343. if (!res->reset_progress)
  2344. scsi_report_bus_reset(pinstance->host,
  2345. scsi_cmd->device->channel);
  2346. scsi_cmd->result |= (DID_ERROR << 16);
  2347. break;
  2348. case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
  2349. scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
  2350. res->sync_reqd = 1;
  2351. /* if check_condition is not active return with error otherwise
  2352. * get/frame the sense buffer
  2353. */
  2354. if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
  2355. SAM_STAT_CHECK_CONDITION &&
  2356. PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
  2357. return 0;
  2358. /* If we have auto sense data as part of IOASA pass it to
  2359. * mid-layer
  2360. */
  2361. if (ioasa->auto_sense_length != 0) {
  2362. short sense_len = le16_to_cpu(ioasa->auto_sense_length);
  2363. int data_size = min_t(u16, sense_len,
  2364. SCSI_SENSE_BUFFERSIZE);
  2365. memcpy(scsi_cmd->sense_buffer,
  2366. ioasa->sense_data,
  2367. data_size);
  2368. sense_copied = 1;
  2369. }
  2370. if (RES_IS_GSCSI(res->cfg_entry))
  2371. pmcraid_cancel_all(cmd, sense_copied);
  2372. else if (sense_copied)
  2373. pmcraid_erp_done(cmd);
  2374. else
  2375. pmcraid_request_sense(cmd);
  2376. return 1;
  2377. case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
  2378. break;
  2379. default:
  2380. if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  2381. scsi_cmd->result |= (DID_ERROR << 16);
  2382. break;
  2383. }
  2384. return 0;
  2385. }
  2386. /**
  2387. * pmcraid_reset_device - device reset handler functions
  2388. *
  2389. * @scsi_cmd: scsi command struct
  2390. * @modifier: reset modifier indicating the reset sequence to be performed
  2391. *
  2392. * This function issues a device reset to the affected device.
  2393. * A LUN reset will be sent to the device first. If that does
  2394. * not work, a target reset will be sent.
  2395. *
  2396. * Return value:
  2397. * SUCCESS / FAILED
  2398. */
  2399. static int pmcraid_reset_device(
  2400. struct scsi_cmnd *scsi_cmd,
  2401. unsigned long timeout,
  2402. u8 modifier
  2403. )
  2404. {
  2405. struct pmcraid_cmd *cmd;
  2406. struct pmcraid_instance *pinstance;
  2407. struct pmcraid_resource_entry *res;
  2408. struct pmcraid_ioarcb *ioarcb;
  2409. unsigned long lock_flags;
  2410. u32 ioasc;
  2411. pinstance =
  2412. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2413. res = scsi_cmd->device->hostdata;
  2414. if (!res) {
  2415. sdev_printk(KERN_ERR, scsi_cmd->device,
  2416. "reset_device: NULL resource pointer\n");
  2417. return FAILED;
  2418. }
  2419. /* If adapter is currently going through reset/reload, return failed.
  2420. * This will force the mid-layer to call _eh_bus/host reset, which
  2421. * will then go to sleep and wait for the reset to complete
  2422. */
  2423. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  2424. if (pinstance->ioa_reset_in_progress ||
  2425. pinstance->ioa_state == IOA_STATE_DEAD) {
  2426. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2427. return FAILED;
  2428. }
  2429. res->reset_progress = 1;
  2430. pmcraid_info("Resetting %s resource with addr %x\n",
  2431. ((modifier & RESET_DEVICE_LUN) ? "LUN" :
  2432. ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
  2433. le32_to_cpu(res->cfg_entry.resource_address));
  2434. /* get a free cmd block */
  2435. cmd = pmcraid_get_free_cmd(pinstance);
  2436. if (cmd == NULL) {
  2437. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2438. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2439. return FAILED;
  2440. }
  2441. ioarcb = &cmd->ioa_cb->ioarcb;
  2442. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  2443. ioarcb->request_type = REQ_TYPE_IOACMD;
  2444. ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
  2445. /* Initialize reset modifier bits */
  2446. if (modifier)
  2447. modifier = ENABLE_RESET_MODIFIER | modifier;
  2448. ioarcb->cdb[1] = modifier;
  2449. init_completion(&cmd->wait_for_completion);
  2450. cmd->completion_req = 1;
  2451. pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
  2452. cmd->ioa_cb->ioarcb.cdb[0],
  2453. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
  2454. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2455. pmcraid_send_cmd(cmd,
  2456. pmcraid_internal_done,
  2457. timeout,
  2458. pmcraid_timeout_handler);
  2459. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  2460. /* RESET_DEVICE command completes after all pending IOARCBs are
  2461. * completed. Once this command is completed, pmcraind_internal_done
  2462. * will wake up the 'completion' queue.
  2463. */
  2464. wait_for_completion(&cmd->wait_for_completion);
  2465. /* complete the command here itself and return the command block
  2466. * to free list
  2467. */
  2468. pmcraid_return_cmd(cmd);
  2469. res->reset_progress = 0;
  2470. ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2471. /* set the return value based on the returned ioasc */
  2472. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2473. }
  2474. /**
  2475. * _pmcraid_io_done - helper for pmcraid_io_done function
  2476. *
  2477. * @cmd: pointer to pmcraid command struct
  2478. * @reslen: residual data length to be set in the ioasa
  2479. * @ioasc: ioasc either returned by IOA or set by driver itself.
  2480. *
  2481. * This function is invoked by pmcraid_io_done to complete mid-layer
  2482. * scsi ops.
  2483. *
  2484. * Return value:
  2485. * 0 if caller is required to return it to free_pool. Returns 1 if
  2486. * caller need not worry about freeing command block as error handler
  2487. * will take care of that.
  2488. */
  2489. static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
  2490. {
  2491. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2492. int rc = 0;
  2493. scsi_set_resid(scsi_cmd, reslen);
  2494. pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
  2495. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2496. cmd->ioa_cb->ioarcb.cdb[0],
  2497. ioasc, scsi_cmd->result);
  2498. if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
  2499. rc = pmcraid_error_handler(cmd);
  2500. if (rc == 0) {
  2501. scsi_dma_unmap(scsi_cmd);
  2502. scsi_cmd->scsi_done(scsi_cmd);
  2503. }
  2504. return rc;
  2505. }
  2506. /**
  2507. * pmcraid_io_done - SCSI completion function
  2508. *
  2509. * @cmd: pointer to pmcraid command struct
  2510. *
  2511. * This function is invoked by tasklet/mid-layer error handler to completing
  2512. * the SCSI ops sent from mid-layer.
  2513. *
  2514. * Return value
  2515. * none
  2516. */
  2517. static void pmcraid_io_done(struct pmcraid_cmd *cmd)
  2518. {
  2519. u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
  2520. u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
  2521. if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
  2522. pmcraid_return_cmd(cmd);
  2523. }
  2524. /**
  2525. * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
  2526. *
  2527. * @cmd: command block of the command to be aborted
  2528. *
  2529. * Return Value:
  2530. * returns pointer to command structure used as cancelling cmd
  2531. */
  2532. static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
  2533. {
  2534. struct pmcraid_cmd *cancel_cmd;
  2535. struct pmcraid_instance *pinstance;
  2536. struct pmcraid_resource_entry *res;
  2537. pinstance = (struct pmcraid_instance *)cmd->drv_inst;
  2538. res = cmd->scsi_cmd->device->hostdata;
  2539. cancel_cmd = pmcraid_get_free_cmd(pinstance);
  2540. if (cancel_cmd == NULL) {
  2541. pmcraid_err("%s: no cmd blocks are available\n", __func__);
  2542. return NULL;
  2543. }
  2544. pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
  2545. pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
  2546. cmd->ioa_cb->ioarcb.cdb[0],
  2547. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
  2548. init_completion(&cancel_cmd->wait_for_completion);
  2549. cancel_cmd->completion_req = 1;
  2550. pmcraid_info("command (%d) CDB[0] = %x for %x\n",
  2551. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
  2552. cancel_cmd->ioa_cb->ioarcb.cdb[0],
  2553. le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
  2554. pmcraid_send_cmd(cancel_cmd,
  2555. pmcraid_internal_done,
  2556. PMCRAID_INTERNAL_TIMEOUT,
  2557. pmcraid_timeout_handler);
  2558. return cancel_cmd;
  2559. }
  2560. /**
  2561. * pmcraid_abort_complete - Waits for ABORT TASK completion
  2562. *
  2563. * @cancel_cmd: command block use as cancelling command
  2564. *
  2565. * Return Value:
  2566. * returns SUCCESS if ABORT TASK has good completion
  2567. * otherwise FAILED
  2568. */
  2569. static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
  2570. {
  2571. struct pmcraid_resource_entry *res;
  2572. u32 ioasc;
  2573. wait_for_completion(&cancel_cmd->wait_for_completion);
  2574. res = cancel_cmd->res;
  2575. cancel_cmd->res = NULL;
  2576. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  2577. /* If the abort task is not timed out we will get a Good completion
  2578. * as sense_key, otherwise we may get one the following responses
  2579. * due to subsequent bus reset or device reset. In case IOASC is
  2580. * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
  2581. */
  2582. if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
  2583. ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
  2584. if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
  2585. res->sync_reqd = 1;
  2586. ioasc = 0;
  2587. }
  2588. /* complete the command here itself */
  2589. pmcraid_return_cmd(cancel_cmd);
  2590. return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  2591. }
  2592. /**
  2593. * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
  2594. *
  2595. * @scsi_cmd: scsi command struct given by mid-layer. When this is called
  2596. * mid-layer ensures that no other commands are queued. This
  2597. * never gets called under interrupt, but a separate eh thread.
  2598. *
  2599. * Return value:
  2600. * SUCCESS / FAILED
  2601. */
  2602. static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
  2603. {
  2604. struct pmcraid_instance *pinstance;
  2605. struct pmcraid_cmd *cmd;
  2606. struct pmcraid_resource_entry *res;
  2607. unsigned long host_lock_flags;
  2608. unsigned long pending_lock_flags;
  2609. struct pmcraid_cmd *cancel_cmd = NULL;
  2610. int cmd_found = 0;
  2611. int rc = FAILED;
  2612. pinstance =
  2613. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2614. scmd_printk(KERN_INFO, scsi_cmd,
  2615. "I/O command timed out, aborting it.\n");
  2616. res = scsi_cmd->device->hostdata;
  2617. if (res == NULL)
  2618. return rc;
  2619. /* If we are currently going through reset/reload, return failed.
  2620. * This will force the mid-layer to eventually call
  2621. * pmcraid_eh_host_reset which will then go to sleep and wait for the
  2622. * reset to complete
  2623. */
  2624. spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
  2625. if (pinstance->ioa_reset_in_progress ||
  2626. pinstance->ioa_state == IOA_STATE_DEAD) {
  2627. spin_unlock_irqrestore(pinstance->host->host_lock,
  2628. host_lock_flags);
  2629. return rc;
  2630. }
  2631. /* loop over pending cmd list to find cmd corresponding to this
  2632. * scsi_cmd. Note that this command might not have been completed
  2633. * already. locking: all pending commands are protected with
  2634. * pending_pool_lock.
  2635. */
  2636. spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
  2637. list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
  2638. if (cmd->scsi_cmd == scsi_cmd) {
  2639. cmd_found = 1;
  2640. break;
  2641. }
  2642. }
  2643. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  2644. pending_lock_flags);
  2645. /* If the command to be aborted was given to IOA and still pending with
  2646. * it, send ABORT_TASK to abort this and wait for its completion
  2647. */
  2648. if (cmd_found)
  2649. cancel_cmd = pmcraid_abort_cmd(cmd);
  2650. spin_unlock_irqrestore(pinstance->host->host_lock,
  2651. host_lock_flags);
  2652. if (cancel_cmd) {
  2653. cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
  2654. rc = pmcraid_abort_complete(cancel_cmd);
  2655. }
  2656. return cmd_found ? rc : SUCCESS;
  2657. }
  2658. /**
  2659. * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
  2660. *
  2661. * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
  2662. *
  2663. * All these routines invokve pmcraid_reset_device with appropriate parameters.
  2664. * Since these are called from mid-layer EH thread, no other IO will be queued
  2665. * to the resource being reset. However, control path (IOCTL) may be active so
  2666. * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
  2667. * takes care by locking/unlocking host_lock.
  2668. *
  2669. * Return value
  2670. * SUCCESS or FAILED
  2671. */
  2672. static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
  2673. {
  2674. scmd_printk(KERN_INFO, scmd,
  2675. "resetting device due to an I/O command timeout.\n");
  2676. return pmcraid_reset_device(scmd,
  2677. PMCRAID_INTERNAL_TIMEOUT,
  2678. RESET_DEVICE_LUN);
  2679. }
  2680. static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
  2681. {
  2682. scmd_printk(KERN_INFO, scmd,
  2683. "Doing bus reset due to an I/O command timeout.\n");
  2684. return pmcraid_reset_device(scmd,
  2685. PMCRAID_RESET_BUS_TIMEOUT,
  2686. RESET_DEVICE_BUS);
  2687. }
  2688. static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
  2689. {
  2690. scmd_printk(KERN_INFO, scmd,
  2691. "Doing target reset due to an I/O command timeout.\n");
  2692. return pmcraid_reset_device(scmd,
  2693. PMCRAID_INTERNAL_TIMEOUT,
  2694. RESET_DEVICE_TARGET);
  2695. }
  2696. /**
  2697. * pmcraid_eh_host_reset_handler - adapter reset handler callback
  2698. *
  2699. * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
  2700. *
  2701. * Initiates adapter reset to bring it up to operational state
  2702. *
  2703. * Return value
  2704. * SUCCESS or FAILED
  2705. */
  2706. static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
  2707. {
  2708. unsigned long interval = 10000; /* 10 seconds interval */
  2709. int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
  2710. struct pmcraid_instance *pinstance =
  2711. (struct pmcraid_instance *)(scmd->device->host->hostdata);
  2712. /* wait for an additional 150 seconds just in case firmware could come
  2713. * up and if it could complete all the pending commands excluding the
  2714. * two HCAM (CCN and LDN).
  2715. */
  2716. while (waits--) {
  2717. if (atomic_read(&pinstance->outstanding_cmds) <=
  2718. PMCRAID_MAX_HCAM_CMD)
  2719. return SUCCESS;
  2720. msleep(interval);
  2721. }
  2722. dev_err(&pinstance->pdev->dev,
  2723. "Adapter being reset due to an I/O command timeout.\n");
  2724. return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
  2725. }
  2726. /**
  2727. * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
  2728. * @cmd: pmcraid command struct
  2729. * @sgcount: count of scatter-gather elements
  2730. *
  2731. * Return value
  2732. * returns pointer pmcraid_ioadl_desc, initialized to point to internal
  2733. * or external IOADLs
  2734. */
  2735. static struct pmcraid_ioadl_desc *
  2736. pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
  2737. {
  2738. struct pmcraid_ioadl_desc *ioadl;
  2739. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  2740. int ioadl_count = 0;
  2741. if (ioarcb->add_cmd_param_length)
  2742. ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
  2743. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
  2744. if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
  2745. /* external ioadls start at offset 0x80 from control_block
  2746. * structure, re-using 24 out of 27 ioadls part of IOARCB.
  2747. * It is necessary to indicate to firmware that driver is
  2748. * using ioadls to be treated as external to IOARCB.
  2749. */
  2750. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  2751. ioarcb->ioadl_bus_addr =
  2752. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2753. offsetof(struct pmcraid_ioarcb,
  2754. add_data.u.ioadl[3]));
  2755. ioadl = &ioarcb->add_data.u.ioadl[3];
  2756. } else {
  2757. ioarcb->ioadl_bus_addr =
  2758. cpu_to_le64((cmd->ioa_cb_bus_addr) +
  2759. offsetof(struct pmcraid_ioarcb,
  2760. add_data.u.ioadl[ioadl_count]));
  2761. ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
  2762. ioarcb->ioarcb_bus_addr |=
  2763. cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
  2764. }
  2765. return ioadl;
  2766. }
  2767. /**
  2768. * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
  2769. * @pinstance: pointer to adapter instance structure
  2770. * @cmd: pmcraid command struct
  2771. *
  2772. * This function is invoked by queuecommand entry point while sending a command
  2773. * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
  2774. *
  2775. * Return value:
  2776. * 0 on success or -1 on failure
  2777. */
  2778. static int pmcraid_build_ioadl(
  2779. struct pmcraid_instance *pinstance,
  2780. struct pmcraid_cmd *cmd
  2781. )
  2782. {
  2783. int i, nseg;
  2784. struct scatterlist *sglist;
  2785. struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
  2786. struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
  2787. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  2788. u32 length = scsi_bufflen(scsi_cmd);
  2789. if (!length)
  2790. return 0;
  2791. nseg = scsi_dma_map(scsi_cmd);
  2792. if (nseg < 0) {
  2793. scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
  2794. return -1;
  2795. } else if (nseg > PMCRAID_MAX_IOADLS) {
  2796. scsi_dma_unmap(scsi_cmd);
  2797. scmd_printk(KERN_ERR, scsi_cmd,
  2798. "sg count is (%d) more than allowed!\n", nseg);
  2799. return -1;
  2800. }
  2801. /* Initialize IOARCB data transfer length fields */
  2802. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
  2803. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  2804. ioarcb->request_flags0 |= NO_LINK_DESCS;
  2805. ioarcb->data_transfer_length = cpu_to_le32(length);
  2806. ioadl = pmcraid_init_ioadls(cmd, nseg);
  2807. /* Initialize IOADL descriptor addresses */
  2808. scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
  2809. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
  2810. ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
  2811. ioadl[i].flags = 0;
  2812. }
  2813. /* setup last descriptor */
  2814. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  2815. return 0;
  2816. }
  2817. /**
  2818. * pmcraid_free_sglist - Frees an allocated SG buffer list
  2819. * @sglist: scatter/gather list pointer
  2820. *
  2821. * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
  2822. *
  2823. * Return value:
  2824. * none
  2825. */
  2826. static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
  2827. {
  2828. int i;
  2829. for (i = 0; i < sglist->num_sg; i++)
  2830. __free_pages(sg_page(&(sglist->scatterlist[i])),
  2831. sglist->order);
  2832. kfree(sglist);
  2833. }
  2834. /**
  2835. * pmcraid_alloc_sglist - Allocates memory for a SG list
  2836. * @buflen: buffer length
  2837. *
  2838. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  2839. * list.
  2840. *
  2841. * Return value
  2842. * pointer to sglist / NULL on failure
  2843. */
  2844. static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
  2845. {
  2846. struct pmcraid_sglist *sglist;
  2847. struct scatterlist *scatterlist;
  2848. struct page *page;
  2849. int num_elem, i, j;
  2850. int sg_size;
  2851. int order;
  2852. int bsize_elem;
  2853. sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
  2854. order = (sg_size > 0) ? get_order(sg_size) : 0;
  2855. bsize_elem = PAGE_SIZE * (1 << order);
  2856. /* Determine the actual number of sg entries needed */
  2857. if (buflen % bsize_elem)
  2858. num_elem = (buflen / bsize_elem) + 1;
  2859. else
  2860. num_elem = buflen / bsize_elem;
  2861. /* Allocate a scatter/gather list for the DMA */
  2862. sglist = kzalloc(sizeof(struct pmcraid_sglist) +
  2863. (sizeof(struct scatterlist) * (num_elem - 1)),
  2864. GFP_KERNEL);
  2865. if (sglist == NULL)
  2866. return NULL;
  2867. scatterlist = sglist->scatterlist;
  2868. sg_init_table(scatterlist, num_elem);
  2869. sglist->order = order;
  2870. sglist->num_sg = num_elem;
  2871. sg_size = buflen;
  2872. for (i = 0; i < num_elem; i++) {
  2873. page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order);
  2874. if (!page) {
  2875. for (j = i - 1; j >= 0; j--)
  2876. __free_pages(sg_page(&scatterlist[j]), order);
  2877. kfree(sglist);
  2878. return NULL;
  2879. }
  2880. sg_set_page(&scatterlist[i], page,
  2881. sg_size < bsize_elem ? sg_size : bsize_elem, 0);
  2882. sg_size -= bsize_elem;
  2883. }
  2884. return sglist;
  2885. }
  2886. /**
  2887. * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
  2888. * @sglist: scatter/gather list pointer
  2889. * @buffer: buffer pointer
  2890. * @len: buffer length
  2891. * @direction: data transfer direction
  2892. *
  2893. * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
  2894. *
  2895. * Return value:
  2896. * 0 on success / other on failure
  2897. */
  2898. static int pmcraid_copy_sglist(
  2899. struct pmcraid_sglist *sglist,
  2900. void __user *buffer,
  2901. u32 len,
  2902. int direction
  2903. )
  2904. {
  2905. struct scatterlist *scatterlist;
  2906. void *kaddr;
  2907. int bsize_elem;
  2908. int i;
  2909. int rc = 0;
  2910. /* Determine the actual number of bytes per element */
  2911. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  2912. scatterlist = sglist->scatterlist;
  2913. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  2914. struct page *page = sg_page(&scatterlist[i]);
  2915. kaddr = kmap(page);
  2916. if (direction == DMA_TO_DEVICE)
  2917. rc = copy_from_user(kaddr, buffer, bsize_elem);
  2918. else
  2919. rc = copy_to_user(buffer, kaddr, bsize_elem);
  2920. kunmap(page);
  2921. if (rc) {
  2922. pmcraid_err("failed to copy user data into sg list\n");
  2923. return -EFAULT;
  2924. }
  2925. scatterlist[i].length = bsize_elem;
  2926. }
  2927. if (len % bsize_elem) {
  2928. struct page *page = sg_page(&scatterlist[i]);
  2929. kaddr = kmap(page);
  2930. if (direction == DMA_TO_DEVICE)
  2931. rc = copy_from_user(kaddr, buffer, len % bsize_elem);
  2932. else
  2933. rc = copy_to_user(buffer, kaddr, len % bsize_elem);
  2934. kunmap(page);
  2935. scatterlist[i].length = len % bsize_elem;
  2936. }
  2937. if (rc) {
  2938. pmcraid_err("failed to copy user data into sg list\n");
  2939. rc = -EFAULT;
  2940. }
  2941. return rc;
  2942. }
  2943. /**
  2944. * pmcraid_queuecommand - Queue a mid-layer request
  2945. * @scsi_cmd: scsi command struct
  2946. * @done: done function
  2947. *
  2948. * This function queues a request generated by the mid-layer. Midlayer calls
  2949. * this routine within host->lock. Some of the functions called by queuecommand
  2950. * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
  2951. *
  2952. * Return value:
  2953. * 0 on success
  2954. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  2955. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  2956. */
  2957. static int pmcraid_queuecommand_lck(
  2958. struct scsi_cmnd *scsi_cmd,
  2959. void (*done) (struct scsi_cmnd *)
  2960. )
  2961. {
  2962. struct pmcraid_instance *pinstance;
  2963. struct pmcraid_resource_entry *res;
  2964. struct pmcraid_ioarcb *ioarcb;
  2965. struct pmcraid_cmd *cmd;
  2966. u32 fw_version;
  2967. int rc = 0;
  2968. pinstance =
  2969. (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
  2970. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  2971. scsi_cmd->scsi_done = done;
  2972. res = scsi_cmd->device->hostdata;
  2973. scsi_cmd->result = (DID_OK << 16);
  2974. /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
  2975. * the command
  2976. */
  2977. if (pinstance->ioa_state == IOA_STATE_DEAD) {
  2978. pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
  2979. scsi_cmd->result = (DID_NO_CONNECT << 16);
  2980. scsi_cmd->scsi_done(scsi_cmd);
  2981. return 0;
  2982. }
  2983. /* If IOA reset is in progress, can't queue the commands */
  2984. if (pinstance->ioa_reset_in_progress)
  2985. return SCSI_MLQUEUE_HOST_BUSY;
  2986. /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
  2987. * the command here itself with success return
  2988. */
  2989. if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
  2990. pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
  2991. scsi_cmd->scsi_done(scsi_cmd);
  2992. return 0;
  2993. }
  2994. /* initialize the command and IOARCB to be sent to IOA */
  2995. cmd = pmcraid_get_free_cmd(pinstance);
  2996. if (cmd == NULL) {
  2997. pmcraid_err("free command block is not available\n");
  2998. return SCSI_MLQUEUE_HOST_BUSY;
  2999. }
  3000. cmd->scsi_cmd = scsi_cmd;
  3001. ioarcb = &(cmd->ioa_cb->ioarcb);
  3002. memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  3003. ioarcb->resource_handle = res->cfg_entry.resource_handle;
  3004. ioarcb->request_type = REQ_TYPE_SCSI;
  3005. /* set hrrq number where the IOA should respond to. Note that all cmds
  3006. * generated internally uses hrrq_id 0, exception to this is the cmd
  3007. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  3008. * hrrq_id assigned here in queuecommand
  3009. */
  3010. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  3011. pinstance->num_hrrq;
  3012. cmd->cmd_done = pmcraid_io_done;
  3013. if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
  3014. if (scsi_cmd->underflow == 0)
  3015. ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
  3016. if (res->sync_reqd) {
  3017. ioarcb->request_flags0 |= SYNC_COMPLETE;
  3018. res->sync_reqd = 0;
  3019. }
  3020. ioarcb->request_flags0 |= NO_LINK_DESCS;
  3021. if (scsi_cmd->flags & SCMD_TAGGED)
  3022. ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
  3023. if (RES_IS_GSCSI(res->cfg_entry))
  3024. ioarcb->request_flags1 |= DELAY_AFTER_RESET;
  3025. }
  3026. rc = pmcraid_build_ioadl(pinstance, cmd);
  3027. pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
  3028. le32_to_cpu(ioarcb->response_handle) >> 2,
  3029. scsi_cmd->cmnd[0], pinstance->host->unique_id,
  3030. RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
  3031. PMCRAID_PHYS_BUS_ID,
  3032. RES_IS_VSET(res->cfg_entry) ?
  3033. (fw_version <= PMCRAID_FW_VERSION_1 ?
  3034. res->cfg_entry.unique_flags1 :
  3035. le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
  3036. RES_TARGET(res->cfg_entry.resource_address),
  3037. RES_LUN(res->cfg_entry.resource_address));
  3038. if (likely(rc == 0)) {
  3039. _pmcraid_fire_command(cmd);
  3040. } else {
  3041. pmcraid_err("queuecommand could not build ioadl\n");
  3042. pmcraid_return_cmd(cmd);
  3043. rc = SCSI_MLQUEUE_HOST_BUSY;
  3044. }
  3045. return rc;
  3046. }
  3047. static DEF_SCSI_QCMD(pmcraid_queuecommand)
  3048. /**
  3049. * pmcraid_open -char node "open" entry, allowed only users with admin access
  3050. */
  3051. static int pmcraid_chr_open(struct inode *inode, struct file *filep)
  3052. {
  3053. struct pmcraid_instance *pinstance;
  3054. if (!capable(CAP_SYS_ADMIN))
  3055. return -EACCES;
  3056. /* Populate adapter instance * pointer for use by ioctl */
  3057. pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
  3058. filep->private_data = pinstance;
  3059. return 0;
  3060. }
  3061. /**
  3062. * pmcraid_fasync - Async notifier registration from applications
  3063. *
  3064. * This function adds the calling process to a driver global queue. When an
  3065. * event occurs, SIGIO will be sent to all processes in this queue.
  3066. */
  3067. static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
  3068. {
  3069. struct pmcraid_instance *pinstance;
  3070. int rc;
  3071. pinstance = filep->private_data;
  3072. mutex_lock(&pinstance->aen_queue_lock);
  3073. rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
  3074. mutex_unlock(&pinstance->aen_queue_lock);
  3075. return rc;
  3076. }
  3077. /**
  3078. * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
  3079. * commands sent over IOCTL interface
  3080. *
  3081. * @cmd : pointer to struct pmcraid_cmd
  3082. * @buflen : length of the request buffer
  3083. * @direction : data transfer direction
  3084. *
  3085. * Return value
  3086. * 0 on success, non-zero error code on failure
  3087. */
  3088. static int pmcraid_build_passthrough_ioadls(
  3089. struct pmcraid_cmd *cmd,
  3090. int buflen,
  3091. int direction
  3092. )
  3093. {
  3094. struct pmcraid_sglist *sglist = NULL;
  3095. struct scatterlist *sg = NULL;
  3096. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  3097. struct pmcraid_ioadl_desc *ioadl;
  3098. int i;
  3099. sglist = pmcraid_alloc_sglist(buflen);
  3100. if (!sglist) {
  3101. pmcraid_err("can't allocate memory for passthrough SGls\n");
  3102. return -ENOMEM;
  3103. }
  3104. sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
  3105. sglist->scatterlist,
  3106. sglist->num_sg, direction);
  3107. if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
  3108. dev_err(&cmd->drv_inst->pdev->dev,
  3109. "Failed to map passthrough buffer!\n");
  3110. pmcraid_free_sglist(sglist);
  3111. return -EIO;
  3112. }
  3113. cmd->sglist = sglist;
  3114. ioarcb->request_flags0 |= NO_LINK_DESCS;
  3115. ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
  3116. /* Initialize IOADL descriptor addresses */
  3117. for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
  3118. ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
  3119. ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
  3120. ioadl[i].flags = 0;
  3121. }
  3122. /* setup the last descriptor */
  3123. ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
  3124. return 0;
  3125. }
  3126. /**
  3127. * pmcraid_release_passthrough_ioadls - release passthrough ioadls
  3128. *
  3129. * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
  3130. * @buflen: size of the request buffer
  3131. * @direction: data transfer direction
  3132. *
  3133. * Return value
  3134. * 0 on success, non-zero error code on failure
  3135. */
  3136. static void pmcraid_release_passthrough_ioadls(
  3137. struct pmcraid_cmd *cmd,
  3138. int buflen,
  3139. int direction
  3140. )
  3141. {
  3142. struct pmcraid_sglist *sglist = cmd->sglist;
  3143. if (buflen > 0) {
  3144. pci_unmap_sg(cmd->drv_inst->pdev,
  3145. sglist->scatterlist,
  3146. sglist->num_sg,
  3147. direction);
  3148. pmcraid_free_sglist(sglist);
  3149. cmd->sglist = NULL;
  3150. }
  3151. }
  3152. /**
  3153. * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
  3154. *
  3155. * @pinstance: pointer to adapter instance structure
  3156. * @cmd: ioctl code
  3157. * @arg: pointer to pmcraid_passthrough_buffer user buffer
  3158. *
  3159. * Return value
  3160. * 0 on success, non-zero error code on failure
  3161. */
  3162. static long pmcraid_ioctl_passthrough(
  3163. struct pmcraid_instance *pinstance,
  3164. unsigned int ioctl_cmd,
  3165. unsigned int buflen,
  3166. void __user *arg
  3167. )
  3168. {
  3169. struct pmcraid_passthrough_ioctl_buffer *buffer;
  3170. struct pmcraid_ioarcb *ioarcb;
  3171. struct pmcraid_cmd *cmd;
  3172. struct pmcraid_cmd *cancel_cmd;
  3173. void __user *request_buffer;
  3174. unsigned long request_offset;
  3175. unsigned long lock_flags;
  3176. void __user *ioasa;
  3177. u32 ioasc;
  3178. int request_size;
  3179. int buffer_size;
  3180. u8 access, direction;
  3181. int rc = 0;
  3182. /* If IOA reset is in progress, wait 10 secs for reset to complete */
  3183. if (pinstance->ioa_reset_in_progress) {
  3184. rc = wait_event_interruptible_timeout(
  3185. pinstance->reset_wait_q,
  3186. !pinstance->ioa_reset_in_progress,
  3187. msecs_to_jiffies(10000));
  3188. if (!rc)
  3189. return -ETIMEDOUT;
  3190. else if (rc < 0)
  3191. return -ERESTARTSYS;
  3192. }
  3193. /* If adapter is not in operational state, return error */
  3194. if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
  3195. pmcraid_err("IOA is not operational\n");
  3196. return -ENOTTY;
  3197. }
  3198. buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
  3199. buffer = kmalloc(buffer_size, GFP_KERNEL);
  3200. if (!buffer) {
  3201. pmcraid_err("no memory for passthrough buffer\n");
  3202. return -ENOMEM;
  3203. }
  3204. request_offset =
  3205. offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
  3206. request_buffer = arg + request_offset;
  3207. rc = copy_from_user(buffer, arg,
  3208. sizeof(struct pmcraid_passthrough_ioctl_buffer));
  3209. ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
  3210. if (rc) {
  3211. pmcraid_err("ioctl: can't copy passthrough buffer\n");
  3212. rc = -EFAULT;
  3213. goto out_free_buffer;
  3214. }
  3215. request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
  3216. if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
  3217. access = VERIFY_READ;
  3218. direction = DMA_TO_DEVICE;
  3219. } else {
  3220. access = VERIFY_WRITE;
  3221. direction = DMA_FROM_DEVICE;
  3222. }
  3223. if (request_size < 0) {
  3224. rc = -EINVAL;
  3225. goto out_free_buffer;
  3226. }
  3227. /* check if we have any additional command parameters */
  3228. if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
  3229. > PMCRAID_ADD_CMD_PARAM_LEN) {
  3230. rc = -EINVAL;
  3231. goto out_free_buffer;
  3232. }
  3233. cmd = pmcraid_get_free_cmd(pinstance);
  3234. if (!cmd) {
  3235. pmcraid_err("free command block is not available\n");
  3236. rc = -ENOMEM;
  3237. goto out_free_buffer;
  3238. }
  3239. cmd->scsi_cmd = NULL;
  3240. ioarcb = &(cmd->ioa_cb->ioarcb);
  3241. /* Copy the user-provided IOARCB stuff field by field */
  3242. ioarcb->resource_handle = buffer->ioarcb.resource_handle;
  3243. ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
  3244. ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
  3245. ioarcb->request_type = buffer->ioarcb.request_type;
  3246. ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
  3247. ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
  3248. memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
  3249. if (buffer->ioarcb.add_cmd_param_length) {
  3250. ioarcb->add_cmd_param_length =
  3251. buffer->ioarcb.add_cmd_param_length;
  3252. ioarcb->add_cmd_param_offset =
  3253. buffer->ioarcb.add_cmd_param_offset;
  3254. memcpy(ioarcb->add_data.u.add_cmd_params,
  3255. buffer->ioarcb.add_data.u.add_cmd_params,
  3256. le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
  3257. }
  3258. /* set hrrq number where the IOA should respond to. Note that all cmds
  3259. * generated internally uses hrrq_id 0, exception to this is the cmd
  3260. * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
  3261. * hrrq_id assigned here in queuecommand
  3262. */
  3263. ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
  3264. pinstance->num_hrrq;
  3265. if (request_size) {
  3266. rc = pmcraid_build_passthrough_ioadls(cmd,
  3267. request_size,
  3268. direction);
  3269. if (rc) {
  3270. pmcraid_err("couldn't build passthrough ioadls\n");
  3271. goto out_free_cmd;
  3272. }
  3273. }
  3274. /* If data is being written into the device, copy the data from user
  3275. * buffers
  3276. */
  3277. if (direction == DMA_TO_DEVICE && request_size > 0) {
  3278. rc = pmcraid_copy_sglist(cmd->sglist,
  3279. request_buffer,
  3280. request_size,
  3281. direction);
  3282. if (rc) {
  3283. pmcraid_err("failed to copy user buffer\n");
  3284. goto out_free_sglist;
  3285. }
  3286. }
  3287. /* passthrough ioctl is a blocking command so, put the user to sleep
  3288. * until timeout. Note that a timeout value of 0 means, do timeout.
  3289. */
  3290. cmd->cmd_done = pmcraid_internal_done;
  3291. init_completion(&cmd->wait_for_completion);
  3292. cmd->completion_req = 1;
  3293. pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
  3294. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3295. cmd->ioa_cb->ioarcb.cdb[0],
  3296. le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
  3297. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3298. _pmcraid_fire_command(cmd);
  3299. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3300. /* NOTE ! Remove the below line once abort_task is implemented
  3301. * in firmware. This line disables ioctl command timeout handling logic
  3302. * similar to IO command timeout handling, making ioctl commands to wait
  3303. * until the command completion regardless of timeout value specified in
  3304. * ioarcb
  3305. */
  3306. buffer->ioarcb.cmd_timeout = 0;
  3307. /* If command timeout is specified put caller to wait till that time,
  3308. * otherwise it would be blocking wait. If command gets timed out, it
  3309. * will be aborted.
  3310. */
  3311. if (buffer->ioarcb.cmd_timeout == 0) {
  3312. wait_for_completion(&cmd->wait_for_completion);
  3313. } else if (!wait_for_completion_timeout(
  3314. &cmd->wait_for_completion,
  3315. msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
  3316. pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
  3317. le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
  3318. cmd->ioa_cb->ioarcb.cdb[0]);
  3319. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3320. cancel_cmd = pmcraid_abort_cmd(cmd);
  3321. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3322. if (cancel_cmd) {
  3323. wait_for_completion(&cancel_cmd->wait_for_completion);
  3324. ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
  3325. pmcraid_return_cmd(cancel_cmd);
  3326. /* if abort task couldn't find the command i.e it got
  3327. * completed prior to aborting, return good completion.
  3328. * if command got aborted successfully or there was IOA
  3329. * reset due to abort task itself getting timedout then
  3330. * return -ETIMEDOUT
  3331. */
  3332. if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
  3333. PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
  3334. if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
  3335. rc = -ETIMEDOUT;
  3336. goto out_handle_response;
  3337. }
  3338. }
  3339. /* no command block for abort task or abort task failed to abort
  3340. * the IOARCB, then wait for 150 more seconds and initiate reset
  3341. * sequence after timeout
  3342. */
  3343. if (!wait_for_completion_timeout(
  3344. &cmd->wait_for_completion,
  3345. msecs_to_jiffies(150 * 1000))) {
  3346. pmcraid_reset_bringup(cmd->drv_inst);
  3347. rc = -ETIMEDOUT;
  3348. }
  3349. }
  3350. out_handle_response:
  3351. /* copy entire IOASA buffer and return IOCTL success.
  3352. * If copying IOASA to user-buffer fails, return
  3353. * EFAULT
  3354. */
  3355. if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
  3356. sizeof(struct pmcraid_ioasa))) {
  3357. pmcraid_err("failed to copy ioasa buffer to user\n");
  3358. rc = -EFAULT;
  3359. }
  3360. /* If the data transfer was from device, copy the data onto user
  3361. * buffers
  3362. */
  3363. else if (direction == DMA_FROM_DEVICE && request_size > 0) {
  3364. rc = pmcraid_copy_sglist(cmd->sglist,
  3365. request_buffer,
  3366. request_size,
  3367. direction);
  3368. if (rc) {
  3369. pmcraid_err("failed to copy user buffer\n");
  3370. rc = -EFAULT;
  3371. }
  3372. }
  3373. out_free_sglist:
  3374. pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
  3375. out_free_cmd:
  3376. pmcraid_return_cmd(cmd);
  3377. out_free_buffer:
  3378. kfree(buffer);
  3379. return rc;
  3380. }
  3381. /**
  3382. * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
  3383. *
  3384. * @pinstance: pointer to adapter instance structure
  3385. * @cmd: ioctl command passed in
  3386. * @buflen: length of user_buffer
  3387. * @user_buffer: user buffer pointer
  3388. *
  3389. * Return Value
  3390. * 0 in case of success, otherwise appropriate error code
  3391. */
  3392. static long pmcraid_ioctl_driver(
  3393. struct pmcraid_instance *pinstance,
  3394. unsigned int cmd,
  3395. unsigned int buflen,
  3396. void __user *user_buffer
  3397. )
  3398. {
  3399. int rc = -ENOSYS;
  3400. switch (cmd) {
  3401. case PMCRAID_IOCTL_RESET_ADAPTER:
  3402. pmcraid_reset_bringup(pinstance);
  3403. rc = 0;
  3404. break;
  3405. default:
  3406. break;
  3407. }
  3408. return rc;
  3409. }
  3410. /**
  3411. * pmcraid_check_ioctl_buffer - check for proper access to user buffer
  3412. *
  3413. * @cmd: ioctl command
  3414. * @arg: user buffer
  3415. * @hdr: pointer to kernel memory for pmcraid_ioctl_header
  3416. *
  3417. * Return Value
  3418. * negetive error code if there are access issues, otherwise zero.
  3419. * Upon success, returns ioctl header copied out of user buffer.
  3420. */
  3421. static int pmcraid_check_ioctl_buffer(
  3422. int cmd,
  3423. void __user *arg,
  3424. struct pmcraid_ioctl_header *hdr
  3425. )
  3426. {
  3427. int rc;
  3428. if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
  3429. pmcraid_err("couldn't copy ioctl header from user buffer\n");
  3430. return -EFAULT;
  3431. }
  3432. /* check for valid driver signature */
  3433. rc = memcmp(hdr->signature,
  3434. PMCRAID_IOCTL_SIGNATURE,
  3435. sizeof(hdr->signature));
  3436. if (rc) {
  3437. pmcraid_err("signature verification failed\n");
  3438. return -EINVAL;
  3439. }
  3440. return 0;
  3441. }
  3442. /**
  3443. * pmcraid_ioctl - char node ioctl entry point
  3444. */
  3445. static long pmcraid_chr_ioctl(
  3446. struct file *filep,
  3447. unsigned int cmd,
  3448. unsigned long arg
  3449. )
  3450. {
  3451. struct pmcraid_instance *pinstance = NULL;
  3452. struct pmcraid_ioctl_header *hdr = NULL;
  3453. void __user *argp = (void __user *)arg;
  3454. int retval = -ENOTTY;
  3455. hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
  3456. if (!hdr) {
  3457. pmcraid_err("failed to allocate memory for ioctl header\n");
  3458. return -ENOMEM;
  3459. }
  3460. retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
  3461. if (retval) {
  3462. pmcraid_info("chr_ioctl: header check failed\n");
  3463. kfree(hdr);
  3464. return retval;
  3465. }
  3466. pinstance = filep->private_data;
  3467. if (!pinstance) {
  3468. pmcraid_info("adapter instance is not found\n");
  3469. kfree(hdr);
  3470. return -ENOTTY;
  3471. }
  3472. switch (_IOC_TYPE(cmd)) {
  3473. case PMCRAID_PASSTHROUGH_IOCTL:
  3474. /* If ioctl code is to download microcode, we need to block
  3475. * mid-layer requests.
  3476. */
  3477. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3478. scsi_block_requests(pinstance->host);
  3479. retval = pmcraid_ioctl_passthrough(pinstance, cmd,
  3480. hdr->buffer_length, argp);
  3481. if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
  3482. scsi_unblock_requests(pinstance->host);
  3483. break;
  3484. case PMCRAID_DRIVER_IOCTL:
  3485. arg += sizeof(struct pmcraid_ioctl_header);
  3486. retval = pmcraid_ioctl_driver(pinstance, cmd,
  3487. hdr->buffer_length, argp);
  3488. break;
  3489. default:
  3490. retval = -ENOTTY;
  3491. break;
  3492. }
  3493. kfree(hdr);
  3494. return retval;
  3495. }
  3496. /**
  3497. * File operations structure for management interface
  3498. */
  3499. static const struct file_operations pmcraid_fops = {
  3500. .owner = THIS_MODULE,
  3501. .open = pmcraid_chr_open,
  3502. .fasync = pmcraid_chr_fasync,
  3503. .unlocked_ioctl = pmcraid_chr_ioctl,
  3504. #ifdef CONFIG_COMPAT
  3505. .compat_ioctl = pmcraid_chr_ioctl,
  3506. #endif
  3507. .llseek = noop_llseek,
  3508. };
  3509. /**
  3510. * pmcraid_show_log_level - Display adapter's error logging level
  3511. * @dev: class device struct
  3512. * @buf: buffer
  3513. *
  3514. * Return value:
  3515. * number of bytes printed to buffer
  3516. */
  3517. static ssize_t pmcraid_show_log_level(
  3518. struct device *dev,
  3519. struct device_attribute *attr,
  3520. char *buf)
  3521. {
  3522. struct Scsi_Host *shost = class_to_shost(dev);
  3523. struct pmcraid_instance *pinstance =
  3524. (struct pmcraid_instance *)shost->hostdata;
  3525. return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
  3526. }
  3527. /**
  3528. * pmcraid_store_log_level - Change the adapter's error logging level
  3529. * @dev: class device struct
  3530. * @buf: buffer
  3531. * @count: not used
  3532. *
  3533. * Return value:
  3534. * number of bytes printed to buffer
  3535. */
  3536. static ssize_t pmcraid_store_log_level(
  3537. struct device *dev,
  3538. struct device_attribute *attr,
  3539. const char *buf,
  3540. size_t count
  3541. )
  3542. {
  3543. struct Scsi_Host *shost;
  3544. struct pmcraid_instance *pinstance;
  3545. u8 val;
  3546. if (kstrtou8(buf, 10, &val))
  3547. return -EINVAL;
  3548. /* log-level should be from 0 to 2 */
  3549. if (val > 2)
  3550. return -EINVAL;
  3551. shost = class_to_shost(dev);
  3552. pinstance = (struct pmcraid_instance *)shost->hostdata;
  3553. pinstance->current_log_level = val;
  3554. return strlen(buf);
  3555. }
  3556. static struct device_attribute pmcraid_log_level_attr = {
  3557. .attr = {
  3558. .name = "log_level",
  3559. .mode = S_IRUGO | S_IWUSR,
  3560. },
  3561. .show = pmcraid_show_log_level,
  3562. .store = pmcraid_store_log_level,
  3563. };
  3564. /**
  3565. * pmcraid_show_drv_version - Display driver version
  3566. * @dev: class device struct
  3567. * @buf: buffer
  3568. *
  3569. * Return value:
  3570. * number of bytes printed to buffer
  3571. */
  3572. static ssize_t pmcraid_show_drv_version(
  3573. struct device *dev,
  3574. struct device_attribute *attr,
  3575. char *buf
  3576. )
  3577. {
  3578. return snprintf(buf, PAGE_SIZE, "version: %s\n",
  3579. PMCRAID_DRIVER_VERSION);
  3580. }
  3581. static struct device_attribute pmcraid_driver_version_attr = {
  3582. .attr = {
  3583. .name = "drv_version",
  3584. .mode = S_IRUGO,
  3585. },
  3586. .show = pmcraid_show_drv_version,
  3587. };
  3588. /**
  3589. * pmcraid_show_io_adapter_id - Display driver assigned adapter id
  3590. * @dev: class device struct
  3591. * @buf: buffer
  3592. *
  3593. * Return value:
  3594. * number of bytes printed to buffer
  3595. */
  3596. static ssize_t pmcraid_show_adapter_id(
  3597. struct device *dev,
  3598. struct device_attribute *attr,
  3599. char *buf
  3600. )
  3601. {
  3602. struct Scsi_Host *shost = class_to_shost(dev);
  3603. struct pmcraid_instance *pinstance =
  3604. (struct pmcraid_instance *)shost->hostdata;
  3605. u32 adapter_id = (pinstance->pdev->bus->number << 8) |
  3606. pinstance->pdev->devfn;
  3607. u32 aen_group = pmcraid_event_family.id;
  3608. return snprintf(buf, PAGE_SIZE,
  3609. "adapter id: %d\nminor: %d\naen group: %d\n",
  3610. adapter_id, MINOR(pinstance->cdev.dev), aen_group);
  3611. }
  3612. static struct device_attribute pmcraid_adapter_id_attr = {
  3613. .attr = {
  3614. .name = "adapter_id",
  3615. .mode = S_IRUGO,
  3616. },
  3617. .show = pmcraid_show_adapter_id,
  3618. };
  3619. static struct device_attribute *pmcraid_host_attrs[] = {
  3620. &pmcraid_log_level_attr,
  3621. &pmcraid_driver_version_attr,
  3622. &pmcraid_adapter_id_attr,
  3623. NULL,
  3624. };
  3625. /* host template structure for pmcraid driver */
  3626. static struct scsi_host_template pmcraid_host_template = {
  3627. .module = THIS_MODULE,
  3628. .name = PMCRAID_DRIVER_NAME,
  3629. .queuecommand = pmcraid_queuecommand,
  3630. .eh_abort_handler = pmcraid_eh_abort_handler,
  3631. .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
  3632. .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
  3633. .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
  3634. .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
  3635. .slave_alloc = pmcraid_slave_alloc,
  3636. .slave_configure = pmcraid_slave_configure,
  3637. .slave_destroy = pmcraid_slave_destroy,
  3638. .change_queue_depth = pmcraid_change_queue_depth,
  3639. .can_queue = PMCRAID_MAX_IO_CMD,
  3640. .this_id = -1,
  3641. .sg_tablesize = PMCRAID_MAX_IOADLS,
  3642. .max_sectors = PMCRAID_IOA_MAX_SECTORS,
  3643. .no_write_same = 1,
  3644. .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
  3645. .use_clustering = ENABLE_CLUSTERING,
  3646. .shost_attrs = pmcraid_host_attrs,
  3647. .proc_name = PMCRAID_DRIVER_NAME,
  3648. };
  3649. /*
  3650. * pmcraid_isr_msix - implements MSI-X interrupt handling routine
  3651. * @irq: interrupt vector number
  3652. * @dev_id: pointer hrrq_vector
  3653. *
  3654. * Return Value
  3655. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3656. */
  3657. static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
  3658. {
  3659. struct pmcraid_isr_param *hrrq_vector;
  3660. struct pmcraid_instance *pinstance;
  3661. unsigned long lock_flags;
  3662. u32 intrs_val;
  3663. int hrrq_id;
  3664. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3665. hrrq_id = hrrq_vector->hrrq_id;
  3666. pinstance = hrrq_vector->drv_inst;
  3667. if (!hrrq_id) {
  3668. /* Read the interrupt */
  3669. intrs_val = pmcraid_read_interrupts(pinstance);
  3670. if (intrs_val &&
  3671. ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
  3672. & DOORBELL_INTR_MSIX_CLR) == 0)) {
  3673. /* Any error interrupts including unit_check,
  3674. * initiate IOA reset.In case of unit check indicate
  3675. * to reset_sequence that IOA unit checked and prepare
  3676. * for a dump during reset sequence
  3677. */
  3678. if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
  3679. if (intrs_val & INTRS_IOA_UNIT_CHECK)
  3680. pinstance->ioa_unit_check = 1;
  3681. pmcraid_err("ISR: error interrupts: %x \
  3682. initiating reset\n", intrs_val);
  3683. spin_lock_irqsave(pinstance->host->host_lock,
  3684. lock_flags);
  3685. pmcraid_initiate_reset(pinstance);
  3686. spin_unlock_irqrestore(
  3687. pinstance->host->host_lock,
  3688. lock_flags);
  3689. }
  3690. /* If interrupt was as part of the ioa initialization,
  3691. * clear it. Delete the timer and wakeup the
  3692. * reset engine to proceed with reset sequence
  3693. */
  3694. if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
  3695. pmcraid_clr_trans_op(pinstance);
  3696. /* Clear the interrupt register by writing
  3697. * to host to ioa doorbell. Once done
  3698. * FW will clear the interrupt.
  3699. */
  3700. iowrite32(DOORBELL_INTR_MSIX_CLR,
  3701. pinstance->int_regs.host_ioa_interrupt_reg);
  3702. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3703. }
  3704. }
  3705. tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
  3706. return IRQ_HANDLED;
  3707. }
  3708. /**
  3709. * pmcraid_isr - implements legacy interrupt handling routine
  3710. *
  3711. * @irq: interrupt vector number
  3712. * @dev_id: pointer hrrq_vector
  3713. *
  3714. * Return Value
  3715. * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
  3716. */
  3717. static irqreturn_t pmcraid_isr(int irq, void *dev_id)
  3718. {
  3719. struct pmcraid_isr_param *hrrq_vector;
  3720. struct pmcraid_instance *pinstance;
  3721. u32 intrs;
  3722. unsigned long lock_flags;
  3723. int hrrq_id = 0;
  3724. /* In case of legacy interrupt mode where interrupts are shared across
  3725. * isrs, it may be possible that the current interrupt is not from IOA
  3726. */
  3727. if (!dev_id) {
  3728. printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
  3729. return IRQ_NONE;
  3730. }
  3731. hrrq_vector = (struct pmcraid_isr_param *)dev_id;
  3732. pinstance = hrrq_vector->drv_inst;
  3733. intrs = pmcraid_read_interrupts(pinstance);
  3734. if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
  3735. return IRQ_NONE;
  3736. /* Any error interrupts including unit_check, initiate IOA reset.
  3737. * In case of unit check indicate to reset_sequence that IOA unit
  3738. * checked and prepare for a dump during reset sequence
  3739. */
  3740. if (intrs & PMCRAID_ERROR_INTERRUPTS) {
  3741. if (intrs & INTRS_IOA_UNIT_CHECK)
  3742. pinstance->ioa_unit_check = 1;
  3743. iowrite32(intrs,
  3744. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3745. pmcraid_err("ISR: error interrupts: %x initiating reset\n",
  3746. intrs);
  3747. intrs = ioread32(
  3748. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3749. spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
  3750. pmcraid_initiate_reset(pinstance);
  3751. spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
  3752. } else {
  3753. /* If interrupt was as part of the ioa initialization,
  3754. * clear. Delete the timer and wakeup the
  3755. * reset engine to proceed with reset sequence
  3756. */
  3757. if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
  3758. pmcraid_clr_trans_op(pinstance);
  3759. } else {
  3760. iowrite32(intrs,
  3761. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3762. ioread32(
  3763. pinstance->int_regs.ioa_host_interrupt_clr_reg);
  3764. tasklet_schedule(
  3765. &(pinstance->isr_tasklet[hrrq_id]));
  3766. }
  3767. }
  3768. return IRQ_HANDLED;
  3769. }
  3770. /**
  3771. * pmcraid_worker_function - worker thread function
  3772. *
  3773. * @workp: pointer to struct work queue
  3774. *
  3775. * Return Value
  3776. * None
  3777. */
  3778. static void pmcraid_worker_function(struct work_struct *workp)
  3779. {
  3780. struct pmcraid_instance *pinstance;
  3781. struct pmcraid_resource_entry *res;
  3782. struct pmcraid_resource_entry *temp;
  3783. struct scsi_device *sdev;
  3784. unsigned long lock_flags;
  3785. unsigned long host_lock_flags;
  3786. u16 fw_version;
  3787. u8 bus, target, lun;
  3788. pinstance = container_of(workp, struct pmcraid_instance, worker_q);
  3789. /* add resources only after host is added into system */
  3790. if (!atomic_read(&pinstance->expose_resources))
  3791. return;
  3792. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  3793. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  3794. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
  3795. if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
  3796. sdev = res->scsi_dev;
  3797. /* host_lock must be held before calling
  3798. * scsi_device_get
  3799. */
  3800. spin_lock_irqsave(pinstance->host->host_lock,
  3801. host_lock_flags);
  3802. if (!scsi_device_get(sdev)) {
  3803. spin_unlock_irqrestore(
  3804. pinstance->host->host_lock,
  3805. host_lock_flags);
  3806. pmcraid_info("deleting %x from midlayer\n",
  3807. res->cfg_entry.resource_address);
  3808. list_move_tail(&res->queue,
  3809. &pinstance->free_res_q);
  3810. spin_unlock_irqrestore(
  3811. &pinstance->resource_lock,
  3812. lock_flags);
  3813. scsi_remove_device(sdev);
  3814. scsi_device_put(sdev);
  3815. spin_lock_irqsave(&pinstance->resource_lock,
  3816. lock_flags);
  3817. res->change_detected = 0;
  3818. } else {
  3819. spin_unlock_irqrestore(
  3820. pinstance->host->host_lock,
  3821. host_lock_flags);
  3822. }
  3823. }
  3824. }
  3825. list_for_each_entry(res, &pinstance->used_res_q, queue) {
  3826. if (res->change_detected == RES_CHANGE_ADD) {
  3827. if (!pmcraid_expose_resource(fw_version,
  3828. &res->cfg_entry))
  3829. continue;
  3830. if (RES_IS_VSET(res->cfg_entry)) {
  3831. bus = PMCRAID_VSET_BUS_ID;
  3832. if (fw_version <= PMCRAID_FW_VERSION_1)
  3833. target = res->cfg_entry.unique_flags1;
  3834. else
  3835. target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
  3836. lun = PMCRAID_VSET_LUN_ID;
  3837. } else {
  3838. bus = PMCRAID_PHYS_BUS_ID;
  3839. target =
  3840. RES_TARGET(
  3841. res->cfg_entry.resource_address);
  3842. lun = RES_LUN(res->cfg_entry.resource_address);
  3843. }
  3844. res->change_detected = 0;
  3845. spin_unlock_irqrestore(&pinstance->resource_lock,
  3846. lock_flags);
  3847. scsi_add_device(pinstance->host, bus, target, lun);
  3848. spin_lock_irqsave(&pinstance->resource_lock,
  3849. lock_flags);
  3850. }
  3851. }
  3852. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  3853. }
  3854. /**
  3855. * pmcraid_tasklet_function - Tasklet function
  3856. *
  3857. * @instance: pointer to msix param structure
  3858. *
  3859. * Return Value
  3860. * None
  3861. */
  3862. static void pmcraid_tasklet_function(unsigned long instance)
  3863. {
  3864. struct pmcraid_isr_param *hrrq_vector;
  3865. struct pmcraid_instance *pinstance;
  3866. unsigned long hrrq_lock_flags;
  3867. unsigned long pending_lock_flags;
  3868. unsigned long host_lock_flags;
  3869. spinlock_t *lockp; /* hrrq buffer lock */
  3870. int id;
  3871. u32 resp;
  3872. hrrq_vector = (struct pmcraid_isr_param *)instance;
  3873. pinstance = hrrq_vector->drv_inst;
  3874. id = hrrq_vector->hrrq_id;
  3875. lockp = &(pinstance->hrrq_lock[id]);
  3876. /* loop through each of the commands responded by IOA. Each HRRQ buf is
  3877. * protected by its own lock. Traversals must be done within this lock
  3878. * as there may be multiple tasklets running on multiple CPUs. Note
  3879. * that the lock is held just for picking up the response handle and
  3880. * manipulating hrrq_curr/toggle_bit values.
  3881. */
  3882. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3883. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3884. while ((resp & HRRQ_TOGGLE_BIT) ==
  3885. pinstance->host_toggle_bit[id]) {
  3886. int cmd_index = resp >> 2;
  3887. struct pmcraid_cmd *cmd = NULL;
  3888. if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
  3889. pinstance->hrrq_curr[id]++;
  3890. } else {
  3891. pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
  3892. pinstance->host_toggle_bit[id] ^= 1u;
  3893. }
  3894. if (cmd_index >= PMCRAID_MAX_CMD) {
  3895. /* In case of invalid response handle, log message */
  3896. pmcraid_err("Invalid response handle %d\n", cmd_index);
  3897. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3898. continue;
  3899. }
  3900. cmd = pinstance->cmd_list[cmd_index];
  3901. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3902. spin_lock_irqsave(&pinstance->pending_pool_lock,
  3903. pending_lock_flags);
  3904. list_del(&cmd->free_list);
  3905. spin_unlock_irqrestore(&pinstance->pending_pool_lock,
  3906. pending_lock_flags);
  3907. del_timer(&cmd->timer);
  3908. atomic_dec(&pinstance->outstanding_cmds);
  3909. if (cmd->cmd_done == pmcraid_ioa_reset) {
  3910. spin_lock_irqsave(pinstance->host->host_lock,
  3911. host_lock_flags);
  3912. cmd->cmd_done(cmd);
  3913. spin_unlock_irqrestore(pinstance->host->host_lock,
  3914. host_lock_flags);
  3915. } else if (cmd->cmd_done != NULL) {
  3916. cmd->cmd_done(cmd);
  3917. }
  3918. /* loop over until we are done with all responses */
  3919. spin_lock_irqsave(lockp, hrrq_lock_flags);
  3920. resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
  3921. }
  3922. spin_unlock_irqrestore(lockp, hrrq_lock_flags);
  3923. }
  3924. /**
  3925. * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
  3926. * @pinstance: pointer to adapter instance structure
  3927. *
  3928. * This routine un-registers registered interrupt handler and
  3929. * also frees irqs/vectors.
  3930. *
  3931. * Retun Value
  3932. * None
  3933. */
  3934. static
  3935. void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
  3936. {
  3937. struct pci_dev *pdev = pinstance->pdev;
  3938. int i;
  3939. for (i = 0; i < pinstance->num_hrrq; i++)
  3940. free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
  3941. pinstance->interrupt_mode = 0;
  3942. pci_free_irq_vectors(pdev);
  3943. }
  3944. /**
  3945. * pmcraid_register_interrupt_handler - registers interrupt handler
  3946. * @pinstance: pointer to per-adapter instance structure
  3947. *
  3948. * Return Value
  3949. * 0 on success, non-zero error code otherwise.
  3950. */
  3951. static int
  3952. pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
  3953. {
  3954. struct pci_dev *pdev = pinstance->pdev;
  3955. unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
  3956. int num_hrrq, rc, i;
  3957. irq_handler_t isr;
  3958. if (pmcraid_enable_msix)
  3959. irq_flag |= PCI_IRQ_MSIX;
  3960. num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
  3961. irq_flag);
  3962. if (num_hrrq < 0)
  3963. return num_hrrq;
  3964. if (pdev->msix_enabled) {
  3965. flag = 0;
  3966. isr = pmcraid_isr_msix;
  3967. } else {
  3968. flag = IRQF_SHARED;
  3969. isr = pmcraid_isr;
  3970. }
  3971. for (i = 0; i < num_hrrq; i++) {
  3972. struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
  3973. vec->hrrq_id = i;
  3974. vec->drv_inst = pinstance;
  3975. rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
  3976. PMCRAID_DRIVER_NAME, vec);
  3977. if (rc)
  3978. goto out_unwind;
  3979. }
  3980. pinstance->num_hrrq = num_hrrq;
  3981. if (pdev->msix_enabled) {
  3982. pinstance->interrupt_mode = 1;
  3983. iowrite32(DOORBELL_INTR_MODE_MSIX,
  3984. pinstance->int_regs.host_ioa_interrupt_reg);
  3985. ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
  3986. }
  3987. return 0;
  3988. out_unwind:
  3989. while (--i > 0)
  3990. free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
  3991. pci_free_irq_vectors(pdev);
  3992. return rc;
  3993. }
  3994. /**
  3995. * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
  3996. * @pinstance: per adapter instance structure pointer
  3997. * @max_index: number of buffer blocks to release
  3998. *
  3999. * Return Value
  4000. * None
  4001. */
  4002. static void
  4003. pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
  4004. {
  4005. int i;
  4006. for (i = 0; i < max_index; i++) {
  4007. kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
  4008. pinstance->cmd_list[i] = NULL;
  4009. }
  4010. kmem_cache_destroy(pinstance->cmd_cachep);
  4011. pinstance->cmd_cachep = NULL;
  4012. }
  4013. /**
  4014. * pmcraid_release_control_blocks - releases buffers alloced for control blocks
  4015. * @pinstance: pointer to per adapter instance structure
  4016. * @max_index: number of buffers (from 0 onwards) to release
  4017. *
  4018. * This function assumes that the command blocks for which control blocks are
  4019. * linked are not released.
  4020. *
  4021. * Return Value
  4022. * None
  4023. */
  4024. static void
  4025. pmcraid_release_control_blocks(
  4026. struct pmcraid_instance *pinstance,
  4027. int max_index
  4028. )
  4029. {
  4030. int i;
  4031. if (pinstance->control_pool == NULL)
  4032. return;
  4033. for (i = 0; i < max_index; i++) {
  4034. dma_pool_free(pinstance->control_pool,
  4035. pinstance->cmd_list[i]->ioa_cb,
  4036. pinstance->cmd_list[i]->ioa_cb_bus_addr);
  4037. pinstance->cmd_list[i]->ioa_cb = NULL;
  4038. pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
  4039. }
  4040. dma_pool_destroy(pinstance->control_pool);
  4041. pinstance->control_pool = NULL;
  4042. }
  4043. /**
  4044. * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
  4045. * @pinstance - pointer to per adapter instance structure
  4046. *
  4047. * Allocates memory for command blocks using kernel slab allocator.
  4048. *
  4049. * Return Value
  4050. * 0 in case of success; -ENOMEM in case of failure
  4051. */
  4052. static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
  4053. {
  4054. int i;
  4055. sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
  4056. pinstance->host->unique_id);
  4057. pinstance->cmd_cachep = kmem_cache_create(
  4058. pinstance->cmd_pool_name,
  4059. sizeof(struct pmcraid_cmd), 0,
  4060. SLAB_HWCACHE_ALIGN, NULL);
  4061. if (!pinstance->cmd_cachep)
  4062. return -ENOMEM;
  4063. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4064. pinstance->cmd_list[i] =
  4065. kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
  4066. if (!pinstance->cmd_list[i]) {
  4067. pmcraid_release_cmd_blocks(pinstance, i);
  4068. return -ENOMEM;
  4069. }
  4070. }
  4071. return 0;
  4072. }
  4073. /**
  4074. * pmcraid_allocate_control_blocks - allocates memory control blocks
  4075. * @pinstance : pointer to per adapter instance structure
  4076. *
  4077. * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
  4078. * and IOASAs. This is called after command blocks are already allocated.
  4079. *
  4080. * Return Value
  4081. * 0 in case it can allocate all control blocks, otherwise -ENOMEM
  4082. */
  4083. static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
  4084. {
  4085. int i;
  4086. sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
  4087. pinstance->host->unique_id);
  4088. pinstance->control_pool =
  4089. dma_pool_create(pinstance->ctl_pool_name,
  4090. &pinstance->pdev->dev,
  4091. sizeof(struct pmcraid_control_block),
  4092. PMCRAID_IOARCB_ALIGNMENT, 0);
  4093. if (!pinstance->control_pool)
  4094. return -ENOMEM;
  4095. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4096. pinstance->cmd_list[i]->ioa_cb =
  4097. dma_pool_alloc(
  4098. pinstance->control_pool,
  4099. GFP_KERNEL,
  4100. &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
  4101. if (!pinstance->cmd_list[i]->ioa_cb) {
  4102. pmcraid_release_control_blocks(pinstance, i);
  4103. return -ENOMEM;
  4104. }
  4105. memset(pinstance->cmd_list[i]->ioa_cb, 0,
  4106. sizeof(struct pmcraid_control_block));
  4107. }
  4108. return 0;
  4109. }
  4110. /**
  4111. * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
  4112. * @pinstance: pointer to per adapter instance structure
  4113. * @maxindex: size of hrrq buffer pointer array
  4114. *
  4115. * Return Value
  4116. * None
  4117. */
  4118. static void
  4119. pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
  4120. {
  4121. int i;
  4122. for (i = 0; i < maxindex; i++) {
  4123. pci_free_consistent(pinstance->pdev,
  4124. HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
  4125. pinstance->hrrq_start[i],
  4126. pinstance->hrrq_start_bus_addr[i]);
  4127. /* reset pointers and toggle bit to zeros */
  4128. pinstance->hrrq_start[i] = NULL;
  4129. pinstance->hrrq_start_bus_addr[i] = 0;
  4130. pinstance->host_toggle_bit[i] = 0;
  4131. }
  4132. }
  4133. /**
  4134. * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
  4135. * @pinstance: pointer to per adapter instance structure
  4136. *
  4137. * Return value
  4138. * 0 hrrq buffers are allocated, -ENOMEM otherwise.
  4139. */
  4140. static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
  4141. {
  4142. int i, buffer_size;
  4143. buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4144. for (i = 0; i < pinstance->num_hrrq; i++) {
  4145. pinstance->hrrq_start[i] =
  4146. pci_alloc_consistent(
  4147. pinstance->pdev,
  4148. buffer_size,
  4149. &(pinstance->hrrq_start_bus_addr[i]));
  4150. if (!pinstance->hrrq_start[i]) {
  4151. pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
  4152. i);
  4153. pmcraid_release_host_rrqs(pinstance, i);
  4154. return -ENOMEM;
  4155. }
  4156. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4157. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4158. pinstance->hrrq_end[i] =
  4159. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4160. pinstance->host_toggle_bit[i] = 1;
  4161. spin_lock_init(&pinstance->hrrq_lock[i]);
  4162. }
  4163. return 0;
  4164. }
  4165. /**
  4166. * pmcraid_release_hcams - release HCAM buffers
  4167. *
  4168. * @pinstance: pointer to per adapter instance structure
  4169. *
  4170. * Return value
  4171. * none
  4172. */
  4173. static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
  4174. {
  4175. if (pinstance->ccn.msg != NULL) {
  4176. pci_free_consistent(pinstance->pdev,
  4177. PMCRAID_AEN_HDR_SIZE +
  4178. sizeof(struct pmcraid_hcam_ccn_ext),
  4179. pinstance->ccn.msg,
  4180. pinstance->ccn.baddr);
  4181. pinstance->ccn.msg = NULL;
  4182. pinstance->ccn.hcam = NULL;
  4183. pinstance->ccn.baddr = 0;
  4184. }
  4185. if (pinstance->ldn.msg != NULL) {
  4186. pci_free_consistent(pinstance->pdev,
  4187. PMCRAID_AEN_HDR_SIZE +
  4188. sizeof(struct pmcraid_hcam_ldn),
  4189. pinstance->ldn.msg,
  4190. pinstance->ldn.baddr);
  4191. pinstance->ldn.msg = NULL;
  4192. pinstance->ldn.hcam = NULL;
  4193. pinstance->ldn.baddr = 0;
  4194. }
  4195. }
  4196. /**
  4197. * pmcraid_allocate_hcams - allocates HCAM buffers
  4198. * @pinstance : pointer to per adapter instance structure
  4199. *
  4200. * Return Value:
  4201. * 0 in case of successful allocation, non-zero otherwise
  4202. */
  4203. static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
  4204. {
  4205. pinstance->ccn.msg = pci_alloc_consistent(
  4206. pinstance->pdev,
  4207. PMCRAID_AEN_HDR_SIZE +
  4208. sizeof(struct pmcraid_hcam_ccn_ext),
  4209. &(pinstance->ccn.baddr));
  4210. pinstance->ldn.msg = pci_alloc_consistent(
  4211. pinstance->pdev,
  4212. PMCRAID_AEN_HDR_SIZE +
  4213. sizeof(struct pmcraid_hcam_ldn),
  4214. &(pinstance->ldn.baddr));
  4215. if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
  4216. pmcraid_release_hcams(pinstance);
  4217. } else {
  4218. pinstance->ccn.hcam =
  4219. (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
  4220. pinstance->ldn.hcam =
  4221. (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
  4222. atomic_set(&pinstance->ccn.ignore, 0);
  4223. atomic_set(&pinstance->ldn.ignore, 0);
  4224. }
  4225. return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
  4226. }
  4227. /**
  4228. * pmcraid_release_config_buffers - release config.table buffers
  4229. * @pinstance: pointer to per adapter instance structure
  4230. *
  4231. * Return Value
  4232. * none
  4233. */
  4234. static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
  4235. {
  4236. if (pinstance->cfg_table != NULL &&
  4237. pinstance->cfg_table_bus_addr != 0) {
  4238. pci_free_consistent(pinstance->pdev,
  4239. sizeof(struct pmcraid_config_table),
  4240. pinstance->cfg_table,
  4241. pinstance->cfg_table_bus_addr);
  4242. pinstance->cfg_table = NULL;
  4243. pinstance->cfg_table_bus_addr = 0;
  4244. }
  4245. if (pinstance->res_entries != NULL) {
  4246. int i;
  4247. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4248. list_del(&pinstance->res_entries[i].queue);
  4249. kfree(pinstance->res_entries);
  4250. pinstance->res_entries = NULL;
  4251. }
  4252. pmcraid_release_hcams(pinstance);
  4253. }
  4254. /**
  4255. * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
  4256. * @pinstance : pointer to per adapter instance structure
  4257. *
  4258. * Return Value
  4259. * 0 for successful allocation, -ENOMEM for any failure
  4260. */
  4261. static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
  4262. {
  4263. int i;
  4264. pinstance->res_entries =
  4265. kzalloc(sizeof(struct pmcraid_resource_entry) *
  4266. PMCRAID_MAX_RESOURCES, GFP_KERNEL);
  4267. if (NULL == pinstance->res_entries) {
  4268. pmcraid_err("failed to allocate memory for resource table\n");
  4269. return -ENOMEM;
  4270. }
  4271. for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
  4272. list_add_tail(&pinstance->res_entries[i].queue,
  4273. &pinstance->free_res_q);
  4274. pinstance->cfg_table =
  4275. pci_alloc_consistent(pinstance->pdev,
  4276. sizeof(struct pmcraid_config_table),
  4277. &pinstance->cfg_table_bus_addr);
  4278. if (NULL == pinstance->cfg_table) {
  4279. pmcraid_err("couldn't alloc DMA memory for config table\n");
  4280. pmcraid_release_config_buffers(pinstance);
  4281. return -ENOMEM;
  4282. }
  4283. if (pmcraid_allocate_hcams(pinstance)) {
  4284. pmcraid_err("could not alloc DMA memory for HCAMS\n");
  4285. pmcraid_release_config_buffers(pinstance);
  4286. return -ENOMEM;
  4287. }
  4288. return 0;
  4289. }
  4290. /**
  4291. * pmcraid_init_tasklets - registers tasklets for response handling
  4292. *
  4293. * @pinstance: pointer adapter instance structure
  4294. *
  4295. * Return value
  4296. * none
  4297. */
  4298. static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
  4299. {
  4300. int i;
  4301. for (i = 0; i < pinstance->num_hrrq; i++)
  4302. tasklet_init(&pinstance->isr_tasklet[i],
  4303. pmcraid_tasklet_function,
  4304. (unsigned long)&pinstance->hrrq_vector[i]);
  4305. }
  4306. /**
  4307. * pmcraid_kill_tasklets - destroys tasklets registered for response handling
  4308. *
  4309. * @pinstance: pointer to adapter instance structure
  4310. *
  4311. * Return value
  4312. * none
  4313. */
  4314. static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
  4315. {
  4316. int i;
  4317. for (i = 0; i < pinstance->num_hrrq; i++)
  4318. tasklet_kill(&pinstance->isr_tasklet[i]);
  4319. }
  4320. /**
  4321. * pmcraid_release_buffers - release per-adapter buffers allocated
  4322. *
  4323. * @pinstance: pointer to adapter soft state
  4324. *
  4325. * Return Value
  4326. * none
  4327. */
  4328. static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
  4329. {
  4330. pmcraid_release_config_buffers(pinstance);
  4331. pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
  4332. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4333. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4334. if (pinstance->inq_data != NULL) {
  4335. pci_free_consistent(pinstance->pdev,
  4336. sizeof(struct pmcraid_inquiry_data),
  4337. pinstance->inq_data,
  4338. pinstance->inq_data_baddr);
  4339. pinstance->inq_data = NULL;
  4340. pinstance->inq_data_baddr = 0;
  4341. }
  4342. if (pinstance->timestamp_data != NULL) {
  4343. pci_free_consistent(pinstance->pdev,
  4344. sizeof(struct pmcraid_timestamp_data),
  4345. pinstance->timestamp_data,
  4346. pinstance->timestamp_data_baddr);
  4347. pinstance->timestamp_data = NULL;
  4348. pinstance->timestamp_data_baddr = 0;
  4349. }
  4350. }
  4351. /**
  4352. * pmcraid_init_buffers - allocates memory and initializes various structures
  4353. * @pinstance: pointer to per adapter instance structure
  4354. *
  4355. * This routine pre-allocates memory based on the type of block as below:
  4356. * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
  4357. * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
  4358. * config-table entries : DMAable memory using pci_alloc_consistent
  4359. * HostRRQs : DMAable memory, using pci_alloc_consistent
  4360. *
  4361. * Return Value
  4362. * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
  4363. */
  4364. static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
  4365. {
  4366. int i;
  4367. if (pmcraid_allocate_host_rrqs(pinstance)) {
  4368. pmcraid_err("couldn't allocate memory for %d host rrqs\n",
  4369. pinstance->num_hrrq);
  4370. return -ENOMEM;
  4371. }
  4372. if (pmcraid_allocate_config_buffers(pinstance)) {
  4373. pmcraid_err("couldn't allocate memory for config buffers\n");
  4374. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4375. return -ENOMEM;
  4376. }
  4377. if (pmcraid_allocate_cmd_blocks(pinstance)) {
  4378. pmcraid_err("couldn't allocate memory for cmd blocks\n");
  4379. pmcraid_release_config_buffers(pinstance);
  4380. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4381. return -ENOMEM;
  4382. }
  4383. if (pmcraid_allocate_control_blocks(pinstance)) {
  4384. pmcraid_err("couldn't allocate memory control blocks\n");
  4385. pmcraid_release_config_buffers(pinstance);
  4386. pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
  4387. pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
  4388. return -ENOMEM;
  4389. }
  4390. /* allocate DMAable memory for page D0 INQUIRY buffer */
  4391. pinstance->inq_data = pci_alloc_consistent(
  4392. pinstance->pdev,
  4393. sizeof(struct pmcraid_inquiry_data),
  4394. &pinstance->inq_data_baddr);
  4395. if (pinstance->inq_data == NULL) {
  4396. pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
  4397. pmcraid_release_buffers(pinstance);
  4398. return -ENOMEM;
  4399. }
  4400. /* allocate DMAable memory for set timestamp data buffer */
  4401. pinstance->timestamp_data = pci_alloc_consistent(
  4402. pinstance->pdev,
  4403. sizeof(struct pmcraid_timestamp_data),
  4404. &pinstance->timestamp_data_baddr);
  4405. if (pinstance->timestamp_data == NULL) {
  4406. pmcraid_err("couldn't allocate DMA memory for \
  4407. set time_stamp \n");
  4408. pmcraid_release_buffers(pinstance);
  4409. return -ENOMEM;
  4410. }
  4411. /* Initialize all the command blocks and add them to free pool. No
  4412. * need to lock (free_pool_lock) as this is done in initialization
  4413. * itself
  4414. */
  4415. for (i = 0; i < PMCRAID_MAX_CMD; i++) {
  4416. struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
  4417. pmcraid_init_cmdblk(cmdp, i);
  4418. cmdp->drv_inst = pinstance;
  4419. list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
  4420. }
  4421. return 0;
  4422. }
  4423. /**
  4424. * pmcraid_reinit_buffers - resets various buffer pointers
  4425. * @pinstance: pointer to adapter instance
  4426. * Return value
  4427. * none
  4428. */
  4429. static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
  4430. {
  4431. int i;
  4432. int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
  4433. for (i = 0; i < pinstance->num_hrrq; i++) {
  4434. memset(pinstance->hrrq_start[i], 0, buffer_size);
  4435. pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
  4436. pinstance->hrrq_end[i] =
  4437. pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
  4438. pinstance->host_toggle_bit[i] = 1;
  4439. }
  4440. }
  4441. /**
  4442. * pmcraid_init_instance - initialize per instance data structure
  4443. * @pdev: pointer to pci device structure
  4444. * @host: pointer to Scsi_Host structure
  4445. * @mapped_pci_addr: memory mapped IOA configuration registers
  4446. *
  4447. * Return Value
  4448. * 0 on success, non-zero in case of any failure
  4449. */
  4450. static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
  4451. void __iomem *mapped_pci_addr)
  4452. {
  4453. struct pmcraid_instance *pinstance =
  4454. (struct pmcraid_instance *)host->hostdata;
  4455. pinstance->host = host;
  4456. pinstance->pdev = pdev;
  4457. /* Initialize register addresses */
  4458. pinstance->mapped_dma_addr = mapped_pci_addr;
  4459. /* Initialize chip-specific details */
  4460. {
  4461. struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
  4462. struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
  4463. pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
  4464. pint_regs->ioa_host_interrupt_reg =
  4465. mapped_pci_addr + chip_cfg->ioa_host_intr;
  4466. pint_regs->ioa_host_interrupt_clr_reg =
  4467. mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
  4468. pint_regs->ioa_host_msix_interrupt_reg =
  4469. mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
  4470. pint_regs->host_ioa_interrupt_reg =
  4471. mapped_pci_addr + chip_cfg->host_ioa_intr;
  4472. pint_regs->host_ioa_interrupt_clr_reg =
  4473. mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
  4474. /* Current version of firmware exposes interrupt mask set
  4475. * and mask clr registers through memory mapped bar0.
  4476. */
  4477. pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
  4478. pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
  4479. pint_regs->ioa_host_interrupt_mask_reg =
  4480. mapped_pci_addr + chip_cfg->ioa_host_mask;
  4481. pint_regs->ioa_host_interrupt_mask_clr_reg =
  4482. mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
  4483. pint_regs->global_interrupt_mask_reg =
  4484. mapped_pci_addr + chip_cfg->global_intr_mask;
  4485. };
  4486. pinstance->ioa_reset_attempts = 0;
  4487. init_waitqueue_head(&pinstance->reset_wait_q);
  4488. atomic_set(&pinstance->outstanding_cmds, 0);
  4489. atomic_set(&pinstance->last_message_id, 0);
  4490. atomic_set(&pinstance->expose_resources, 0);
  4491. INIT_LIST_HEAD(&pinstance->free_res_q);
  4492. INIT_LIST_HEAD(&pinstance->used_res_q);
  4493. INIT_LIST_HEAD(&pinstance->free_cmd_pool);
  4494. INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
  4495. spin_lock_init(&pinstance->free_pool_lock);
  4496. spin_lock_init(&pinstance->pending_pool_lock);
  4497. spin_lock_init(&pinstance->resource_lock);
  4498. mutex_init(&pinstance->aen_queue_lock);
  4499. /* Work-queue (Shared) for deferred processing error handling */
  4500. INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
  4501. /* Initialize the default log_level */
  4502. pinstance->current_log_level = pmcraid_log_level;
  4503. /* Setup variables required for reset engine */
  4504. pinstance->ioa_state = IOA_STATE_UNKNOWN;
  4505. pinstance->reset_cmd = NULL;
  4506. return 0;
  4507. }
  4508. /**
  4509. * pmcraid_shutdown - shutdown adapter controller.
  4510. * @pdev: pci device struct
  4511. *
  4512. * Issues an adapter shutdown to the card waits for its completion
  4513. *
  4514. * Return value
  4515. * none
  4516. */
  4517. static void pmcraid_shutdown(struct pci_dev *pdev)
  4518. {
  4519. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4520. pmcraid_reset_bringdown(pinstance);
  4521. }
  4522. /**
  4523. * pmcraid_get_minor - returns unused minor number from minor number bitmap
  4524. */
  4525. static unsigned short pmcraid_get_minor(void)
  4526. {
  4527. int minor;
  4528. minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
  4529. __set_bit(minor, pmcraid_minor);
  4530. return minor;
  4531. }
  4532. /**
  4533. * pmcraid_release_minor - releases given minor back to minor number bitmap
  4534. */
  4535. static void pmcraid_release_minor(unsigned short minor)
  4536. {
  4537. __clear_bit(minor, pmcraid_minor);
  4538. }
  4539. /**
  4540. * pmcraid_setup_chrdev - allocates a minor number and registers a char device
  4541. *
  4542. * @pinstance: pointer to adapter instance for which to register device
  4543. *
  4544. * Return value
  4545. * 0 in case of success, otherwise non-zero
  4546. */
  4547. static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
  4548. {
  4549. int minor;
  4550. int error;
  4551. minor = pmcraid_get_minor();
  4552. cdev_init(&pinstance->cdev, &pmcraid_fops);
  4553. pinstance->cdev.owner = THIS_MODULE;
  4554. error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
  4555. if (error)
  4556. pmcraid_release_minor(minor);
  4557. else
  4558. device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
  4559. NULL, "%s%u", PMCRAID_DEVFILE, minor);
  4560. return error;
  4561. }
  4562. /**
  4563. * pmcraid_release_chrdev - unregisters per-adapter management interface
  4564. *
  4565. * @pinstance: pointer to adapter instance structure
  4566. *
  4567. * Return value
  4568. * none
  4569. */
  4570. static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
  4571. {
  4572. pmcraid_release_minor(MINOR(pinstance->cdev.dev));
  4573. device_destroy(pmcraid_class,
  4574. MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
  4575. cdev_del(&pinstance->cdev);
  4576. }
  4577. /**
  4578. * pmcraid_remove - IOA hot plug remove entry point
  4579. * @pdev: pci device struct
  4580. *
  4581. * Return value
  4582. * none
  4583. */
  4584. static void pmcraid_remove(struct pci_dev *pdev)
  4585. {
  4586. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4587. /* remove the management interface (/dev file) for this device */
  4588. pmcraid_release_chrdev(pinstance);
  4589. /* remove host template from scsi midlayer */
  4590. scsi_remove_host(pinstance->host);
  4591. /* block requests from mid-layer */
  4592. scsi_block_requests(pinstance->host);
  4593. /* initiate shutdown adapter */
  4594. pmcraid_shutdown(pdev);
  4595. pmcraid_disable_interrupts(pinstance, ~0);
  4596. flush_work(&pinstance->worker_q);
  4597. pmcraid_kill_tasklets(pinstance);
  4598. pmcraid_unregister_interrupt_handler(pinstance);
  4599. pmcraid_release_buffers(pinstance);
  4600. iounmap(pinstance->mapped_dma_addr);
  4601. pci_release_regions(pdev);
  4602. scsi_host_put(pinstance->host);
  4603. pci_disable_device(pdev);
  4604. return;
  4605. }
  4606. #ifdef CONFIG_PM
  4607. /**
  4608. * pmcraid_suspend - driver suspend entry point for power management
  4609. * @pdev: PCI device structure
  4610. * @state: PCI power state to suspend routine
  4611. *
  4612. * Return Value - 0 always
  4613. */
  4614. static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
  4615. {
  4616. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4617. pmcraid_shutdown(pdev);
  4618. pmcraid_disable_interrupts(pinstance, ~0);
  4619. pmcraid_kill_tasklets(pinstance);
  4620. pci_set_drvdata(pinstance->pdev, pinstance);
  4621. pmcraid_unregister_interrupt_handler(pinstance);
  4622. pci_save_state(pdev);
  4623. pci_disable_device(pdev);
  4624. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4625. return 0;
  4626. }
  4627. /**
  4628. * pmcraid_resume - driver resume entry point PCI power management
  4629. * @pdev: PCI device structure
  4630. *
  4631. * Return Value - 0 in case of success. Error code in case of any failure
  4632. */
  4633. static int pmcraid_resume(struct pci_dev *pdev)
  4634. {
  4635. struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
  4636. struct Scsi_Host *host = pinstance->host;
  4637. int rc;
  4638. pci_set_power_state(pdev, PCI_D0);
  4639. pci_enable_wake(pdev, PCI_D0, 0);
  4640. pci_restore_state(pdev);
  4641. rc = pci_enable_device(pdev);
  4642. if (rc) {
  4643. dev_err(&pdev->dev, "resume: Enable device failed\n");
  4644. return rc;
  4645. }
  4646. pci_set_master(pdev);
  4647. if ((sizeof(dma_addr_t) == 4) ||
  4648. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4649. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4650. if (rc == 0)
  4651. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4652. if (rc != 0) {
  4653. dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
  4654. goto disable_device;
  4655. }
  4656. pmcraid_disable_interrupts(pinstance, ~0);
  4657. atomic_set(&pinstance->outstanding_cmds, 0);
  4658. rc = pmcraid_register_interrupt_handler(pinstance);
  4659. if (rc) {
  4660. dev_err(&pdev->dev,
  4661. "resume: couldn't register interrupt handlers\n");
  4662. rc = -ENODEV;
  4663. goto release_host;
  4664. }
  4665. pmcraid_init_tasklets(pinstance);
  4666. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  4667. /* Start with hard reset sequence which brings up IOA to operational
  4668. * state as well as completes the reset sequence.
  4669. */
  4670. pinstance->ioa_hard_reset = 1;
  4671. /* Start IOA firmware initialization and bring card to Operational
  4672. * state.
  4673. */
  4674. if (pmcraid_reset_bringup(pinstance)) {
  4675. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  4676. rc = -ENODEV;
  4677. goto release_tasklets;
  4678. }
  4679. return 0;
  4680. release_tasklets:
  4681. pmcraid_disable_interrupts(pinstance, ~0);
  4682. pmcraid_kill_tasklets(pinstance);
  4683. pmcraid_unregister_interrupt_handler(pinstance);
  4684. release_host:
  4685. scsi_host_put(host);
  4686. disable_device:
  4687. pci_disable_device(pdev);
  4688. return rc;
  4689. }
  4690. #else
  4691. #define pmcraid_suspend NULL
  4692. #define pmcraid_resume NULL
  4693. #endif /* CONFIG_PM */
  4694. /**
  4695. * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
  4696. * completion of the ioa reset
  4697. * @cmd: pointer to reset command block
  4698. */
  4699. static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
  4700. {
  4701. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4702. unsigned long flags;
  4703. spin_lock_irqsave(pinstance->host->host_lock, flags);
  4704. pmcraid_ioa_reset(cmd);
  4705. spin_unlock_irqrestore(pinstance->host->host_lock, flags);
  4706. scsi_unblock_requests(pinstance->host);
  4707. schedule_work(&pinstance->worker_q);
  4708. }
  4709. /**
  4710. * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
  4711. *
  4712. * @cmd: pointer to pmcraid_cmd structure
  4713. *
  4714. * Return Value
  4715. * 0 for success or non-zero for failure cases
  4716. */
  4717. static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
  4718. {
  4719. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4720. void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
  4721. pmcraid_reinit_cmdblk(cmd);
  4722. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4723. ioarcb->request_type = REQ_TYPE_IOACMD;
  4724. ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
  4725. ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
  4726. /* If this was called as part of resource table reinitialization due to
  4727. * lost CCN, it is enough to return the command block back to free pool
  4728. * as part of set_supported_devs completion function.
  4729. */
  4730. if (cmd->drv_inst->reinit_cfg_table) {
  4731. cmd->drv_inst->reinit_cfg_table = 0;
  4732. cmd->release = 1;
  4733. cmd_done = pmcraid_reinit_cfgtable_done;
  4734. }
  4735. /* we will be done with the reset sequence after set supported devices,
  4736. * setup the done function to return the command block back to free
  4737. * pool
  4738. */
  4739. pmcraid_send_cmd(cmd,
  4740. cmd_done,
  4741. PMCRAID_SET_SUP_DEV_TIMEOUT,
  4742. pmcraid_timeout_handler);
  4743. return;
  4744. }
  4745. /**
  4746. * pmcraid_set_timestamp - set the timestamp to IOAFP
  4747. *
  4748. * @cmd: pointer to pmcraid_cmd structure
  4749. *
  4750. * Return Value
  4751. * 0 for success or non-zero for failure cases
  4752. */
  4753. static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
  4754. {
  4755. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4756. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4757. __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
  4758. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  4759. u64 timestamp;
  4760. timestamp = ktime_get_real_seconds() * 1000;
  4761. pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
  4762. pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
  4763. pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
  4764. pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
  4765. pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
  4766. pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
  4767. pmcraid_reinit_cmdblk(cmd);
  4768. ioarcb->request_type = REQ_TYPE_SCSI;
  4769. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4770. ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
  4771. ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
  4772. memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
  4773. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4774. offsetof(struct pmcraid_ioarcb,
  4775. add_data.u.ioadl[0]));
  4776. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4777. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
  4778. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4779. ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
  4780. ioarcb->data_transfer_length =
  4781. cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4782. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4783. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4784. ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
  4785. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
  4786. if (!pinstance->timestamp_error) {
  4787. pinstance->timestamp_error = 0;
  4788. pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
  4789. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4790. } else {
  4791. pmcraid_send_cmd(cmd, pmcraid_return_cmd,
  4792. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4793. return;
  4794. }
  4795. }
  4796. /**
  4797. * pmcraid_init_res_table - Initialize the resource table
  4798. * @cmd: pointer to pmcraid command struct
  4799. *
  4800. * This function looks through the existing resource table, comparing
  4801. * it with the config table. This function will take care of old/new
  4802. * devices and schedule adding/removing them from the mid-layer
  4803. * as appropriate.
  4804. *
  4805. * Return value
  4806. * None
  4807. */
  4808. static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
  4809. {
  4810. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4811. struct pmcraid_resource_entry *res, *temp;
  4812. struct pmcraid_config_table_entry *cfgte;
  4813. unsigned long lock_flags;
  4814. int found, rc, i;
  4815. u16 fw_version;
  4816. LIST_HEAD(old_res);
  4817. if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
  4818. pmcraid_err("IOA requires microcode download\n");
  4819. fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
  4820. /* resource list is protected by pinstance->resource_lock.
  4821. * init_res_table can be called from probe (user-thread) or runtime
  4822. * reset (timer/tasklet)
  4823. */
  4824. spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
  4825. list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
  4826. list_move_tail(&res->queue, &old_res);
  4827. for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
  4828. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4829. PMCRAID_FW_VERSION_1)
  4830. cfgte = &pinstance->cfg_table->entries[i];
  4831. else
  4832. cfgte = (struct pmcraid_config_table_entry *)
  4833. &pinstance->cfg_table->entries_ext[i];
  4834. if (!pmcraid_expose_resource(fw_version, cfgte))
  4835. continue;
  4836. found = 0;
  4837. /* If this entry was already detected and initialized */
  4838. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4839. rc = memcmp(&res->cfg_entry.resource_address,
  4840. &cfgte->resource_address,
  4841. sizeof(cfgte->resource_address));
  4842. if (!rc) {
  4843. list_move_tail(&res->queue,
  4844. &pinstance->used_res_q);
  4845. found = 1;
  4846. break;
  4847. }
  4848. }
  4849. /* If this is new entry, initialize it and add it the queue */
  4850. if (!found) {
  4851. if (list_empty(&pinstance->free_res_q)) {
  4852. pmcraid_err("Too many devices attached\n");
  4853. break;
  4854. }
  4855. found = 1;
  4856. res = list_entry(pinstance->free_res_q.next,
  4857. struct pmcraid_resource_entry, queue);
  4858. res->scsi_dev = NULL;
  4859. res->change_detected = RES_CHANGE_ADD;
  4860. res->reset_progress = 0;
  4861. list_move_tail(&res->queue, &pinstance->used_res_q);
  4862. }
  4863. /* copy new configuration table entry details into driver
  4864. * maintained resource entry
  4865. */
  4866. if (found) {
  4867. memcpy(&res->cfg_entry, cfgte,
  4868. pinstance->config_table_entry_size);
  4869. pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
  4870. res->cfg_entry.resource_type,
  4871. (fw_version <= PMCRAID_FW_VERSION_1 ?
  4872. res->cfg_entry.unique_flags1 :
  4873. le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
  4874. le32_to_cpu(res->cfg_entry.resource_address));
  4875. }
  4876. }
  4877. /* Detect any deleted entries, mark them for deletion from mid-layer */
  4878. list_for_each_entry_safe(res, temp, &old_res, queue) {
  4879. if (res->scsi_dev) {
  4880. res->change_detected = RES_CHANGE_DEL;
  4881. res->cfg_entry.resource_handle =
  4882. PMCRAID_INVALID_RES_HANDLE;
  4883. list_move_tail(&res->queue, &pinstance->used_res_q);
  4884. } else {
  4885. list_move_tail(&res->queue, &pinstance->free_res_q);
  4886. }
  4887. }
  4888. /* release the resource list lock */
  4889. spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
  4890. pmcraid_set_timestamp(cmd);
  4891. }
  4892. /**
  4893. * pmcraid_querycfg - Send a Query IOA Config to the adapter.
  4894. * @cmd: pointer pmcraid_cmd struct
  4895. *
  4896. * This function sends a Query IOA Configuration command to the adapter to
  4897. * retrieve the IOA configuration table.
  4898. *
  4899. * Return value:
  4900. * none
  4901. */
  4902. static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
  4903. {
  4904. struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
  4905. struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
  4906. struct pmcraid_instance *pinstance = cmd->drv_inst;
  4907. __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
  4908. if (be16_to_cpu(pinstance->inq_data->fw_version) <=
  4909. PMCRAID_FW_VERSION_1)
  4910. pinstance->config_table_entry_size =
  4911. sizeof(struct pmcraid_config_table_entry);
  4912. else
  4913. pinstance->config_table_entry_size =
  4914. sizeof(struct pmcraid_config_table_entry_ext);
  4915. ioarcb->request_type = REQ_TYPE_IOACMD;
  4916. ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
  4917. ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
  4918. /* firmware requires 4-byte length field, specified in B.E format */
  4919. memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
  4920. /* Since entire config table can be described by single IOADL, it can
  4921. * be part of IOARCB itself
  4922. */
  4923. ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
  4924. offsetof(struct pmcraid_ioarcb,
  4925. add_data.u.ioadl[0]));
  4926. ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
  4927. ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
  4928. ioarcb->request_flags0 |= NO_LINK_DESCS;
  4929. ioarcb->data_transfer_length =
  4930. cpu_to_le32(sizeof(struct pmcraid_config_table));
  4931. ioadl = &(ioarcb->add_data.u.ioadl[0]);
  4932. ioadl->flags = IOADL_FLAGS_LAST_DESC;
  4933. ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
  4934. ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
  4935. pmcraid_send_cmd(cmd, pmcraid_init_res_table,
  4936. PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
  4937. }
  4938. /**
  4939. * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
  4940. * @pdev: pointer to pci device structure
  4941. * @dev_id: pointer to device ids structure
  4942. *
  4943. * Return Value
  4944. * returns 0 if the device is claimed and successfully configured.
  4945. * returns non-zero error code in case of any failure
  4946. */
  4947. static int pmcraid_probe(struct pci_dev *pdev,
  4948. const struct pci_device_id *dev_id)
  4949. {
  4950. struct pmcraid_instance *pinstance;
  4951. struct Scsi_Host *host;
  4952. void __iomem *mapped_pci_addr;
  4953. int rc = PCIBIOS_SUCCESSFUL;
  4954. if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
  4955. pmcraid_err
  4956. ("maximum number(%d) of supported adapters reached\n",
  4957. atomic_read(&pmcraid_adapter_count));
  4958. return -ENOMEM;
  4959. }
  4960. atomic_inc(&pmcraid_adapter_count);
  4961. rc = pci_enable_device(pdev);
  4962. if (rc) {
  4963. dev_err(&pdev->dev, "Cannot enable adapter\n");
  4964. atomic_dec(&pmcraid_adapter_count);
  4965. return rc;
  4966. }
  4967. dev_info(&pdev->dev,
  4968. "Found new IOA(%x:%x), Total IOA count: %d\n",
  4969. pdev->vendor, pdev->device,
  4970. atomic_read(&pmcraid_adapter_count));
  4971. rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
  4972. if (rc < 0) {
  4973. dev_err(&pdev->dev,
  4974. "Couldn't register memory range of registers\n");
  4975. goto out_disable_device;
  4976. }
  4977. mapped_pci_addr = pci_iomap(pdev, 0, 0);
  4978. if (!mapped_pci_addr) {
  4979. dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
  4980. rc = -ENOMEM;
  4981. goto out_release_regions;
  4982. }
  4983. pci_set_master(pdev);
  4984. /* Firmware requires the system bus address of IOARCB to be within
  4985. * 32-bit addressable range though it has 64-bit IOARRIN register.
  4986. * However, firmware supports 64-bit streaming DMA buffers, whereas
  4987. * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
  4988. * returns memory within 4GB (if not, change this logic), coherent
  4989. * buffers are within firmware acceptable address ranges.
  4990. */
  4991. if ((sizeof(dma_addr_t) == 4) ||
  4992. pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
  4993. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4994. /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
  4995. * bit mask for pci_alloc_consistent to return addresses within 4GB
  4996. */
  4997. if (rc == 0)
  4998. rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4999. if (rc != 0) {
  5000. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  5001. goto cleanup_nomem;
  5002. }
  5003. host = scsi_host_alloc(&pmcraid_host_template,
  5004. sizeof(struct pmcraid_instance));
  5005. if (!host) {
  5006. dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
  5007. rc = -ENOMEM;
  5008. goto cleanup_nomem;
  5009. }
  5010. host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
  5011. host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
  5012. host->unique_id = host->host_no;
  5013. host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
  5014. host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
  5015. /* zero out entire instance structure */
  5016. pinstance = (struct pmcraid_instance *)host->hostdata;
  5017. memset(pinstance, 0, sizeof(*pinstance));
  5018. pinstance->chip_cfg =
  5019. (struct pmcraid_chip_details *)(dev_id->driver_data);
  5020. rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
  5021. if (rc < 0) {
  5022. dev_err(&pdev->dev, "failed to initialize adapter instance\n");
  5023. goto out_scsi_host_put;
  5024. }
  5025. pci_set_drvdata(pdev, pinstance);
  5026. /* Save PCI config-space for use following the reset */
  5027. rc = pci_save_state(pinstance->pdev);
  5028. if (rc != 0) {
  5029. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  5030. goto out_scsi_host_put;
  5031. }
  5032. pmcraid_disable_interrupts(pinstance, ~0);
  5033. rc = pmcraid_register_interrupt_handler(pinstance);
  5034. if (rc) {
  5035. dev_err(&pdev->dev, "couldn't register interrupt handler\n");
  5036. goto out_scsi_host_put;
  5037. }
  5038. pmcraid_init_tasklets(pinstance);
  5039. /* allocate verious buffers used by LLD.*/
  5040. rc = pmcraid_init_buffers(pinstance);
  5041. if (rc) {
  5042. pmcraid_err("couldn't allocate memory blocks\n");
  5043. goto out_unregister_isr;
  5044. }
  5045. /* check the reset type required */
  5046. pmcraid_reset_type(pinstance);
  5047. pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
  5048. /* Start IOA firmware initialization and bring card to Operational
  5049. * state.
  5050. */
  5051. pmcraid_info("starting IOA initialization sequence\n");
  5052. if (pmcraid_reset_bringup(pinstance)) {
  5053. dev_err(&pdev->dev, "couldn't initialize IOA\n");
  5054. rc = 1;
  5055. goto out_release_bufs;
  5056. }
  5057. /* Add adapter instance into mid-layer list */
  5058. rc = scsi_add_host(pinstance->host, &pdev->dev);
  5059. if (rc != 0) {
  5060. pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
  5061. goto out_release_bufs;
  5062. }
  5063. scsi_scan_host(pinstance->host);
  5064. rc = pmcraid_setup_chrdev(pinstance);
  5065. if (rc != 0) {
  5066. pmcraid_err("couldn't create mgmt interface, error: %x\n",
  5067. rc);
  5068. goto out_remove_host;
  5069. }
  5070. /* Schedule worker thread to handle CCN and take care of adding and
  5071. * removing devices to OS
  5072. */
  5073. atomic_set(&pinstance->expose_resources, 1);
  5074. schedule_work(&pinstance->worker_q);
  5075. return rc;
  5076. out_remove_host:
  5077. scsi_remove_host(host);
  5078. out_release_bufs:
  5079. pmcraid_release_buffers(pinstance);
  5080. out_unregister_isr:
  5081. pmcraid_kill_tasklets(pinstance);
  5082. pmcraid_unregister_interrupt_handler(pinstance);
  5083. out_scsi_host_put:
  5084. scsi_host_put(host);
  5085. cleanup_nomem:
  5086. iounmap(mapped_pci_addr);
  5087. out_release_regions:
  5088. pci_release_regions(pdev);
  5089. out_disable_device:
  5090. atomic_dec(&pmcraid_adapter_count);
  5091. pci_disable_device(pdev);
  5092. return -ENODEV;
  5093. }
  5094. /*
  5095. * PCI driver structure of pcmraid driver
  5096. */
  5097. static struct pci_driver pmcraid_driver = {
  5098. .name = PMCRAID_DRIVER_NAME,
  5099. .id_table = pmcraid_pci_table,
  5100. .probe = pmcraid_probe,
  5101. .remove = pmcraid_remove,
  5102. .suspend = pmcraid_suspend,
  5103. .resume = pmcraid_resume,
  5104. .shutdown = pmcraid_shutdown
  5105. };
  5106. /**
  5107. * pmcraid_init - module load entry point
  5108. */
  5109. static int __init pmcraid_init(void)
  5110. {
  5111. dev_t dev;
  5112. int error;
  5113. pmcraid_info("%s Device Driver version: %s\n",
  5114. PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
  5115. error = alloc_chrdev_region(&dev, 0,
  5116. PMCRAID_MAX_ADAPTERS,
  5117. PMCRAID_DEVFILE);
  5118. if (error) {
  5119. pmcraid_err("failed to get a major number for adapters\n");
  5120. goto out_init;
  5121. }
  5122. pmcraid_major = MAJOR(dev);
  5123. pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
  5124. if (IS_ERR(pmcraid_class)) {
  5125. error = PTR_ERR(pmcraid_class);
  5126. pmcraid_err("failed to register with sysfs, error = %x\n",
  5127. error);
  5128. goto out_unreg_chrdev;
  5129. }
  5130. error = pmcraid_netlink_init();
  5131. if (error) {
  5132. class_destroy(pmcraid_class);
  5133. goto out_unreg_chrdev;
  5134. }
  5135. error = pci_register_driver(&pmcraid_driver);
  5136. if (error == 0)
  5137. goto out_init;
  5138. pmcraid_err("failed to register pmcraid driver, error = %x\n",
  5139. error);
  5140. class_destroy(pmcraid_class);
  5141. pmcraid_netlink_release();
  5142. out_unreg_chrdev:
  5143. unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
  5144. out_init:
  5145. return error;
  5146. }
  5147. /**
  5148. * pmcraid_exit - module unload entry point
  5149. */
  5150. static void __exit pmcraid_exit(void)
  5151. {
  5152. pmcraid_netlink_release();
  5153. unregister_chrdev_region(MKDEV(pmcraid_major, 0),
  5154. PMCRAID_MAX_ADAPTERS);
  5155. pci_unregister_driver(&pmcraid_driver);
  5156. class_destroy(pmcraid_class);
  5157. }
  5158. module_init(pmcraid_init);
  5159. module_exit(pmcraid_exit);