rtc-mt6358.c 31 KB

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  1. /*
  2. * Copyright (C) 2018 MediaTek, Inc.
  3. * Copyright (C) 2021 XiaoMi, Inc.
  4. * Author: Wilma Wu <wilma.wu@mediatek.com>
  5. *
  6. * This software is licensed under the terms of the GNU General Public
  7. * License version 2, as published by the Free Software Foundation, and
  8. * may be copied, distributed, and modified under those terms.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #include <asm/div64.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/pm.h>
  21. #include <linux/pm_wakeup.h>
  22. #include <linux/reboot.h>
  23. #include <linux/regmap.h>
  24. #include <linux/rtc.h>
  25. #include <linux/sched/clock.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/types.h>
  28. #include <linux/bitops.h>
  29. #include <linux/mfd/mt6358/core.h>
  30. #include <linux/irqdomain.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/of_address.h>
  33. #include <linux/of_irq.h>
  34. #include <linux/io.h>
  35. #include <asm/div64.h>
  36. /* For KPOC alarm */
  37. #include <linux/notifier.h>
  38. #include <linux/suspend.h>
  39. #include <linux/completion.h>
  40. #include <linux/workqueue.h>
  41. #include <linux/jiffies.h>
  42. #include <linux/cpumask.h>
  43. #include "../misc/mediatek/include/mt-plat/mtk_boot_common.h"
  44. #include "../misc/mediatek/include/mt-plat/mtk_reboot.h"
  45. #include <linux/debugfs.h>
  46. #ifdef pr_fmt
  47. #undef pr_fmt
  48. #endif
  49. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  50. #define RTC_NAME "mt-rtc"
  51. #define IPIMB
  52. /* we map HW YEA 0 (2000) to 1968 not 1970 because 2000 is the leap year */
  53. #define RTC_MIN_YEAR 1968
  54. #define RTC_BASE_YEAR 1900
  55. #define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR)
  56. /* Min, Hour, Dom... register offset to RTC_TC_SEC */
  57. #define RTC_OFFSET_SEC 0
  58. #define RTC_OFFSET_MIN 1
  59. #define RTC_OFFSET_HOUR 2
  60. #define RTC_OFFSET_DOM 3
  61. #define RTC_OFFSET_DOW 4
  62. #define RTC_OFFSET_MTH 5
  63. #define RTC_OFFSET_YEAR 6
  64. #define RTC_OFFSET_COUNT 7
  65. #define RTC_DSN_ID 0x580
  66. #define RTC_BBPU 0x8
  67. #define RTC_IRQ_STA 0xa
  68. #define RTC_IRQ_EN 0xc
  69. #define RTC_AL_MASK 0x10
  70. #define RTC_TC_SEC 0x12
  71. #define RTC_AL_SEC 0x20
  72. #define RTC_AL_MIN 0x22
  73. #define RTC_AL_HOU 0x24
  74. #define RTC_AL_DOM 0x26
  75. #define RTC_AL_DOW 0x28
  76. #define RTC_AL_MTH 0x2a
  77. #define RTC_AL_YEA 0x2c
  78. #define RTC_OSC32CON 0x2e
  79. #define RTC_POWERKEY1 0x30
  80. #define RTC_POWERKEY2 0x32
  81. #define RTC_PDN1 0x34
  82. #define RTC_PDN2 0x36
  83. #define RTC_SPAR0 0x38
  84. #define RTC_SPAR1 0x3a
  85. #define RTC_PROT 0x3c
  86. #define RTC_WRTGR 0x42
  87. #define RTC_CON 0x44
  88. #define RTC_TC_SEC_MASK 0x3f
  89. #define RTC_TC_MIN_MASK 0x3f
  90. #define RTC_TC_HOU_MASK 0x1f
  91. #define RTC_TC_DOM_MASK 0x1f
  92. #define RTC_TC_DOW_MASK 0x7
  93. #define RTC_TC_MTH_MASK 0xf
  94. #define RTC_TC_YEA_MASK 0x7f
  95. #define RTC_AL_SEC_MASK 0x3f
  96. #define RTC_AL_MIN_MASK 0x3f
  97. #define RTC_AL_HOU_MASK 0x1f
  98. #define RTC_AL_DOM_MASK 0x1f
  99. #define RTC_AL_DOW_MASK 0x7
  100. #define RTC_AL_MTH_MASK 0xf
  101. #define RTC_AL_YEA_MASK 0x7f
  102. #define RTC_PWRON_SEC_SHIFT 0x0
  103. #define RTC_PWRON_MIN_SHIFT 0x0
  104. #define RTC_PWRON_HOU_SHIFT 0x6
  105. #define RTC_PWRON_DOM_SHIFT 0xb
  106. #define RTC_PWRON_MTH_SHIFT 0x0
  107. #define RTC_PWRON_YEA_SHIFT 0x8
  108. #define RTC_PWRON_SEC_MASK (RTC_AL_SEC_MASK << RTC_PWRON_SEC_SHIFT)
  109. #define RTC_PWRON_MIN_MASK (RTC_AL_MIN_MASK << RTC_PWRON_MIN_SHIFT)
  110. #define RTC_PWRON_HOU_MASK (RTC_AL_HOU_MASK << RTC_PWRON_HOU_SHIFT)
  111. #define RTC_PWRON_DOM_MASK (RTC_AL_DOM_MASK << RTC_PWRON_DOM_SHIFT)
  112. #define RTC_PWRON_MTH_MASK (RTC_AL_MTH_MASK << RTC_PWRON_MTH_SHIFT)
  113. #define RTC_PWRON_YEA_MASK (RTC_AL_YEA_MASK << RTC_PWRON_YEA_SHIFT)
  114. #define RTC_BBPU_KEY 0x4300
  115. #define RTC_BBPU_CBUSY BIT(6)
  116. #define RTC_BBPU_RELOAD BIT(5)
  117. #define RTC_BBPU_AUTO BIT(3)
  118. #define RTC_BBPU_CLR BIT(1)
  119. #define RTC_BBPU_PWREN BIT(0)
  120. #define RTC_BBPU_AL_STA BIT(7)
  121. #define RTC_BBPU_RESET_AL BIT(3)
  122. #define RTC_BBPU_RESET_SPAR BIT(2)
  123. #define RTC_AL_MASK_DOW BIT(4)
  124. #define RTC_IRQ_EN_LP BIT(3)
  125. #define RTC_IRQ_EN_ONESHOT BIT(2)
  126. #define RTC_IRQ_EN_AL BIT(0)
  127. #define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
  128. #define RTC_IRQ_STA_LP BIT(3)
  129. #define RTC_IRQ_STA_AL BIT(0)
  130. #define RTC_PDN1_PWRON_TIME BIT(7)
  131. #define RTC_PDN2_PWRON_LOGO BIT(15)
  132. #define RTC_PDN2_PWRON_ALARM BIT(4)
  133. static u16 rtc_alarm_reg[RTC_OFFSET_COUNT][3] = {
  134. {RTC_AL_SEC, RTC_AL_SEC_MASK, 0},
  135. {RTC_AL_MIN, RTC_AL_MIN_MASK, 0},
  136. {RTC_AL_HOU, RTC_AL_HOU_MASK, 0},
  137. {RTC_AL_DOM, RTC_AL_DOM_MASK, 0},
  138. {RTC_AL_DOW, RTC_AL_DOW_MASK, 0},
  139. {RTC_AL_MTH, RTC_AL_MTH_MASK, 0},
  140. {RTC_AL_YEA, RTC_AL_YEA_MASK, 0},
  141. };
  142. static u16 rtc_pwron_reg[RTC_OFFSET_COUNT][3] = {
  143. {RTC_SPAR0, RTC_PWRON_SEC_MASK, RTC_PWRON_SEC_SHIFT},
  144. {RTC_SPAR1, RTC_PWRON_MIN_MASK, RTC_PWRON_MIN_SHIFT},
  145. {RTC_SPAR1, RTC_PWRON_HOU_MASK, RTC_PWRON_HOU_SHIFT},
  146. {RTC_SPAR1, RTC_PWRON_DOM_MASK, RTC_PWRON_DOM_SHIFT},
  147. {0, 0, 0},
  148. {RTC_PDN2, RTC_PWRON_MTH_MASK, RTC_PWRON_MTH_SHIFT},
  149. {RTC_PDN2, RTC_PWRON_YEA_MASK, RTC_PWRON_YEA_SHIFT},
  150. };
  151. enum rtc_reg_set {
  152. RTC_REG,
  153. RTC_MASK,
  154. RTC_SHIFT
  155. };
  156. enum rtc_irq_sta {
  157. RTC_NONE,
  158. RTC_ALSTA,
  159. RTC_TCSTA,
  160. RTC_LPSTA,
  161. };
  162. struct mt6358_rtc {
  163. struct device *dev;
  164. struct rtc_device *rtc_dev;
  165. spinlock_t lock;
  166. struct regmap *regmap;
  167. int irq;
  168. u32 addr_base;
  169. struct work_struct work;
  170. struct completion comp;
  171. };
  172. static struct mt6358_rtc *mt_rtc;
  173. static struct wakeup_source *mt6358_rtc_suspend_lock;
  174. static int rtc_show_time;
  175. static int rtc_show_alarm = 1;
  176. static int apply_lpsd_solution;
  177. /*for KPOC alarm*/
  178. static bool rtc_pm_notifier_registered;
  179. static bool kpoc_alarm;
  180. static unsigned long rtc_pm_status;
  181. static int alarm1m15s;
  182. module_param(rtc_show_time, int, 0644);
  183. module_param(rtc_show_alarm, int, 0644);
  184. static int rtc_alarm_enabled = 1;
  185. static ssize_t mtk_rtc_debug_write(struct file *file,
  186. const char __user *buf, size_t size, loff_t *ppos)
  187. {
  188. char lbuf[128];
  189. char option[16];
  190. int setting;
  191. ssize_t res;
  192. if (*ppos != 0 || size >= sizeof(lbuf) || size == 0)
  193. return -EINVAL;
  194. res = simple_write_to_buffer(lbuf, sizeof(lbuf) - 1, ppos, buf, size);
  195. if (res <= 0)
  196. return -EFAULT;
  197. lbuf[size] = '\0';
  198. if (sscanf(lbuf, "%15s %d", option, &setting) != 2) {
  199. pr_notice("Invalid para %s\n", lbuf);
  200. return -EFAULT;
  201. }
  202. if (!strncmp(option, "alarm", strlen("alarm"))) {
  203. pr_notice("alarm = %d\n", setting);
  204. rtc_alarm_enabled = setting;
  205. if (rtc_alarm_enabled)
  206. enable_irq(mt_rtc->irq);
  207. else
  208. disable_irq_nosync(mt_rtc->irq);
  209. }
  210. return size;
  211. }
  212. static int mtk_rtc_debug_show(struct seq_file *s, void *unused)
  213. {
  214. seq_printf(s, "rtc alarm %s\n",
  215. rtc_alarm_enabled ? "enabled" : "disabled");
  216. return 0;
  217. }
  218. static int mtk_rtc_debug_open(struct inode *inode,
  219. struct file *file)
  220. {
  221. return single_open(file, mtk_rtc_debug_show, NULL);
  222. }
  223. static const struct file_operations mtk_rtc_debug_ops = {
  224. .open = mtk_rtc_debug_open,
  225. .read = seq_read,
  226. .write = mtk_rtc_debug_write,
  227. .llseek = seq_lseek,
  228. .release = single_release,
  229. };
  230. void __attribute__((weak)) arch_reset(char mode, const char *cmd)
  231. {
  232. pr_info("arch_reset is not ready\n");
  233. }
  234. static int rtc_read(unsigned int reg, unsigned int *val)
  235. {
  236. return regmap_read(mt_rtc->regmap, mt_rtc->addr_base + reg, val);
  237. }
  238. static int rtc_write(unsigned int reg, unsigned int val)
  239. {
  240. return regmap_write(mt_rtc->regmap, mt_rtc->addr_base + reg, val);
  241. }
  242. static int rtc_update_bits(unsigned int reg,
  243. unsigned int mask, unsigned int val)
  244. {
  245. return regmap_update_bits(mt_rtc->regmap,
  246. mt_rtc->addr_base + reg, mask, val);
  247. }
  248. static int rtc_field_read(unsigned int reg,
  249. unsigned int mask, unsigned int shift, unsigned int *val)
  250. {
  251. int ret;
  252. unsigned int reg_val = 0;
  253. ret = rtc_read(reg, &reg_val);
  254. if (ret != 0)
  255. return ret;
  256. reg_val &= mask;
  257. reg_val >>= shift;
  258. *val = reg_val;
  259. return ret;
  260. }
  261. #define BULK_WRITE 0
  262. #define BULK_READ 1
  263. static int rtc_bulk_access(int mode, unsigned int reg, void *val,
  264. size_t val_count)
  265. {
  266. if (mode == BULK_WRITE) {
  267. return regmap_bulk_write(mt_rtc->regmap,
  268. mt_rtc->addr_base + reg, val, val_count);
  269. } else if (mode == BULK_READ) {
  270. return regmap_bulk_read(mt_rtc->regmap,
  271. mt_rtc->addr_base + reg, val, val_count);
  272. } else
  273. return -EPERM;
  274. }
  275. static int rtc_write_trigger(void)
  276. {
  277. int ret, bbpu = 0;
  278. unsigned long long timeout = sched_clock() + 500000000;
  279. u32 pwrkey1 = 0, pwrkey2 = 0, sec = 0;
  280. ret = rtc_write(RTC_WRTGR, 1);
  281. if (ret < 0)
  282. return ret;
  283. do {
  284. ret = rtc_read(RTC_BBPU, &bbpu);
  285. if (ret < 0)
  286. break;
  287. if ((bbpu & RTC_BBPU_CBUSY) == 0)
  288. break;
  289. else if (sched_clock() > timeout) {
  290. rtc_read(RTC_BBPU, &bbpu);
  291. rtc_read(RTC_POWERKEY1, &pwrkey1);
  292. rtc_read(RTC_POWERKEY2, &pwrkey2);
  293. rtc_read(RTC_TC_SEC, &sec);
  294. pr_err("%s, wait cbusy timeout, %x, %x, %x, %d\n",
  295. __func__, bbpu, pwrkey1, pwrkey2, sec);
  296. ret = -ETIMEDOUT;
  297. break;
  298. }
  299. } while (1);
  300. return ret;
  301. }
  302. static int mtk_rtc_read_time(struct rtc_time *tm)
  303. {
  304. u16 data[RTC_OFFSET_COUNT];
  305. int ret;
  306. u32 sec = 0;
  307. do {
  308. ret = rtc_bulk_access(BULK_READ, RTC_TC_SEC,
  309. data, RTC_OFFSET_COUNT);
  310. if (ret < 0)
  311. goto exit;
  312. tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_TC_SEC_MASK;
  313. tm->tm_min = data[RTC_OFFSET_MIN] & RTC_TC_MIN_MASK;
  314. tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_TC_HOU_MASK;
  315. tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_TC_DOM_MASK;
  316. tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_TC_MTH_MASK;
  317. tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_TC_YEA_MASK;
  318. ret = rtc_read(RTC_TC_SEC, &sec);
  319. if (ret < 0)
  320. goto exit;
  321. } while (sec < tm->tm_sec);
  322. return ret;
  323. exit:
  324. pr_err("%s error\n", __func__);
  325. return ret;
  326. }
  327. static int mtk_rtc_set_alarm(struct rtc_time *tm)
  328. {
  329. int ret, i;
  330. u16 data[RTC_OFFSET_COUNT];
  331. data[RTC_OFFSET_SEC] = tm->tm_sec & RTC_AL_SEC_MASK;
  332. data[RTC_OFFSET_MIN] = tm->tm_min & RTC_AL_MIN_MASK;
  333. data[RTC_OFFSET_HOUR] = tm->tm_hour & RTC_AL_HOU_MASK;
  334. data[RTC_OFFSET_DOM] = tm->tm_mday & RTC_AL_DOM_MASK;
  335. data[RTC_OFFSET_MTH] = tm->tm_mon & RTC_AL_MTH_MASK;
  336. data[RTC_OFFSET_YEAR] = tm->tm_year & RTC_AL_YEA_MASK;
  337. for (i = RTC_OFFSET_SEC; i < RTC_OFFSET_COUNT; i++) {
  338. if (i == RTC_OFFSET_DOW)
  339. continue;
  340. ret = rtc_update_bits(rtc_alarm_reg[i][RTC_REG],
  341. rtc_alarm_reg[i][RTC_MASK], data[i]);
  342. if (ret < 0)
  343. goto exit;
  344. }
  345. ret = rtc_write(RTC_AL_MASK, RTC_AL_MASK_DOW); /* mask DOW */
  346. if (ret < 0)
  347. goto exit;
  348. ret = rtc_write_trigger();
  349. if (ret < 0)
  350. goto exit;
  351. ret = rtc_update_bits(RTC_IRQ_EN,
  352. RTC_IRQ_EN_ONESHOT_AL,
  353. RTC_IRQ_EN_ONESHOT_AL);
  354. if (ret < 0)
  355. goto exit;
  356. ret = rtc_write_trigger();
  357. if (ret < 0)
  358. goto exit;
  359. return ret;
  360. exit:
  361. pr_err("%s error\n", __func__);
  362. return ret;
  363. }
  364. bool mtk_rtc_is_pwron_alarm(struct rtc_time *nowtm, struct rtc_time *tm)
  365. {
  366. u32 pdn1 = 0;
  367. u32 data[RTC_OFFSET_COUNT] = {0};
  368. int ret, i;
  369. ret = rtc_read(RTC_PDN1, &pdn1);
  370. if (ret < 0)
  371. goto exit;
  372. pr_notice("pdn1 = 0x%4x\n", pdn1);
  373. if (pdn1 & RTC_PDN1_PWRON_TIME) { /* power-on time is available */
  374. ret = mtk_rtc_read_time(nowtm);
  375. if (ret < 0)
  376. goto exit;
  377. for (i = RTC_OFFSET_SEC; i < RTC_OFFSET_COUNT; i++) {
  378. if (i == RTC_OFFSET_DOW)
  379. continue;
  380. ret = rtc_field_read(rtc_pwron_reg[i][RTC_REG],
  381. rtc_pwron_reg[i][RTC_MASK],
  382. rtc_pwron_reg[i][RTC_SHIFT], &data[i]);
  383. if (ret < 0)
  384. goto exit;
  385. }
  386. tm->tm_sec = data[RTC_OFFSET_SEC];
  387. tm->tm_min = data[RTC_OFFSET_MIN];
  388. tm->tm_hour = data[RTC_OFFSET_HOUR];
  389. tm->tm_mday = data[RTC_OFFSET_DOM];
  390. tm->tm_mon = data[RTC_OFFSET_MTH];
  391. tm->tm_year = data[RTC_OFFSET_YEAR];
  392. return true;
  393. }
  394. return false;
  395. exit:
  396. pr_err("%s error\n", __func__);
  397. return false;
  398. }
  399. static int mtk_rtc_set_pwron_alarm_time(struct rtc_time *tm)
  400. {
  401. u16 data[RTC_OFFSET_COUNT];
  402. int ret, i;
  403. pr_err("%s\n", __func__);
  404. data[RTC_OFFSET_SEC] =
  405. ((tm->tm_sec << RTC_PWRON_SEC_SHIFT) & RTC_PWRON_SEC_MASK);
  406. data[RTC_OFFSET_MIN] =
  407. ((tm->tm_min << RTC_PWRON_MIN_SHIFT) & RTC_PWRON_MIN_MASK);
  408. data[RTC_OFFSET_HOUR] =
  409. ((tm->tm_hour << RTC_PWRON_HOU_SHIFT) & RTC_PWRON_HOU_MASK);
  410. data[RTC_OFFSET_DOM] =
  411. ((tm->tm_mday << RTC_PWRON_DOM_SHIFT) & RTC_PWRON_DOM_MASK);
  412. data[RTC_OFFSET_MTH] =
  413. ((tm->tm_mon << RTC_PWRON_MTH_SHIFT) & RTC_PWRON_MTH_MASK);
  414. data[RTC_OFFSET_YEAR] =
  415. ((tm->tm_year << RTC_PWRON_YEA_SHIFT) & RTC_PWRON_YEA_MASK);
  416. for (i = RTC_OFFSET_SEC; i < RTC_OFFSET_COUNT; i++) {
  417. if (i == RTC_OFFSET_DOW)
  418. continue;
  419. ret = rtc_update_bits(rtc_pwron_reg[i][RTC_REG],
  420. rtc_pwron_reg[i][RTC_MASK], data[i]);
  421. if (ret < 0)
  422. goto exit;
  423. ret = rtc_write_trigger();
  424. if (ret < 0)
  425. goto exit;
  426. }
  427. return ret;
  428. exit:
  429. pr_err("%s error\n", __func__);
  430. return ret;
  431. }
  432. static int mtk_rtc_set_pwron_alarm(bool enable, struct rtc_time *tm, bool logo)
  433. {
  434. u16 pdn1 = 0, pdn2 = 0;
  435. int ret;
  436. ret = mtk_rtc_set_pwron_alarm_time(tm);
  437. if (ret < 0)
  438. goto exit;
  439. if (enable)
  440. pdn1 = RTC_PDN1_PWRON_TIME;
  441. ret = rtc_update_bits(RTC_PDN1, RTC_PDN1_PWRON_TIME, pdn1);
  442. if (ret < 0)
  443. goto exit;
  444. if (logo)
  445. pdn2 = RTC_PDN2_PWRON_LOGO;
  446. ret = rtc_update_bits(RTC_PDN2, RTC_PDN2_PWRON_LOGO, pdn2);
  447. if (ret < 0)
  448. goto exit;
  449. ret = rtc_write_trigger();
  450. if (ret < 0)
  451. goto exit;
  452. return ret;
  453. exit:
  454. pr_err("%s error\n", __func__);
  455. return ret;
  456. }
  457. void rtc_read_pwron_alarm(struct rtc_wkalrm *alm)
  458. {
  459. struct rtc_time *tm;
  460. u32 pdn1 = 0, pdn2 = 0;
  461. u16 data[RTC_OFFSET_COUNT];
  462. unsigned long flags;
  463. int ret;
  464. if (alm == NULL)
  465. return;
  466. tm = &alm->time;
  467. spin_lock_irqsave(&mt_rtc->lock, flags);
  468. ret = rtc_read(RTC_PDN1, &pdn1);
  469. if (ret < 0)
  470. goto exit;
  471. ret = rtc_read(RTC_PDN2, &pdn2);
  472. if (ret < 0)
  473. goto exit;
  474. alm->enabled = (pdn1 & RTC_PDN1_PWRON_TIME ?
  475. (pdn2 & RTC_PDN2_PWRON_LOGO ? 3 : 2) : 0);
  476. /* return Power-On Alarm bit */
  477. alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
  478. ret = rtc_bulk_access(BULK_READ, RTC_AL_SEC, data, RTC_OFFSET_COUNT);
  479. if (ret < 0)
  480. goto exit;
  481. tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK;
  482. tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK;
  483. tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK;
  484. tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK;
  485. tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK;
  486. tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK;
  487. spin_unlock_irqrestore(&mt_rtc->lock, flags);
  488. tm->tm_year += RTC_MIN_YEAR_OFFSET;
  489. tm->tm_mon -= 1;
  490. if (rtc_show_alarm) {
  491. pr_notice("power-on = %04d/%02d/%02d %02d:%02d:%02d (%d)(%d)\n",
  492. tm->tm_year + RTC_BASE_YEAR, tm->tm_mon + 1,
  493. tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec,
  494. alm->enabled, alm->pending);
  495. }
  496. return;
  497. exit:
  498. pr_err("%s error\n", __func__);
  499. }
  500. #ifdef CONFIG_PM
  501. #define PM_DUMMY 0xFFFF
  502. static int rtc_pm_event(struct notifier_block *notifier, unsigned long pm_event,
  503. void *unused)
  504. {
  505. pr_notice("%s = %lu\n", __func__, pm_event);
  506. switch (pm_event) {
  507. case PM_SUSPEND_PREPARE:
  508. rtc_pm_status = PM_SUSPEND_PREPARE;
  509. return NOTIFY_DONE;
  510. case PM_POST_SUSPEND:
  511. rtc_pm_status = PM_POST_SUSPEND;
  512. break;
  513. default:
  514. rtc_pm_status = PM_DUMMY;
  515. break;
  516. }
  517. if (kpoc_alarm) {
  518. pr_notice("%s trigger reboot\n", __func__);
  519. complete(&mt_rtc->comp);
  520. kpoc_alarm = false;
  521. }
  522. return NOTIFY_DONE;
  523. }
  524. static struct notifier_block rtc_pm_notifier_func = {
  525. .notifier_call = rtc_pm_event,
  526. .priority = 0,
  527. };
  528. #endif /* CONFIG_PM */
  529. static void mtk_rtc_work_queue(struct work_struct *work)
  530. {
  531. struct mt6358_rtc *rtc = container_of(work, struct mt6358_rtc, work);
  532. unsigned long ret;
  533. unsigned int msecs;
  534. ret = wait_for_completion_timeout(&rtc->comp, msecs_to_jiffies(30000));
  535. if (!ret) {
  536. pr_notice("%s timeout\n", __func__);
  537. BUG_ON(1);
  538. } else {
  539. msecs = jiffies_to_msecs(ret);
  540. pr_notice("%s timeleft= %d\n", __func__, msecs);
  541. kernel_restart("kpoc");
  542. }
  543. }
  544. static void mtk_rtc_reboot(void)
  545. {
  546. __pm_stay_awake(mt6358_rtc_suspend_lock);
  547. init_completion(&mt_rtc->comp);
  548. schedule_work_on(cpumask_first(cpu_online_mask), &mt_rtc->work);
  549. if (!rtc_pm_notifier_registered)
  550. goto reboot;
  551. if (rtc_pm_status != PM_SUSPEND_PREPARE)
  552. goto reboot;
  553. kpoc_alarm = true;
  554. pr_notice("%s:wait\n", __func__);
  555. return;
  556. reboot:
  557. pr_notice("%s:trigger\n", __func__);
  558. complete(&mt_rtc->comp);
  559. }
  560. #ifndef USER_BUILD_KERNEL
  561. void mtk_rtc_lp_exception(void)
  562. {
  563. u32 bbpu = 0, irqsta = 0, irqen = 0, osc32 = 0;
  564. u32 pwrkey1 = 0, pwrkey2 = 0, prot = 0, con = 0, sec1 = 0, sec2 = 0;
  565. rtc_read(RTC_BBPU, &bbpu);
  566. rtc_read(RTC_IRQ_STA, &irqsta);
  567. rtc_read(RTC_IRQ_EN, &irqen);
  568. rtc_read(RTC_OSC32CON, &osc32);
  569. rtc_read(RTC_POWERKEY1, &pwrkey1);
  570. rtc_read(RTC_POWERKEY2, &pwrkey2);
  571. rtc_read(RTC_PROT, &prot);
  572. rtc_read(RTC_CON, &con);
  573. rtc_read(RTC_TC_SEC, &sec1);
  574. mdelay(2000);
  575. rtc_read(RTC_TC_SEC, &sec2);
  576. pr_emerg("!!! 32K WAS STOPPED !!!\n"
  577. "RTC_BBPU = 0x%x\n"
  578. "RTC_IRQ_STA = 0x%x\n"
  579. "RTC_IRQ_EN = 0x%x\n"
  580. "RTC_OSC32CON = 0x%x\n"
  581. "RTC_POWERKEY1 = 0x%x\n"
  582. "RTC_POWERKEY2 = 0x%x\n"
  583. "RTC_PROT = 0x%x\n"
  584. "RTC_CON = 0x%x\n"
  585. "RTC_TC_SEC = %02d\n"
  586. "RTC_TC_SEC = %02d\n",
  587. bbpu, irqsta, irqen, osc32, pwrkey1, pwrkey2, prot, con, sec1,
  588. sec2);
  589. }
  590. #endif
  591. static int mtk_rtc_is_alarm_irq(void)
  592. {
  593. u32 irqsta = 0, bbpu;
  594. int ret, val;
  595. ret = rtc_read(RTC_IRQ_STA, &irqsta); /* read clear */
  596. if ((ret == 0) && (irqsta & RTC_IRQ_STA_AL)) {
  597. bbpu = RTC_BBPU_KEY | RTC_BBPU_PWREN;
  598. rtc_write(RTC_BBPU, bbpu);
  599. val = rtc_write_trigger();
  600. if (val < 0)
  601. pr_notice("%s error\n", __func__);
  602. return RTC_ALSTA;
  603. }
  604. #ifndef USER_BUILD_KERNEL
  605. if ((ret == 0) && (irqsta & RTC_IRQ_STA_LP)) {
  606. mtk_rtc_lp_exception();
  607. return RTC_LPSTA;
  608. }
  609. #endif
  610. return RTC_NONE;
  611. }
  612. static void mtk_rtc_update_pwron_alarm_flag(void)
  613. {
  614. int ret;
  615. ret = rtc_update_bits(RTC_PDN1, RTC_PDN1_PWRON_TIME, 0);
  616. if (ret < 0)
  617. goto exit;
  618. ret = rtc_update_bits(RTC_PDN2,
  619. RTC_PDN2_PWRON_ALARM,
  620. RTC_PDN2_PWRON_ALARM);
  621. if (ret < 0)
  622. goto exit;
  623. ret = rtc_write_trigger();
  624. if (ret < 0)
  625. goto exit;
  626. return;
  627. exit:
  628. pr_err("%s error\n", __func__);
  629. }
  630. static void mtk_rtc_reset_bbpu_alarm_status(void)
  631. {
  632. u32 bbpu;
  633. int ret;
  634. if (apply_lpsd_solution) {
  635. pr_notice("%s:lpsd\n", __func__);
  636. return;
  637. }
  638. bbpu = RTC_BBPU_KEY | RTC_BBPU_PWREN | RTC_BBPU_RESET_AL;
  639. rtc_write(RTC_BBPU, bbpu);
  640. ret = rtc_write_trigger();
  641. if (ret < 0)
  642. pr_err("%s error\n", __func__);
  643. return;
  644. }
  645. static irqreturn_t mtk_rtc_irq_handler(int irq, void *data)
  646. {
  647. bool pwron_alm = false, pwron_alarm = false;
  648. struct rtc_time nowtm, tm;
  649. int status = RTC_NONE;
  650. unsigned long flags;
  651. spin_lock_irqsave(&mt_rtc->lock, flags);
  652. status = mtk_rtc_is_alarm_irq();
  653. pr_notice("%s:%d\n", __func__, status);
  654. if (status == RTC_NONE) {
  655. spin_unlock_irqrestore(&mt_rtc->lock, flags);
  656. return IRQ_NONE;
  657. }
  658. if (status == RTC_LPSTA) {
  659. spin_unlock_irqrestore(&mt_rtc->lock, flags);
  660. return IRQ_HANDLED;
  661. }
  662. mtk_rtc_reset_bbpu_alarm_status();
  663. pwron_alarm = mtk_rtc_is_pwron_alarm(&nowtm, &tm);
  664. nowtm.tm_year += RTC_MIN_YEAR;
  665. tm.tm_year += RTC_MIN_YEAR;
  666. if (pwron_alarm) {
  667. time64_t now_time, time;
  668. now_time =
  669. mktime(nowtm.tm_year, nowtm.tm_mon, nowtm.tm_mday,
  670. nowtm.tm_hour, nowtm.tm_min, nowtm.tm_sec);
  671. if (now_time == -1) {
  672. spin_unlock_irqrestore(&mt_rtc->lock, flags);
  673. goto out;
  674. }
  675. time =
  676. mktime(tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour,
  677. tm.tm_min, tm.tm_sec);
  678. if (time == -1) {
  679. spin_unlock_irqrestore(&mt_rtc->lock, flags);
  680. goto out;
  681. }
  682. /* power on */
  683. if (now_time >= time - 1 && now_time <= time + 4) {
  684. if (get_boot_mode() == KERNEL_POWER_OFF_CHARGING_BOOT
  685. || get_boot_mode() == LOW_POWER_OFF_CHARGING_BOOT) {
  686. mtk_rtc_reboot();
  687. spin_unlock_irqrestore(&mt_rtc->lock, flags);
  688. disable_irq_nosync(mt_rtc->irq);
  689. goto out;
  690. } else {
  691. mtk_rtc_update_pwron_alarm_flag();
  692. pwron_alm = true;
  693. }
  694. } else if (now_time < time) { /* set power-on alarm */
  695. time -= 1;
  696. rtc_time64_to_tm(time, &tm);
  697. tm.tm_year -= RTC_MIN_YEAR_OFFSET;
  698. tm.tm_mon += 1;
  699. mtk_rtc_set_alarm(&tm);
  700. }
  701. }
  702. spin_unlock_irqrestore(&mt_rtc->lock, flags);
  703. out:
  704. if (mt_rtc->rtc_dev != NULL)
  705. rtc_update_irq(mt_rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
  706. if (rtc_show_alarm)
  707. pr_notice("%s time is up\n", pwron_alm ? "power-on" : "alarm");
  708. return IRQ_HANDLED;
  709. }
  710. static int rtc_ops_read_time(struct device *dev, struct rtc_time *tm)
  711. {
  712. unsigned long long time;
  713. unsigned long flags;
  714. struct mt6358_rtc *rtc = dev_get_drvdata(dev);
  715. int ret;
  716. spin_lock_irqsave(&rtc->lock, flags);
  717. ret = mtk_rtc_read_time(tm);
  718. if (ret < 0)
  719. goto exit;
  720. spin_unlock_irqrestore(&rtc->lock, flags);
  721. tm->tm_year += RTC_MIN_YEAR_OFFSET;
  722. tm->tm_mon--;
  723. time = rtc_tm_to_time64(tm);
  724. do_div(time, 86400);
  725. time += 4;
  726. tm->tm_wday = do_div(time, 7); /* 1970/01/01 is Thursday */
  727. if (rtc_show_time) {
  728. pr_notice("read tc time = %04d/%02d/%02d (%d) %02d:%02d:%02d\n",
  729. tm->tm_year + RTC_BASE_YEAR, tm->tm_mon + 1,
  730. tm->tm_mday, tm->tm_wday, tm->tm_hour,
  731. tm->tm_min, tm->tm_sec);
  732. }
  733. return ret;
  734. exit:
  735. spin_unlock_irqrestore(&rtc->lock, flags);
  736. pr_err("%s error\n", __func__);
  737. return ret;
  738. }
  739. static int rtc_ops_set_time(struct device *dev, struct rtc_time *tm)
  740. {
  741. struct mt6358_rtc *rtc = dev_get_drvdata(dev);
  742. unsigned long flags;
  743. u16 data[RTC_OFFSET_COUNT];
  744. int ret;
  745. if (tm->tm_year > 195) {
  746. pr_err("%s: invalid year %04d > 2095\n",
  747. __func__, tm->tm_year + RTC_BASE_YEAR);
  748. return -EINVAL;
  749. }
  750. pr_notice("set tc time = %04d/%02d/%02d %02d:%02d:%02d\n",
  751. tm->tm_year + RTC_BASE_YEAR, tm->tm_mon + 1, tm->tm_mday,
  752. tm->tm_hour, tm->tm_min, tm->tm_sec);
  753. tm->tm_year -= RTC_MIN_YEAR_OFFSET;
  754. tm->tm_mon++;
  755. data[RTC_OFFSET_SEC] = tm->tm_sec;
  756. data[RTC_OFFSET_MIN] = tm->tm_min;
  757. data[RTC_OFFSET_HOUR] = tm->tm_hour;
  758. data[RTC_OFFSET_DOM] = tm->tm_mday;
  759. data[RTC_OFFSET_MTH] = tm->tm_mon;
  760. data[RTC_OFFSET_YEAR] = tm->tm_year;
  761. spin_lock_irqsave(&rtc->lock, flags);
  762. ret = rtc_bulk_access(BULK_WRITE, RTC_TC_SEC, data, RTC_OFFSET_COUNT);
  763. if (ret < 0)
  764. goto exit;
  765. ret = rtc_write_trigger();
  766. if (ret < 0)
  767. goto exit;
  768. spin_unlock_irqrestore(&rtc->lock, flags);
  769. return ret;
  770. exit:
  771. spin_unlock_irqrestore(&rtc->lock, flags);
  772. pr_err("%s error\n", __func__);
  773. return ret;
  774. }
  775. static int rtc_ops_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  776. {
  777. unsigned long flags;
  778. struct rtc_time *tm = &alm->time;
  779. struct mt6358_rtc *rtc = dev_get_drvdata(dev);
  780. u32 irqen = 0, pdn2 = 0;
  781. u16 data[RTC_OFFSET_COUNT];
  782. int ret;
  783. spin_lock_irqsave(&rtc->lock, flags);
  784. ret = rtc_read(RTC_IRQ_EN, &irqen);
  785. if (ret < 0)
  786. goto exit;
  787. alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
  788. /* return Power-On Alarm bit */
  789. ret = rtc_read(RTC_PDN2, &pdn2);
  790. if (ret < 0)
  791. goto exit;
  792. alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
  793. ret = rtc_bulk_access(BULK_READ, RTC_AL_SEC, data, RTC_OFFSET_COUNT);
  794. if (ret < 0)
  795. goto exit;
  796. tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK;
  797. tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK;
  798. tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK;
  799. tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK;
  800. tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK;
  801. tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK;
  802. spin_unlock_irqrestore(&rtc->lock, flags);
  803. tm->tm_year += RTC_MIN_YEAR_OFFSET;
  804. tm->tm_mon--;
  805. pr_notice("read al time = %04d/%02d/%02d %02d:%02d:%02d (%d)\n",
  806. tm->tm_year + RTC_BASE_YEAR, tm->tm_mon + 1, tm->tm_mday,
  807. tm->tm_hour, tm->tm_min, tm->tm_sec, alm->enabled);
  808. return ret;
  809. exit:
  810. spin_unlock_irqrestore(&rtc->lock, flags);
  811. pr_err("%s error\n", __func__);
  812. return ret;
  813. }
  814. static int rtc_ops_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  815. {
  816. unsigned long flags;
  817. struct rtc_time tm = alm->time;
  818. ktime_t target;
  819. struct mt6358_rtc *rtc = dev_get_drvdata(dev);
  820. u32 irqsta;
  821. int ret = 0;
  822. if (tm.tm_year > 195) {
  823. pr_err("%s: invalid year %04d > 2095\n",
  824. __func__, tm.tm_year + RTC_BASE_YEAR);
  825. return -EINVAL;
  826. }
  827. if (alm->enabled == 1) {
  828. /* Add one more second to postpone wake time. */
  829. target = rtc_tm_to_ktime(tm);
  830. target = ktime_add_ns(target, NSEC_PER_SEC);
  831. tm = rtc_ktime_to_tm(target);
  832. } else if (alm->enabled == 5) {
  833. /* Power on system 1 minute earlier */
  834. alarm1m15s = 1;
  835. }
  836. tm.tm_year -= RTC_MIN_YEAR_OFFSET;
  837. tm.tm_mon++;
  838. pr_notice("set al time = %04d/%02d/%02d %02d:%02d:%02d (%d)\n",
  839. tm.tm_year + RTC_MIN_YEAR, tm.tm_mon, tm.tm_mday,
  840. tm.tm_hour, tm.tm_min, tm.tm_sec, alm->enabled);
  841. spin_lock_irqsave(&rtc->lock, flags);
  842. if (alm->enabled == 2) { /* enable power-on alarm */
  843. ret = mtk_rtc_set_pwron_alarm(true, &tm, false);
  844. } else if (alm->enabled == 3 || alm->enabled == 5) {
  845. /* enable power-on alarm with logo */
  846. ret = mtk_rtc_set_pwron_alarm(true, &tm, true);
  847. } else if (alm->enabled == 4) { /* disable power-on alarm */
  848. ret = mtk_rtc_set_pwron_alarm(false, &tm, false);
  849. alarm1m15s = 0;
  850. }
  851. if (ret < 0)
  852. goto exit;
  853. /* disable alarm and clear Power-On Alarm bit */
  854. ret = rtc_update_bits(RTC_IRQ_EN, RTC_IRQ_EN_AL, 0);
  855. if (ret < 0)
  856. goto exit;
  857. ret = rtc_update_bits(RTC_PDN2, RTC_PDN2_PWRON_ALARM, 0);
  858. if (ret < 0)
  859. goto exit;
  860. ret = rtc_write_trigger();
  861. if (ret < 0)
  862. goto exit;
  863. ret = rtc_read(RTC_IRQ_STA, &irqsta); /* read clear */
  864. if (ret < 0)
  865. goto exit;
  866. if (alm->enabled)
  867. ret = mtk_rtc_set_alarm(&tm);
  868. spin_unlock_irqrestore(&rtc->lock, flags);
  869. return ret;
  870. exit:
  871. spin_unlock_irqrestore(&rtc->lock, flags);
  872. pr_err("%s error\n", __func__);
  873. return ret;
  874. }
  875. static const struct rtc_class_ops rtc_ops = {
  876. .read_time = rtc_ops_read_time,
  877. .set_time = rtc_ops_set_time,
  878. .read_alarm = rtc_ops_read_alarm,
  879. .set_alarm = rtc_ops_set_alarm,
  880. };
  881. static void mtk_rtc_set_lp_irq(void)
  882. {
  883. unsigned int irqen = 0;
  884. int ret;
  885. #ifndef USER_BUILD_KERNEL
  886. irqen = RTC_IRQ_EN_LP;
  887. #endif
  888. ret = rtc_update_bits(RTC_IRQ_EN, RTC_IRQ_EN_LP, irqen);
  889. if (ret < 0)
  890. goto exit;
  891. ret = rtc_write_trigger();
  892. if (ret < 0)
  893. goto exit;
  894. return;
  895. exit:
  896. pr_err("%s error\n", __func__);
  897. }
  898. static int mtk_rtc_pdrv_probe(struct platform_device *pdev)
  899. {
  900. #ifndef IPIMB
  901. struct mt6358_chip *mt6358_chip = dev_get_drvdata(pdev->dev.parent);
  902. #endif
  903. struct mt6358_rtc *rtc;
  904. unsigned long flags;
  905. int ret;
  906. struct dentry *mtk_rtc_dir;
  907. struct dentry *mtk_rtc_file;
  908. rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6358_rtc), GFP_KERNEL);
  909. if (!rtc)
  910. return -ENOMEM;
  911. rtc->irq = platform_get_irq(pdev, 0);
  912. if (rtc->irq <= 0)
  913. return -EINVAL;
  914. pr_notice("%s: rtc->irq = %d(%d)\n", __func__, rtc->irq,
  915. platform_get_irq_byname(pdev, "rtc"));
  916. #ifndef IPIMB
  917. rtc->regmap = mt6358_chip->regmap;
  918. #else
  919. rtc->regmap = dev_get_regmap(pdev->dev.parent->parent, NULL);
  920. #endif
  921. if (!rtc->regmap) {
  922. pr_err("%s: get regmap failed\n", __func__);
  923. return -ENODEV;
  924. }
  925. rtc->dev = &pdev->dev;
  926. spin_lock_init(&rtc->lock);
  927. mt_rtc = rtc;
  928. platform_set_drvdata(pdev, rtc);
  929. if (of_property_read_u32(pdev->dev.of_node, "base", &rtc->addr_base))
  930. rtc->addr_base = RTC_DSN_ID;
  931. pr_notice("%s: rtc->addr_base =0x%x\n", __func__, rtc->addr_base);
  932. spin_lock_irqsave(&rtc->lock, flags);
  933. mtk_rtc_set_lp_irq();
  934. spin_unlock_irqrestore(&rtc->lock, flags);
  935. ret = request_threaded_irq(rtc->irq, NULL,
  936. mtk_rtc_irq_handler,
  937. IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
  938. "mt6358-rtc", rtc);
  939. if (ret) {
  940. dev_dbg(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
  941. rtc->irq, ret);
  942. goto out_dispose_irq;
  943. }
  944. device_init_wakeup(&pdev->dev, 1);
  945. mt6358_rtc_suspend_lock =
  946. wakeup_source_register(NULL, "mt6358-rtc suspend wakelock");
  947. /* register rtc device (/dev/rtc0) */
  948. rtc->rtc_dev = rtc_device_register(RTC_NAME,
  949. &pdev->dev, &rtc_ops, THIS_MODULE);
  950. if (IS_ERR(rtc->rtc_dev)) {
  951. dev_dbg(&pdev->dev, "register rtc device failed\n");
  952. ret = PTR_ERR(rtc->rtc_dev);
  953. goto out_free_irq;
  954. }
  955. if (of_property_read_bool(pdev->dev.of_node, "apply-lpsd-solution")) {
  956. apply_lpsd_solution = 1;
  957. pr_notice("%s: apply_lpsd_solution\n", __func__);
  958. }
  959. mtk_rtc_dir = debugfs_create_dir("mtk_rtc", NULL);
  960. if (!mtk_rtc_dir) {
  961. pr_err("create /sys/kernel/debug/mtk_rtc_dir failed\n");
  962. //return -ENOMEM;
  963. }
  964. mtk_rtc_file = debugfs_create_file("mtk_rtc", 0644,
  965. mtk_rtc_dir, NULL,
  966. &mtk_rtc_debug_ops);
  967. if (!mtk_rtc_file) {
  968. pr_err("create /sys/kernel/debug/mtk_rtc/mtk_rtc failed\n");
  969. //return -ENOMEM;
  970. }
  971. #ifdef CONFIG_PM
  972. if (register_pm_notifier(&rtc_pm_notifier_func))
  973. pr_notice("rtc pm failed\n");
  974. else
  975. rtc_pm_notifier_registered = true;
  976. #endif /* CONFIG_PM */
  977. INIT_WORK(&rtc->work, mtk_rtc_work_queue);
  978. return 0;
  979. out_free_irq:
  980. free_irq(rtc->irq, rtc->rtc_dev);
  981. out_dispose_irq:
  982. irq_dispose_mapping(rtc->irq);
  983. return ret;
  984. }
  985. static int mtk_rtc_pdrv_remove(struct platform_device *pdev)
  986. {
  987. struct mt6358_rtc *rtc = platform_get_drvdata(pdev);
  988. rtc_device_unregister(rtc->rtc_dev);
  989. return 0;
  990. }
  991. static void mtk_rtc_pdrv_shutdown(struct platform_device *pdev)
  992. {
  993. struct rtc_time rtc_time_now;
  994. struct rtc_time rtc_time_alarm;
  995. ktime_t ktime_now;
  996. ktime_t ktime_alarm;
  997. bool is_pwron_alarm;
  998. if (alarm1m15s == 1) {
  999. is_pwron_alarm = mtk_rtc_is_pwron_alarm(&rtc_time_now,
  1000. &rtc_time_alarm);
  1001. if (is_pwron_alarm) {
  1002. rtc_time_now.tm_year += RTC_MIN_YEAR_OFFSET;
  1003. rtc_time_now.tm_mon--;
  1004. rtc_time_alarm.tm_year += RTC_MIN_YEAR_OFFSET;
  1005. rtc_time_alarm.tm_mon--;
  1006. pr_notice("now = %04d/%02d/%02d %02d:%02d:%02d\n",
  1007. rtc_time_now.tm_year + 1900,
  1008. rtc_time_now.tm_mon + 1,
  1009. rtc_time_now.tm_mday,
  1010. rtc_time_now.tm_hour,
  1011. rtc_time_now.tm_min,
  1012. rtc_time_now.tm_sec);
  1013. pr_notice("alarm = %04d/%02d/%02d %02d:%02d:%02d\n",
  1014. rtc_time_alarm.tm_year + 1900,
  1015. rtc_time_alarm.tm_mon + 1,
  1016. rtc_time_alarm.tm_mday,
  1017. rtc_time_alarm.tm_hour,
  1018. rtc_time_alarm.tm_min,
  1019. rtc_time_alarm.tm_sec);
  1020. ktime_now = rtc_tm_to_ktime(rtc_time_now);
  1021. ktime_alarm = rtc_tm_to_ktime(rtc_time_alarm);
  1022. if (ktime_after(ktime_alarm, ktime_now)) {
  1023. /* alarm has not happened */
  1024. ktime_alarm = ktime_sub_ms(ktime_alarm,
  1025. MSEC_PER_SEC * 60);
  1026. if (ktime_after(ktime_alarm, ktime_now))
  1027. pr_notice("Alarm will happen after 1 minute\n");
  1028. else {
  1029. ktime_alarm = ktime_add_ms(ktime_now,
  1030. MSEC_PER_SEC * 15);
  1031. pr_notice("Alarm will happen in 15 seconds\n");
  1032. }
  1033. rtc_time_alarm = rtc_ktime_to_tm(ktime_alarm);
  1034. pr_notice("new alarm = %04d/%02d/%02d %02d:%02d:%02d\n",
  1035. rtc_time_alarm.tm_year + 1900,
  1036. rtc_time_alarm.tm_mon + 1,
  1037. rtc_time_alarm.tm_mday,
  1038. rtc_time_alarm.tm_hour,
  1039. rtc_time_alarm.tm_min,
  1040. rtc_time_alarm.tm_sec);
  1041. rtc_time_alarm.tm_year -= RTC_MIN_YEAR_OFFSET;
  1042. rtc_time_alarm.tm_mon++;
  1043. mtk_rtc_set_pwron_alarm_time(&rtc_time_alarm);
  1044. mtk_rtc_set_alarm(&rtc_time_alarm);
  1045. } else
  1046. pr_notice("Alarm has happened before\n");
  1047. } else
  1048. pr_notice("No power-off alarm is set\n");
  1049. }
  1050. }
  1051. static const struct of_device_id mt6358_rtc_of_match[] = {
  1052. { .compatible = "mediatek,mt6357-rtc", },
  1053. { .compatible = "mediatek,mt6358-rtc", },
  1054. { .compatible = "mediatek,mt6359-rtc", },
  1055. { }
  1056. };
  1057. MODULE_DEVICE_TABLE(of, mt6358_rtc_of_match);
  1058. static struct platform_driver mtk_rtc_pdrv = {
  1059. .probe = mtk_rtc_pdrv_probe,
  1060. .remove = mtk_rtc_pdrv_remove,
  1061. .shutdown = mtk_rtc_pdrv_shutdown,
  1062. .driver = {
  1063. .name = RTC_NAME,
  1064. .owner = THIS_MODULE,
  1065. .of_match_table = mt6358_rtc_of_match,
  1066. },
  1067. };
  1068. module_platform_driver(mtk_rtc_pdrv);
  1069. MODULE_LICENSE("GPL v2");
  1070. MODULE_AUTHOR("Wilma Wu <wilma.wu@mediatek.com>");
  1071. MODULE_DESCRIPTION("RTC Driver for MediaTek MT6358 PMIC");