pcap-regulator.c 7.4 KB

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  1. /*
  2. * PCAP2 Regulator Driver
  3. *
  4. * Copyright (c) 2009 Daniel Ribeiro <drwyrm@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/err.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/regulator/driver.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/mfd/ezx-pcap.h>
  19. static const unsigned int V1_table[] = {
  20. 2775000, 1275000, 1600000, 1725000, 1825000, 1925000, 2075000, 2275000,
  21. };
  22. static const unsigned int V2_table[] = {
  23. 2500000, 2775000,
  24. };
  25. static const unsigned int V3_table[] = {
  26. 1075000, 1275000, 1550000, 1725000, 1876000, 1950000, 2075000, 2275000,
  27. };
  28. static const unsigned int V4_table[] = {
  29. 1275000, 1550000, 1725000, 1875000, 1950000, 2075000, 2275000, 2775000,
  30. };
  31. static const unsigned int V5_table[] = {
  32. 1875000, 2275000, 2475000, 2775000,
  33. };
  34. static const unsigned int V6_table[] = {
  35. 2475000, 2775000,
  36. };
  37. static const unsigned int V7_table[] = {
  38. 1875000, 2775000,
  39. };
  40. #define V8_table V4_table
  41. static const unsigned int V9_table[] = {
  42. 1575000, 1875000, 2475000, 2775000,
  43. };
  44. static const unsigned int V10_table[] = {
  45. 5000000,
  46. };
  47. static const unsigned int VAUX1_table[] = {
  48. 1875000, 2475000, 2775000, 3000000,
  49. };
  50. #define VAUX2_table VAUX1_table
  51. static const unsigned int VAUX3_table[] = {
  52. 1200000, 1200000, 1200000, 1200000, 1400000, 1600000, 1800000, 2000000,
  53. 2200000, 2400000, 2600000, 2800000, 3000000, 3200000, 3400000, 3600000,
  54. };
  55. static const unsigned int VAUX4_table[] = {
  56. 1800000, 1800000, 3000000, 5000000,
  57. };
  58. static const unsigned int VSIM_table[] = {
  59. 1875000, 3000000,
  60. };
  61. static const unsigned int VSIM2_table[] = {
  62. 1875000,
  63. };
  64. static const unsigned int VVIB_table[] = {
  65. 1300000, 1800000, 2000000, 3000000,
  66. };
  67. static const unsigned int SW1_table[] = {
  68. 900000, 950000, 1000000, 1050000, 1100000, 1150000, 1200000, 1250000,
  69. 1300000, 1350000, 1400000, 1450000, 1500000, 1600000, 1875000, 2250000,
  70. };
  71. #define SW2_table SW1_table
  72. static const unsigned int SW3_table[] = {
  73. 4000000, 4500000, 5000000, 5500000,
  74. };
  75. struct pcap_regulator {
  76. const u8 reg;
  77. const u8 en;
  78. const u8 index;
  79. const u8 stby;
  80. const u8 lowpwr;
  81. };
  82. #define NA 0xff
  83. #define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \
  84. [_vreg] = { \
  85. .reg = _reg, \
  86. .en = _en, \
  87. .index = _index, \
  88. .stby = _stby, \
  89. .lowpwr = _lowpwr, \
  90. }
  91. static struct pcap_regulator vreg_table[] = {
  92. VREG_INFO(V1, PCAP_REG_VREG1, 1, 2, 18, 0),
  93. VREG_INFO(V2, PCAP_REG_VREG1, 5, 6, 19, 22),
  94. VREG_INFO(V3, PCAP_REG_VREG1, 7, 8, 20, 23),
  95. VREG_INFO(V4, PCAP_REG_VREG1, 11, 12, 21, 24),
  96. /* V5 STBY and LOWPWR are on PCAP_REG_VREG2 */
  97. VREG_INFO(V5, PCAP_REG_VREG1, 15, 16, 12, 19),
  98. VREG_INFO(V6, PCAP_REG_VREG2, 1, 2, 14, 20),
  99. VREG_INFO(V7, PCAP_REG_VREG2, 3, 4, 15, 21),
  100. VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
  101. VREG_INFO(V9, PCAP_REG_VREG2, 9, 10, 17, 23),
  102. VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24),
  103. VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1, 2, 22, 23),
  104. /* VAUX2 ... VSIM2 STBY and LOWPWR are on PCAP_REG_LOWPWR */
  105. VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4, 5, 0, 1),
  106. VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7, 8, 2, 3),
  107. VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4, 5),
  108. VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6),
  109. VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
  110. VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA),
  111. VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
  112. VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
  113. /* SW3 STBY is on PCAP_REG_AUXVREG */
  114. VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA),
  115. /* SWxS used to control SWx voltage on standby */
  116. /* VREG_INFO(SW1S, PCAP_REG_LOWPWR, NA, 12, NA, NA),
  117. VREG_INFO(SW2S, PCAP_REG_LOWPWR, NA, 20, NA, NA), */
  118. };
  119. static int pcap_regulator_set_voltage_sel(struct regulator_dev *rdev,
  120. unsigned selector)
  121. {
  122. struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
  123. void *pcap = rdev_get_drvdata(rdev);
  124. /* the regulator doesn't support voltage switching */
  125. if (rdev->desc->n_voltages == 1)
  126. return -EINVAL;
  127. return ezx_pcap_set_bits(pcap, vreg->reg,
  128. (rdev->desc->n_voltages - 1) << vreg->index,
  129. selector << vreg->index);
  130. }
  131. static int pcap_regulator_get_voltage_sel(struct regulator_dev *rdev)
  132. {
  133. struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
  134. void *pcap = rdev_get_drvdata(rdev);
  135. u32 tmp;
  136. if (rdev->desc->n_voltages == 1)
  137. return 0;
  138. ezx_pcap_read(pcap, vreg->reg, &tmp);
  139. tmp = ((tmp >> vreg->index) & (rdev->desc->n_voltages - 1));
  140. return tmp;
  141. }
  142. static int pcap_regulator_enable(struct regulator_dev *rdev)
  143. {
  144. struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
  145. void *pcap = rdev_get_drvdata(rdev);
  146. if (vreg->en == NA)
  147. return -EINVAL;
  148. return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en);
  149. }
  150. static int pcap_regulator_disable(struct regulator_dev *rdev)
  151. {
  152. struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
  153. void *pcap = rdev_get_drvdata(rdev);
  154. if (vreg->en == NA)
  155. return -EINVAL;
  156. return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0);
  157. }
  158. static int pcap_regulator_is_enabled(struct regulator_dev *rdev)
  159. {
  160. struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
  161. void *pcap = rdev_get_drvdata(rdev);
  162. u32 tmp;
  163. if (vreg->en == NA)
  164. return -EINVAL;
  165. ezx_pcap_read(pcap, vreg->reg, &tmp);
  166. return (tmp >> vreg->en) & 1;
  167. }
  168. static const struct regulator_ops pcap_regulator_ops = {
  169. .list_voltage = regulator_list_voltage_table,
  170. .set_voltage_sel = pcap_regulator_set_voltage_sel,
  171. .get_voltage_sel = pcap_regulator_get_voltage_sel,
  172. .enable = pcap_regulator_enable,
  173. .disable = pcap_regulator_disable,
  174. .is_enabled = pcap_regulator_is_enabled,
  175. };
  176. #define VREG(_vreg) \
  177. [_vreg] = { \
  178. .name = #_vreg, \
  179. .id = _vreg, \
  180. .n_voltages = ARRAY_SIZE(_vreg##_table), \
  181. .volt_table = _vreg##_table, \
  182. .ops = &pcap_regulator_ops, \
  183. .type = REGULATOR_VOLTAGE, \
  184. .owner = THIS_MODULE, \
  185. }
  186. static const struct regulator_desc pcap_regulators[] = {
  187. VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),
  188. VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
  189. VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
  190. };
  191. static int pcap_regulator_probe(struct platform_device *pdev)
  192. {
  193. struct regulator_dev *rdev;
  194. void *pcap = dev_get_drvdata(pdev->dev.parent);
  195. struct regulator_config config = { };
  196. config.dev = &pdev->dev;
  197. config.init_data = dev_get_platdata(&pdev->dev);
  198. config.driver_data = pcap;
  199. rdev = devm_regulator_register(&pdev->dev, &pcap_regulators[pdev->id],
  200. &config);
  201. if (IS_ERR(rdev))
  202. return PTR_ERR(rdev);
  203. platform_set_drvdata(pdev, rdev);
  204. return 0;
  205. }
  206. static struct platform_driver pcap_regulator_driver = {
  207. .driver = {
  208. .name = "pcap-regulator",
  209. },
  210. .probe = pcap_regulator_probe,
  211. };
  212. static int __init pcap_regulator_init(void)
  213. {
  214. return platform_driver_register(&pcap_regulator_driver);
  215. }
  216. static void __exit pcap_regulator_exit(void)
  217. {
  218. platform_driver_unregister(&pcap_regulator_driver);
  219. }
  220. subsys_initcall(pcap_regulator_init);
  221. module_exit(pcap_regulator_exit);
  222. MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>");
  223. MODULE_DESCRIPTION("PCAP2 Regulator Driver");
  224. MODULE_LICENSE("GPL");