palmas-regulator.c 45 KB

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  1. /*
  2. * Driver for Regulator part of Palmas PMIC Chips
  3. *
  4. * Copyright 2011-2013 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Ian Lartey <ian@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/regmap.h>
  24. #include <linux/mfd/palmas.h>
  25. #include <linux/of.h>
  26. #include <linux/of_platform.h>
  27. #include <linux/regulator/of_regulator.h>
  28. static const struct regulator_linear_range smps_low_ranges[] = {
  29. REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
  30. REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
  31. REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
  32. REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
  33. };
  34. static const struct regulator_linear_range smps_high_ranges[] = {
  35. REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
  36. REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
  37. REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
  38. REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
  39. };
  40. static struct palmas_regs_info palmas_generic_regs_info[] = {
  41. {
  42. .name = "SMPS12",
  43. .sname = "smps1-in",
  44. .vsel_addr = PALMAS_SMPS12_VOLTAGE,
  45. .ctrl_addr = PALMAS_SMPS12_CTRL,
  46. .tstep_addr = PALMAS_SMPS12_TSTEP,
  47. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
  48. },
  49. {
  50. .name = "SMPS123",
  51. .sname = "smps1-in",
  52. .vsel_addr = PALMAS_SMPS12_VOLTAGE,
  53. .ctrl_addr = PALMAS_SMPS12_CTRL,
  54. .tstep_addr = PALMAS_SMPS12_TSTEP,
  55. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
  56. },
  57. {
  58. .name = "SMPS3",
  59. .sname = "smps3-in",
  60. .vsel_addr = PALMAS_SMPS3_VOLTAGE,
  61. .ctrl_addr = PALMAS_SMPS3_CTRL,
  62. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
  63. },
  64. {
  65. .name = "SMPS45",
  66. .sname = "smps4-in",
  67. .vsel_addr = PALMAS_SMPS45_VOLTAGE,
  68. .ctrl_addr = PALMAS_SMPS45_CTRL,
  69. .tstep_addr = PALMAS_SMPS45_TSTEP,
  70. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
  71. },
  72. {
  73. .name = "SMPS457",
  74. .sname = "smps4-in",
  75. .vsel_addr = PALMAS_SMPS45_VOLTAGE,
  76. .ctrl_addr = PALMAS_SMPS45_CTRL,
  77. .tstep_addr = PALMAS_SMPS45_TSTEP,
  78. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
  79. },
  80. {
  81. .name = "SMPS6",
  82. .sname = "smps6-in",
  83. .vsel_addr = PALMAS_SMPS6_VOLTAGE,
  84. .ctrl_addr = PALMAS_SMPS6_CTRL,
  85. .tstep_addr = PALMAS_SMPS6_TSTEP,
  86. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
  87. },
  88. {
  89. .name = "SMPS7",
  90. .sname = "smps7-in",
  91. .vsel_addr = PALMAS_SMPS7_VOLTAGE,
  92. .ctrl_addr = PALMAS_SMPS7_CTRL,
  93. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
  94. },
  95. {
  96. .name = "SMPS8",
  97. .sname = "smps8-in",
  98. .vsel_addr = PALMAS_SMPS8_VOLTAGE,
  99. .ctrl_addr = PALMAS_SMPS8_CTRL,
  100. .tstep_addr = PALMAS_SMPS8_TSTEP,
  101. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
  102. },
  103. {
  104. .name = "SMPS9",
  105. .sname = "smps9-in",
  106. .vsel_addr = PALMAS_SMPS9_VOLTAGE,
  107. .ctrl_addr = PALMAS_SMPS9_CTRL,
  108. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
  109. },
  110. {
  111. .name = "SMPS10_OUT2",
  112. .sname = "smps10-in",
  113. .ctrl_addr = PALMAS_SMPS10_CTRL,
  114. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
  115. },
  116. {
  117. .name = "SMPS10_OUT1",
  118. .sname = "smps10-out2",
  119. .ctrl_addr = PALMAS_SMPS10_CTRL,
  120. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
  121. },
  122. {
  123. .name = "LDO1",
  124. .sname = "ldo1-in",
  125. .vsel_addr = PALMAS_LDO1_VOLTAGE,
  126. .ctrl_addr = PALMAS_LDO1_CTRL,
  127. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
  128. },
  129. {
  130. .name = "LDO2",
  131. .sname = "ldo2-in",
  132. .vsel_addr = PALMAS_LDO2_VOLTAGE,
  133. .ctrl_addr = PALMAS_LDO2_CTRL,
  134. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
  135. },
  136. {
  137. .name = "LDO3",
  138. .sname = "ldo3-in",
  139. .vsel_addr = PALMAS_LDO3_VOLTAGE,
  140. .ctrl_addr = PALMAS_LDO3_CTRL,
  141. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
  142. },
  143. {
  144. .name = "LDO4",
  145. .sname = "ldo4-in",
  146. .vsel_addr = PALMAS_LDO4_VOLTAGE,
  147. .ctrl_addr = PALMAS_LDO4_CTRL,
  148. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
  149. },
  150. {
  151. .name = "LDO5",
  152. .sname = "ldo5-in",
  153. .vsel_addr = PALMAS_LDO5_VOLTAGE,
  154. .ctrl_addr = PALMAS_LDO5_CTRL,
  155. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
  156. },
  157. {
  158. .name = "LDO6",
  159. .sname = "ldo6-in",
  160. .vsel_addr = PALMAS_LDO6_VOLTAGE,
  161. .ctrl_addr = PALMAS_LDO6_CTRL,
  162. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
  163. },
  164. {
  165. .name = "LDO7",
  166. .sname = "ldo7-in",
  167. .vsel_addr = PALMAS_LDO7_VOLTAGE,
  168. .ctrl_addr = PALMAS_LDO7_CTRL,
  169. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
  170. },
  171. {
  172. .name = "LDO8",
  173. .sname = "ldo8-in",
  174. .vsel_addr = PALMAS_LDO8_VOLTAGE,
  175. .ctrl_addr = PALMAS_LDO8_CTRL,
  176. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
  177. },
  178. {
  179. .name = "LDO9",
  180. .sname = "ldo9-in",
  181. .vsel_addr = PALMAS_LDO9_VOLTAGE,
  182. .ctrl_addr = PALMAS_LDO9_CTRL,
  183. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
  184. },
  185. {
  186. .name = "LDOLN",
  187. .sname = "ldoln-in",
  188. .vsel_addr = PALMAS_LDOLN_VOLTAGE,
  189. .ctrl_addr = PALMAS_LDOLN_CTRL,
  190. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
  191. },
  192. {
  193. .name = "LDOUSB",
  194. .sname = "ldousb-in",
  195. .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
  196. .ctrl_addr = PALMAS_LDOUSB_CTRL,
  197. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
  198. },
  199. {
  200. .name = "REGEN1",
  201. .ctrl_addr = PALMAS_REGEN1_CTRL,
  202. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
  203. },
  204. {
  205. .name = "REGEN2",
  206. .ctrl_addr = PALMAS_REGEN2_CTRL,
  207. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
  208. },
  209. {
  210. .name = "REGEN3",
  211. .ctrl_addr = PALMAS_REGEN3_CTRL,
  212. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
  213. },
  214. {
  215. .name = "SYSEN1",
  216. .ctrl_addr = PALMAS_SYSEN1_CTRL,
  217. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
  218. },
  219. {
  220. .name = "SYSEN2",
  221. .ctrl_addr = PALMAS_SYSEN2_CTRL,
  222. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
  223. },
  224. };
  225. static struct palmas_regs_info tps65917_regs_info[] = {
  226. {
  227. .name = "SMPS1",
  228. .sname = "smps1-in",
  229. .vsel_addr = TPS65917_SMPS1_VOLTAGE,
  230. .ctrl_addr = TPS65917_SMPS1_CTRL,
  231. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
  232. },
  233. {
  234. .name = "SMPS2",
  235. .sname = "smps2-in",
  236. .vsel_addr = TPS65917_SMPS2_VOLTAGE,
  237. .ctrl_addr = TPS65917_SMPS2_CTRL,
  238. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
  239. },
  240. {
  241. .name = "SMPS3",
  242. .sname = "smps3-in",
  243. .vsel_addr = TPS65917_SMPS3_VOLTAGE,
  244. .ctrl_addr = TPS65917_SMPS3_CTRL,
  245. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
  246. },
  247. {
  248. .name = "SMPS4",
  249. .sname = "smps4-in",
  250. .vsel_addr = TPS65917_SMPS4_VOLTAGE,
  251. .ctrl_addr = TPS65917_SMPS4_CTRL,
  252. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
  253. },
  254. {
  255. .name = "SMPS5",
  256. .sname = "smps5-in",
  257. .vsel_addr = TPS65917_SMPS5_VOLTAGE,
  258. .ctrl_addr = TPS65917_SMPS5_CTRL,
  259. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
  260. },
  261. {
  262. .name = "SMPS12",
  263. .sname = "smps1-in",
  264. .vsel_addr = TPS65917_SMPS1_VOLTAGE,
  265. .ctrl_addr = TPS65917_SMPS1_CTRL,
  266. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS12,
  267. },
  268. {
  269. .name = "LDO1",
  270. .sname = "ldo1-in",
  271. .vsel_addr = TPS65917_LDO1_VOLTAGE,
  272. .ctrl_addr = TPS65917_LDO1_CTRL,
  273. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
  274. },
  275. {
  276. .name = "LDO2",
  277. .sname = "ldo2-in",
  278. .vsel_addr = TPS65917_LDO2_VOLTAGE,
  279. .ctrl_addr = TPS65917_LDO2_CTRL,
  280. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
  281. },
  282. {
  283. .name = "LDO3",
  284. .sname = "ldo3-in",
  285. .vsel_addr = TPS65917_LDO3_VOLTAGE,
  286. .ctrl_addr = TPS65917_LDO3_CTRL,
  287. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
  288. },
  289. {
  290. .name = "LDO4",
  291. .sname = "ldo4-in",
  292. .vsel_addr = TPS65917_LDO4_VOLTAGE,
  293. .ctrl_addr = TPS65917_LDO4_CTRL,
  294. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
  295. },
  296. {
  297. .name = "LDO5",
  298. .sname = "ldo5-in",
  299. .vsel_addr = TPS65917_LDO5_VOLTAGE,
  300. .ctrl_addr = TPS65917_LDO5_CTRL,
  301. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
  302. },
  303. {
  304. .name = "REGEN1",
  305. .ctrl_addr = TPS65917_REGEN1_CTRL,
  306. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
  307. },
  308. {
  309. .name = "REGEN2",
  310. .ctrl_addr = TPS65917_REGEN2_CTRL,
  311. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
  312. },
  313. {
  314. .name = "REGEN3",
  315. .ctrl_addr = TPS65917_REGEN3_CTRL,
  316. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
  317. },
  318. };
  319. #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
  320. [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
  321. .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
  322. .reg_offset = _offset, \
  323. .bit_pos = _pos, \
  324. }
  325. static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
  326. EXTERNAL_REQUESTOR(REGEN1, 0, 0),
  327. EXTERNAL_REQUESTOR(REGEN2, 0, 1),
  328. EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
  329. EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
  330. EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
  331. EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
  332. EXTERNAL_REQUESTOR(REGEN3, 0, 6),
  333. EXTERNAL_REQUESTOR(SMPS12, 1, 0),
  334. EXTERNAL_REQUESTOR(SMPS3, 1, 1),
  335. EXTERNAL_REQUESTOR(SMPS45, 1, 2),
  336. EXTERNAL_REQUESTOR(SMPS6, 1, 3),
  337. EXTERNAL_REQUESTOR(SMPS7, 1, 4),
  338. EXTERNAL_REQUESTOR(SMPS8, 1, 5),
  339. EXTERNAL_REQUESTOR(SMPS9, 1, 6),
  340. EXTERNAL_REQUESTOR(SMPS10, 1, 7),
  341. EXTERNAL_REQUESTOR(LDO1, 2, 0),
  342. EXTERNAL_REQUESTOR(LDO2, 2, 1),
  343. EXTERNAL_REQUESTOR(LDO3, 2, 2),
  344. EXTERNAL_REQUESTOR(LDO4, 2, 3),
  345. EXTERNAL_REQUESTOR(LDO5, 2, 4),
  346. EXTERNAL_REQUESTOR(LDO6, 2, 5),
  347. EXTERNAL_REQUESTOR(LDO7, 2, 6),
  348. EXTERNAL_REQUESTOR(LDO8, 2, 7),
  349. EXTERNAL_REQUESTOR(LDO9, 3, 0),
  350. EXTERNAL_REQUESTOR(LDOLN, 3, 1),
  351. EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
  352. };
  353. #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
  354. [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
  355. .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
  356. .reg_offset = _offset, \
  357. .bit_pos = _pos, \
  358. }
  359. static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
  360. EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
  361. EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
  362. EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
  363. EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
  364. EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
  365. EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
  366. EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
  367. EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
  368. EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5),
  369. EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
  370. EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
  371. EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
  372. EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
  373. EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
  374. };
  375. static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
  376. #define SMPS_CTRL_MODE_OFF 0x00
  377. #define SMPS_CTRL_MODE_ON 0x01
  378. #define SMPS_CTRL_MODE_ECO 0x02
  379. #define SMPS_CTRL_MODE_PWM 0x03
  380. #define PALMAS_SMPS_NUM_VOLTAGES 122
  381. #define PALMAS_SMPS10_NUM_VOLTAGES 2
  382. #define PALMAS_LDO_NUM_VOLTAGES 50
  383. #define SMPS10_VSEL (1<<3)
  384. #define SMPS10_BOOST_EN (1<<2)
  385. #define SMPS10_BYPASS_EN (1<<1)
  386. #define SMPS10_SWITCH_EN (1<<0)
  387. #define REGULATOR_SLAVE 0
  388. static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
  389. unsigned int *dest)
  390. {
  391. unsigned int addr;
  392. addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
  393. return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
  394. }
  395. static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
  396. unsigned int value)
  397. {
  398. unsigned int addr;
  399. addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
  400. return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
  401. }
  402. static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
  403. unsigned int *dest)
  404. {
  405. unsigned int addr;
  406. addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
  407. return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
  408. }
  409. static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
  410. unsigned int value)
  411. {
  412. unsigned int addr;
  413. addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
  414. return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
  415. }
  416. static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
  417. {
  418. int id = rdev_get_id(dev);
  419. int ret;
  420. struct palmas_pmic *pmic = rdev_get_drvdata(dev);
  421. struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
  422. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  423. unsigned int reg;
  424. bool rail_enable = true;
  425. ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
  426. if (ret)
  427. return ret;
  428. reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  429. if (reg == SMPS_CTRL_MODE_OFF)
  430. rail_enable = false;
  431. switch (mode) {
  432. case REGULATOR_MODE_NORMAL:
  433. reg |= SMPS_CTRL_MODE_ON;
  434. break;
  435. case REGULATOR_MODE_IDLE:
  436. reg |= SMPS_CTRL_MODE_ECO;
  437. break;
  438. case REGULATOR_MODE_FAST:
  439. reg |= SMPS_CTRL_MODE_PWM;
  440. break;
  441. default:
  442. return -EINVAL;
  443. }
  444. pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  445. if (rail_enable)
  446. palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
  447. /* Switch the enable value to ensure this is used for enable */
  448. pmic->desc[id].enable_val = pmic->current_reg_mode[id];
  449. return 0;
  450. }
  451. static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
  452. {
  453. struct palmas_pmic *pmic = rdev_get_drvdata(dev);
  454. int id = rdev_get_id(dev);
  455. unsigned int reg;
  456. reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  457. switch (reg) {
  458. case SMPS_CTRL_MODE_ON:
  459. return REGULATOR_MODE_NORMAL;
  460. case SMPS_CTRL_MODE_ECO:
  461. return REGULATOR_MODE_IDLE;
  462. case SMPS_CTRL_MODE_PWM:
  463. return REGULATOR_MODE_FAST;
  464. }
  465. return 0;
  466. }
  467. static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
  468. int ramp_delay)
  469. {
  470. int id = rdev_get_id(rdev);
  471. struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
  472. struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
  473. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  474. unsigned int reg = 0;
  475. int ret;
  476. /* SMPS3 and SMPS7 do not have tstep_addr setting */
  477. switch (id) {
  478. case PALMAS_REG_SMPS3:
  479. case PALMAS_REG_SMPS7:
  480. return 0;
  481. }
  482. if (ramp_delay <= 0)
  483. reg = 0;
  484. else if (ramp_delay <= 2500)
  485. reg = 3;
  486. else if (ramp_delay <= 5000)
  487. reg = 2;
  488. else
  489. reg = 1;
  490. ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
  491. if (ret < 0) {
  492. dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
  493. return ret;
  494. }
  495. pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
  496. return ret;
  497. }
  498. static const struct regulator_ops palmas_ops_smps = {
  499. .is_enabled = regulator_is_enabled_regmap,
  500. .enable = regulator_enable_regmap,
  501. .disable = regulator_disable_regmap,
  502. .set_mode = palmas_set_mode_smps,
  503. .get_mode = palmas_get_mode_smps,
  504. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  505. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  506. .list_voltage = regulator_list_voltage_linear_range,
  507. .map_voltage = regulator_map_voltage_linear_range,
  508. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  509. .set_ramp_delay = palmas_smps_set_ramp_delay,
  510. };
  511. static const struct regulator_ops palmas_ops_ext_control_smps = {
  512. .set_mode = palmas_set_mode_smps,
  513. .get_mode = palmas_get_mode_smps,
  514. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  515. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  516. .list_voltage = regulator_list_voltage_linear_range,
  517. .map_voltage = regulator_map_voltage_linear_range,
  518. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  519. .set_ramp_delay = palmas_smps_set_ramp_delay,
  520. };
  521. static const struct regulator_ops palmas_ops_smps10 = {
  522. .is_enabled = regulator_is_enabled_regmap,
  523. .enable = regulator_enable_regmap,
  524. .disable = regulator_disable_regmap,
  525. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  526. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  527. .list_voltage = regulator_list_voltage_linear,
  528. .map_voltage = regulator_map_voltage_linear,
  529. .set_bypass = regulator_set_bypass_regmap,
  530. .get_bypass = regulator_get_bypass_regmap,
  531. };
  532. static const struct regulator_ops tps65917_ops_smps = {
  533. .is_enabled = regulator_is_enabled_regmap,
  534. .enable = regulator_enable_regmap,
  535. .disable = regulator_disable_regmap,
  536. .set_mode = palmas_set_mode_smps,
  537. .get_mode = palmas_get_mode_smps,
  538. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  539. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  540. .list_voltage = regulator_list_voltage_linear_range,
  541. .map_voltage = regulator_map_voltage_linear_range,
  542. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  543. };
  544. static const struct regulator_ops tps65917_ops_ext_control_smps = {
  545. .set_mode = palmas_set_mode_smps,
  546. .get_mode = palmas_get_mode_smps,
  547. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  548. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  549. .list_voltage = regulator_list_voltage_linear_range,
  550. .map_voltage = regulator_map_voltage_linear_range,
  551. };
  552. static int palmas_is_enabled_ldo(struct regulator_dev *dev)
  553. {
  554. int id = rdev_get_id(dev);
  555. struct palmas_pmic *pmic = rdev_get_drvdata(dev);
  556. struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
  557. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  558. unsigned int reg;
  559. palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
  560. reg &= PALMAS_LDO1_CTRL_STATUS;
  561. return !!(reg);
  562. }
  563. static const struct regulator_ops palmas_ops_ldo = {
  564. .is_enabled = palmas_is_enabled_ldo,
  565. .enable = regulator_enable_regmap,
  566. .disable = regulator_disable_regmap,
  567. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  568. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  569. .list_voltage = regulator_list_voltage_linear,
  570. .map_voltage = regulator_map_voltage_linear,
  571. };
  572. static const struct regulator_ops palmas_ops_ldo9 = {
  573. .is_enabled = palmas_is_enabled_ldo,
  574. .enable = regulator_enable_regmap,
  575. .disable = regulator_disable_regmap,
  576. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  577. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  578. .list_voltage = regulator_list_voltage_linear,
  579. .map_voltage = regulator_map_voltage_linear,
  580. .set_bypass = regulator_set_bypass_regmap,
  581. .get_bypass = regulator_get_bypass_regmap,
  582. };
  583. static const struct regulator_ops palmas_ops_ext_control_ldo = {
  584. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  585. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  586. .list_voltage = regulator_list_voltage_linear,
  587. .map_voltage = regulator_map_voltage_linear,
  588. };
  589. static const struct regulator_ops palmas_ops_extreg = {
  590. .is_enabled = regulator_is_enabled_regmap,
  591. .enable = regulator_enable_regmap,
  592. .disable = regulator_disable_regmap,
  593. };
  594. static const struct regulator_ops palmas_ops_ext_control_extreg = {
  595. };
  596. static const struct regulator_ops tps65917_ops_ldo = {
  597. .is_enabled = palmas_is_enabled_ldo,
  598. .enable = regulator_enable_regmap,
  599. .disable = regulator_disable_regmap,
  600. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  601. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  602. .list_voltage = regulator_list_voltage_linear,
  603. .map_voltage = regulator_map_voltage_linear,
  604. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  605. };
  606. static const struct regulator_ops tps65917_ops_ldo_1_2 = {
  607. .is_enabled = palmas_is_enabled_ldo,
  608. .enable = regulator_enable_regmap,
  609. .disable = regulator_disable_regmap,
  610. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  611. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  612. .list_voltage = regulator_list_voltage_linear,
  613. .map_voltage = regulator_map_voltage_linear,
  614. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  615. .set_bypass = regulator_set_bypass_regmap,
  616. .get_bypass = regulator_get_bypass_regmap,
  617. };
  618. static int palmas_regulator_config_external(struct palmas *palmas, int id,
  619. struct palmas_reg_init *reg_init)
  620. {
  621. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  622. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  623. int ret;
  624. ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
  625. reg_init->roof_floor, true);
  626. if (ret < 0)
  627. dev_err(palmas->dev,
  628. "Ext control config for regulator %d failed %d\n",
  629. id, ret);
  630. return ret;
  631. }
  632. /*
  633. * setup the hardware based sleep configuration of the SMPS/LDO regulators
  634. * from the platform data. This is different to the software based control
  635. * supported by the regulator framework as it is controlled by toggling
  636. * pins on the PMIC such as PREQ, SYSEN, ...
  637. */
  638. static int palmas_smps_init(struct palmas *palmas, int id,
  639. struct palmas_reg_init *reg_init)
  640. {
  641. unsigned int reg;
  642. int ret;
  643. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  644. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  645. unsigned int addr = rinfo->ctrl_addr;
  646. ret = palmas_smps_read(palmas, addr, &reg);
  647. if (ret)
  648. return ret;
  649. switch (id) {
  650. case PALMAS_REG_SMPS10_OUT1:
  651. case PALMAS_REG_SMPS10_OUT2:
  652. reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
  653. if (reg_init->mode_sleep)
  654. reg |= reg_init->mode_sleep <<
  655. PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
  656. break;
  657. default:
  658. if (reg_init->warm_reset)
  659. reg |= PALMAS_SMPS12_CTRL_WR_S;
  660. else
  661. reg &= ~PALMAS_SMPS12_CTRL_WR_S;
  662. if (reg_init->roof_floor)
  663. reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
  664. else
  665. reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
  666. reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
  667. if (reg_init->mode_sleep)
  668. reg |= reg_init->mode_sleep <<
  669. PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
  670. }
  671. ret = palmas_smps_write(palmas, addr, reg);
  672. if (ret)
  673. return ret;
  674. if (rinfo->vsel_addr && reg_init->vsel) {
  675. reg = reg_init->vsel;
  676. ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
  677. if (ret)
  678. return ret;
  679. }
  680. if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
  681. (id != PALMAS_REG_SMPS10_OUT2)) {
  682. /* Enable externally controlled regulator */
  683. ret = palmas_smps_read(palmas, addr, &reg);
  684. if (ret < 0)
  685. return ret;
  686. if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
  687. reg |= SMPS_CTRL_MODE_ON;
  688. ret = palmas_smps_write(palmas, addr, reg);
  689. if (ret < 0)
  690. return ret;
  691. }
  692. return palmas_regulator_config_external(palmas, id, reg_init);
  693. }
  694. return 0;
  695. }
  696. static int palmas_ldo_init(struct palmas *palmas, int id,
  697. struct palmas_reg_init *reg_init)
  698. {
  699. unsigned int reg;
  700. unsigned int addr;
  701. int ret;
  702. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  703. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  704. addr = rinfo->ctrl_addr;
  705. ret = palmas_ldo_read(palmas, addr, &reg);
  706. if (ret)
  707. return ret;
  708. if (reg_init->warm_reset)
  709. reg |= PALMAS_LDO1_CTRL_WR_S;
  710. else
  711. reg &= ~PALMAS_LDO1_CTRL_WR_S;
  712. if (reg_init->mode_sleep)
  713. reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
  714. else
  715. reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
  716. ret = palmas_ldo_write(palmas, addr, reg);
  717. if (ret)
  718. return ret;
  719. if (reg_init->roof_floor) {
  720. /* Enable externally controlled regulator */
  721. ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
  722. addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
  723. PALMAS_LDO1_CTRL_MODE_ACTIVE);
  724. if (ret < 0) {
  725. dev_err(palmas->dev,
  726. "LDO Register 0x%02x update failed %d\n",
  727. addr, ret);
  728. return ret;
  729. }
  730. return palmas_regulator_config_external(palmas, id, reg_init);
  731. }
  732. return 0;
  733. }
  734. static int palmas_extreg_init(struct palmas *palmas, int id,
  735. struct palmas_reg_init *reg_init)
  736. {
  737. unsigned int addr;
  738. int ret;
  739. unsigned int val = 0;
  740. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  741. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  742. addr = rinfo->ctrl_addr;
  743. if (reg_init->mode_sleep)
  744. val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
  745. ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
  746. addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
  747. if (ret < 0) {
  748. dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
  749. addr, ret);
  750. return ret;
  751. }
  752. if (reg_init->roof_floor) {
  753. /* Enable externally controlled regulator */
  754. ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
  755. addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
  756. PALMAS_REGEN1_CTRL_MODE_ACTIVE);
  757. if (ret < 0) {
  758. dev_err(palmas->dev,
  759. "Resource Register 0x%02x update failed %d\n",
  760. addr, ret);
  761. return ret;
  762. }
  763. return palmas_regulator_config_external(palmas, id, reg_init);
  764. }
  765. return 0;
  766. }
  767. static void palmas_enable_ldo8_track(struct palmas *palmas)
  768. {
  769. unsigned int reg;
  770. unsigned int addr;
  771. int ret;
  772. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  773. struct palmas_regs_info *rinfo;
  774. rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
  775. addr = rinfo->ctrl_addr;
  776. ret = palmas_ldo_read(palmas, addr, &reg);
  777. if (ret) {
  778. dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
  779. return;
  780. }
  781. reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
  782. ret = palmas_ldo_write(palmas, addr, reg);
  783. if (ret < 0) {
  784. dev_err(palmas->dev, "Error in enabling tracking mode\n");
  785. return;
  786. }
  787. /*
  788. * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
  789. * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
  790. * and can be set from 0.45 to 1.65 V.
  791. */
  792. addr = rinfo->vsel_addr;
  793. ret = palmas_ldo_read(palmas, addr, &reg);
  794. if (ret) {
  795. dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
  796. return;
  797. }
  798. reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
  799. ret = palmas_ldo_write(palmas, addr, reg);
  800. if (ret < 0)
  801. dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
  802. return;
  803. }
  804. static int palmas_ldo_registration(struct palmas_pmic *pmic,
  805. struct palmas_pmic_driver_data *ddata,
  806. struct palmas_pmic_platform_data *pdata,
  807. const char *pdev_name,
  808. struct regulator_config config)
  809. {
  810. int id, ret;
  811. struct regulator_dev *rdev;
  812. struct palmas_reg_init *reg_init;
  813. struct palmas_regs_info *rinfo;
  814. struct regulator_desc *desc;
  815. for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
  816. if (pdata && pdata->reg_init[id])
  817. reg_init = pdata->reg_init[id];
  818. else
  819. reg_init = NULL;
  820. rinfo = &ddata->palmas_regs_info[id];
  821. /* Miss out regulators which are not available due
  822. * to alternate functions.
  823. */
  824. /* Register the regulators */
  825. desc = &pmic->desc[id];
  826. desc->name = rinfo->name;
  827. desc->id = id;
  828. desc->type = REGULATOR_VOLTAGE;
  829. desc->owner = THIS_MODULE;
  830. if (id < PALMAS_REG_REGEN1) {
  831. desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
  832. if (reg_init && reg_init->roof_floor)
  833. desc->ops = &palmas_ops_ext_control_ldo;
  834. else
  835. desc->ops = &palmas_ops_ldo;
  836. desc->min_uV = 900000;
  837. desc->uV_step = 50000;
  838. desc->linear_min_sel = 1;
  839. desc->enable_time = 500;
  840. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  841. rinfo->vsel_addr);
  842. desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
  843. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  844. rinfo->ctrl_addr);
  845. desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
  846. /* Check if LDO8 is in tracking mode or not */
  847. if (pdata && (id == PALMAS_REG_LDO8) &&
  848. pdata->enable_ldo8_tracking) {
  849. palmas_enable_ldo8_track(pmic->palmas);
  850. desc->min_uV = 450000;
  851. desc->uV_step = 25000;
  852. }
  853. /* LOD6 in vibrator mode will have enable time 2000us */
  854. if (pdata && pdata->ldo6_vibrator &&
  855. (id == PALMAS_REG_LDO6))
  856. desc->enable_time = 2000;
  857. if (id == PALMAS_REG_LDO9) {
  858. desc->ops = &palmas_ops_ldo9;
  859. desc->bypass_reg = desc->enable_reg;
  860. desc->bypass_val_on =
  861. PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
  862. desc->bypass_mask =
  863. PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
  864. }
  865. } else {
  866. if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
  867. continue;
  868. desc->n_voltages = 1;
  869. if (reg_init && reg_init->roof_floor)
  870. desc->ops = &palmas_ops_ext_control_extreg;
  871. else
  872. desc->ops = &palmas_ops_extreg;
  873. desc->enable_reg =
  874. PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
  875. rinfo->ctrl_addr);
  876. desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
  877. }
  878. if (pdata)
  879. config.init_data = pdata->reg_data[id];
  880. else
  881. config.init_data = NULL;
  882. desc->supply_name = rinfo->sname;
  883. config.of_node = ddata->palmas_matches[id].of_node;
  884. rdev = devm_regulator_register(pmic->dev, desc, &config);
  885. if (IS_ERR(rdev)) {
  886. dev_err(pmic->dev,
  887. "failed to register %s regulator\n",
  888. pdev_name);
  889. return PTR_ERR(rdev);
  890. }
  891. /* Save regulator for cleanup */
  892. pmic->rdev[id] = rdev;
  893. /* Initialise sleep/init values from platform data */
  894. if (pdata) {
  895. reg_init = pdata->reg_init[id];
  896. if (reg_init) {
  897. if (id <= ddata->ldo_end)
  898. ret = palmas_ldo_init(pmic->palmas, id,
  899. reg_init);
  900. else
  901. ret = palmas_extreg_init(pmic->palmas,
  902. id, reg_init);
  903. if (ret)
  904. return ret;
  905. }
  906. }
  907. }
  908. return 0;
  909. }
  910. static int tps65917_ldo_registration(struct palmas_pmic *pmic,
  911. struct palmas_pmic_driver_data *ddata,
  912. struct palmas_pmic_platform_data *pdata,
  913. const char *pdev_name,
  914. struct regulator_config config)
  915. {
  916. int id, ret;
  917. struct regulator_dev *rdev;
  918. struct palmas_reg_init *reg_init;
  919. struct palmas_regs_info *rinfo;
  920. struct regulator_desc *desc;
  921. for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
  922. if (pdata && pdata->reg_init[id])
  923. reg_init = pdata->reg_init[id];
  924. else
  925. reg_init = NULL;
  926. /* Miss out regulators which are not available due
  927. * to alternate functions.
  928. */
  929. rinfo = &ddata->palmas_regs_info[id];
  930. /* Register the regulators */
  931. desc = &pmic->desc[id];
  932. desc->name = rinfo->name;
  933. desc->id = id;
  934. desc->type = REGULATOR_VOLTAGE;
  935. desc->owner = THIS_MODULE;
  936. if (id < TPS65917_REG_REGEN1) {
  937. desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
  938. if (reg_init && reg_init->roof_floor)
  939. desc->ops = &palmas_ops_ext_control_ldo;
  940. else
  941. desc->ops = &tps65917_ops_ldo;
  942. desc->min_uV = 900000;
  943. desc->uV_step = 50000;
  944. desc->linear_min_sel = 1;
  945. desc->enable_time = 500;
  946. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  947. rinfo->vsel_addr);
  948. desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
  949. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  950. rinfo->ctrl_addr);
  951. desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
  952. /*
  953. * To be confirmed. Discussion on going with PMIC Team.
  954. * It is of the order of ~60mV/uS.
  955. */
  956. desc->ramp_delay = 2500;
  957. if (id == TPS65917_REG_LDO1 ||
  958. id == TPS65917_REG_LDO2) {
  959. desc->ops = &tps65917_ops_ldo_1_2;
  960. desc->bypass_reg = desc->enable_reg;
  961. desc->bypass_val_on =
  962. TPS65917_LDO1_CTRL_BYPASS_EN;
  963. desc->bypass_mask =
  964. TPS65917_LDO1_CTRL_BYPASS_EN;
  965. }
  966. } else {
  967. desc->n_voltages = 1;
  968. if (reg_init && reg_init->roof_floor)
  969. desc->ops = &palmas_ops_ext_control_extreg;
  970. else
  971. desc->ops = &palmas_ops_extreg;
  972. desc->enable_reg =
  973. PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
  974. rinfo->ctrl_addr);
  975. desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
  976. }
  977. if (pdata)
  978. config.init_data = pdata->reg_data[id];
  979. else
  980. config.init_data = NULL;
  981. desc->supply_name = rinfo->sname;
  982. config.of_node = ddata->palmas_matches[id].of_node;
  983. rdev = devm_regulator_register(pmic->dev, desc, &config);
  984. if (IS_ERR(rdev)) {
  985. dev_err(pmic->dev,
  986. "failed to register %s regulator\n",
  987. pdev_name);
  988. return PTR_ERR(rdev);
  989. }
  990. /* Save regulator for cleanup */
  991. pmic->rdev[id] = rdev;
  992. /* Initialise sleep/init values from platform data */
  993. if (pdata) {
  994. reg_init = pdata->reg_init[id];
  995. if (reg_init) {
  996. if (id < TPS65917_REG_REGEN1)
  997. ret = palmas_ldo_init(pmic->palmas,
  998. id, reg_init);
  999. else
  1000. ret = palmas_extreg_init(pmic->palmas,
  1001. id, reg_init);
  1002. if (ret)
  1003. return ret;
  1004. }
  1005. }
  1006. }
  1007. return 0;
  1008. }
  1009. static int palmas_smps_registration(struct palmas_pmic *pmic,
  1010. struct palmas_pmic_driver_data *ddata,
  1011. struct palmas_pmic_platform_data *pdata,
  1012. const char *pdev_name,
  1013. struct regulator_config config)
  1014. {
  1015. int id, ret;
  1016. unsigned int addr, reg;
  1017. struct regulator_dev *rdev;
  1018. struct palmas_reg_init *reg_init;
  1019. struct palmas_regs_info *rinfo;
  1020. struct regulator_desc *desc;
  1021. for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
  1022. bool ramp_delay_support = false;
  1023. /*
  1024. * Miss out regulators which are not available due
  1025. * to slaving configurations.
  1026. */
  1027. switch (id) {
  1028. case PALMAS_REG_SMPS12:
  1029. case PALMAS_REG_SMPS3:
  1030. if (pmic->smps123)
  1031. continue;
  1032. if (id == PALMAS_REG_SMPS12)
  1033. ramp_delay_support = true;
  1034. break;
  1035. case PALMAS_REG_SMPS123:
  1036. if (!pmic->smps123)
  1037. continue;
  1038. ramp_delay_support = true;
  1039. break;
  1040. case PALMAS_REG_SMPS45:
  1041. case PALMAS_REG_SMPS7:
  1042. if (pmic->smps457)
  1043. continue;
  1044. if (id == PALMAS_REG_SMPS45)
  1045. ramp_delay_support = true;
  1046. break;
  1047. case PALMAS_REG_SMPS457:
  1048. if (!pmic->smps457)
  1049. continue;
  1050. ramp_delay_support = true;
  1051. break;
  1052. case PALMAS_REG_SMPS10_OUT1:
  1053. case PALMAS_REG_SMPS10_OUT2:
  1054. if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
  1055. continue;
  1056. }
  1057. rinfo = &ddata->palmas_regs_info[id];
  1058. desc = &pmic->desc[id];
  1059. if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
  1060. ramp_delay_support = true;
  1061. if (ramp_delay_support) {
  1062. addr = rinfo->tstep_addr;
  1063. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1064. if (ret < 0) {
  1065. dev_err(pmic->dev,
  1066. "reading TSTEP reg failed: %d\n", ret);
  1067. return ret;
  1068. }
  1069. desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
  1070. pmic->ramp_delay[id] = desc->ramp_delay;
  1071. }
  1072. /* Initialise sleep/init values from platform data */
  1073. if (pdata && pdata->reg_init[id]) {
  1074. reg_init = pdata->reg_init[id];
  1075. ret = palmas_smps_init(pmic->palmas, id, reg_init);
  1076. if (ret)
  1077. return ret;
  1078. } else {
  1079. reg_init = NULL;
  1080. }
  1081. /* Register the regulators */
  1082. desc->name = rinfo->name;
  1083. desc->id = id;
  1084. switch (id) {
  1085. case PALMAS_REG_SMPS10_OUT1:
  1086. case PALMAS_REG_SMPS10_OUT2:
  1087. desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
  1088. desc->ops = &palmas_ops_smps10;
  1089. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1090. PALMAS_SMPS10_CTRL);
  1091. desc->vsel_mask = SMPS10_VSEL;
  1092. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1093. PALMAS_SMPS10_CTRL);
  1094. if (id == PALMAS_REG_SMPS10_OUT1)
  1095. desc->enable_mask = SMPS10_SWITCH_EN;
  1096. else
  1097. desc->enable_mask = SMPS10_BOOST_EN;
  1098. desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1099. PALMAS_SMPS10_CTRL);
  1100. desc->bypass_val_on = SMPS10_BYPASS_EN;
  1101. desc->bypass_mask = SMPS10_BYPASS_EN;
  1102. desc->min_uV = 3750000;
  1103. desc->uV_step = 1250000;
  1104. break;
  1105. default:
  1106. /*
  1107. * Read and store the RANGE bit for later use
  1108. * This must be done before regulator is probed,
  1109. * otherwise we error in probe with unsupportable
  1110. * ranges. Read the current smps mode for later use.
  1111. */
  1112. addr = rinfo->vsel_addr;
  1113. desc->n_linear_ranges = 3;
  1114. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1115. if (ret)
  1116. return ret;
  1117. if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
  1118. pmic->range[id] = 1;
  1119. if (pmic->range[id])
  1120. desc->linear_ranges = smps_high_ranges;
  1121. else
  1122. desc->linear_ranges = smps_low_ranges;
  1123. if (reg_init && reg_init->roof_floor)
  1124. desc->ops = &palmas_ops_ext_control_smps;
  1125. else
  1126. desc->ops = &palmas_ops_smps;
  1127. desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
  1128. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1129. rinfo->vsel_addr);
  1130. desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
  1131. /* Read the smps mode for later use. */
  1132. addr = rinfo->ctrl_addr;
  1133. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1134. if (ret)
  1135. return ret;
  1136. pmic->current_reg_mode[id] = reg &
  1137. PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1138. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1139. rinfo->ctrl_addr);
  1140. desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1141. /* set_mode overrides this value */
  1142. desc->enable_val = SMPS_CTRL_MODE_ON;
  1143. }
  1144. desc->type = REGULATOR_VOLTAGE;
  1145. desc->owner = THIS_MODULE;
  1146. if (pdata)
  1147. config.init_data = pdata->reg_data[id];
  1148. else
  1149. config.init_data = NULL;
  1150. desc->supply_name = rinfo->sname;
  1151. config.of_node = ddata->palmas_matches[id].of_node;
  1152. rdev = devm_regulator_register(pmic->dev, desc, &config);
  1153. if (IS_ERR(rdev)) {
  1154. dev_err(pmic->dev,
  1155. "failed to register %s regulator\n",
  1156. pdev_name);
  1157. return PTR_ERR(rdev);
  1158. }
  1159. /* Save regulator for cleanup */
  1160. pmic->rdev[id] = rdev;
  1161. }
  1162. return 0;
  1163. }
  1164. static int tps65917_smps_registration(struct palmas_pmic *pmic,
  1165. struct palmas_pmic_driver_data *ddata,
  1166. struct palmas_pmic_platform_data *pdata,
  1167. const char *pdev_name,
  1168. struct regulator_config config)
  1169. {
  1170. int id, ret;
  1171. unsigned int addr, reg;
  1172. struct regulator_dev *rdev;
  1173. struct palmas_reg_init *reg_init;
  1174. struct palmas_regs_info *rinfo;
  1175. struct regulator_desc *desc;
  1176. for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
  1177. /*
  1178. * Miss out regulators which are not available due
  1179. * to slaving configurations.
  1180. */
  1181. desc = &pmic->desc[id];
  1182. desc->n_linear_ranges = 3;
  1183. if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) &&
  1184. pmic->smps12)
  1185. continue;
  1186. /* Initialise sleep/init values from platform data */
  1187. if (pdata && pdata->reg_init[id]) {
  1188. reg_init = pdata->reg_init[id];
  1189. ret = palmas_smps_init(pmic->palmas, id, reg_init);
  1190. if (ret)
  1191. return ret;
  1192. } else {
  1193. reg_init = NULL;
  1194. }
  1195. rinfo = &ddata->palmas_regs_info[id];
  1196. /* Register the regulators */
  1197. desc->name = rinfo->name;
  1198. desc->id = id;
  1199. /*
  1200. * Read and store the RANGE bit for later use
  1201. * This must be done before regulator is probed,
  1202. * otherwise we error in probe with unsupportable
  1203. * ranges. Read the current smps mode for later use.
  1204. */
  1205. addr = rinfo->vsel_addr;
  1206. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1207. if (ret)
  1208. return ret;
  1209. if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
  1210. pmic->range[id] = 1;
  1211. if (pmic->range[id])
  1212. desc->linear_ranges = smps_high_ranges;
  1213. else
  1214. desc->linear_ranges = smps_low_ranges;
  1215. if (reg_init && reg_init->roof_floor)
  1216. desc->ops = &tps65917_ops_ext_control_smps;
  1217. else
  1218. desc->ops = &tps65917_ops_smps;
  1219. desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
  1220. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1221. rinfo->vsel_addr);
  1222. desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
  1223. desc->ramp_delay = 2500;
  1224. /* Read the smps mode for later use. */
  1225. addr = rinfo->ctrl_addr;
  1226. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1227. if (ret)
  1228. return ret;
  1229. pmic->current_reg_mode[id] = reg &
  1230. PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1231. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1232. rinfo->ctrl_addr);
  1233. desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1234. /* set_mode overrides this value */
  1235. desc->enable_val = SMPS_CTRL_MODE_ON;
  1236. desc->type = REGULATOR_VOLTAGE;
  1237. desc->owner = THIS_MODULE;
  1238. if (pdata)
  1239. config.init_data = pdata->reg_data[id];
  1240. else
  1241. config.init_data = NULL;
  1242. desc->supply_name = rinfo->sname;
  1243. config.of_node = ddata->palmas_matches[id].of_node;
  1244. rdev = devm_regulator_register(pmic->dev, desc, &config);
  1245. if (IS_ERR(rdev)) {
  1246. dev_err(pmic->dev,
  1247. "failed to register %s regulator\n",
  1248. pdev_name);
  1249. return PTR_ERR(rdev);
  1250. }
  1251. /* Save regulator for cleanup */
  1252. pmic->rdev[id] = rdev;
  1253. }
  1254. return 0;
  1255. }
  1256. static struct of_regulator_match palmas_matches[] = {
  1257. { .name = "smps12", },
  1258. { .name = "smps123", },
  1259. { .name = "smps3", },
  1260. { .name = "smps45", },
  1261. { .name = "smps457", },
  1262. { .name = "smps6", },
  1263. { .name = "smps7", },
  1264. { .name = "smps8", },
  1265. { .name = "smps9", },
  1266. { .name = "smps10_out2", },
  1267. { .name = "smps10_out1", },
  1268. { .name = "ldo1", },
  1269. { .name = "ldo2", },
  1270. { .name = "ldo3", },
  1271. { .name = "ldo4", },
  1272. { .name = "ldo5", },
  1273. { .name = "ldo6", },
  1274. { .name = "ldo7", },
  1275. { .name = "ldo8", },
  1276. { .name = "ldo9", },
  1277. { .name = "ldoln", },
  1278. { .name = "ldousb", },
  1279. { .name = "regen1", },
  1280. { .name = "regen2", },
  1281. { .name = "regen3", },
  1282. { .name = "sysen1", },
  1283. { .name = "sysen2", },
  1284. };
  1285. static struct of_regulator_match tps65917_matches[] = {
  1286. { .name = "smps1", },
  1287. { .name = "smps2", },
  1288. { .name = "smps3", },
  1289. { .name = "smps4", },
  1290. { .name = "smps5", },
  1291. { .name = "smps12",},
  1292. { .name = "ldo1", },
  1293. { .name = "ldo2", },
  1294. { .name = "ldo3", },
  1295. { .name = "ldo4", },
  1296. { .name = "ldo5", },
  1297. { .name = "regen1", },
  1298. { .name = "regen2", },
  1299. { .name = "regen3", },
  1300. { .name = "sysen1", },
  1301. { .name = "sysen2", },
  1302. };
  1303. static struct palmas_pmic_driver_data palmas_ddata = {
  1304. .smps_start = PALMAS_REG_SMPS12,
  1305. .smps_end = PALMAS_REG_SMPS10_OUT1,
  1306. .ldo_begin = PALMAS_REG_LDO1,
  1307. .ldo_end = PALMAS_REG_LDOUSB,
  1308. .max_reg = PALMAS_NUM_REGS,
  1309. .has_regen3 = true,
  1310. .palmas_regs_info = palmas_generic_regs_info,
  1311. .palmas_matches = palmas_matches,
  1312. .sleep_req_info = palma_sleep_req_info,
  1313. .smps_register = palmas_smps_registration,
  1314. .ldo_register = palmas_ldo_registration,
  1315. };
  1316. static struct palmas_pmic_driver_data tps65917_ddata = {
  1317. .smps_start = TPS65917_REG_SMPS1,
  1318. .smps_end = TPS65917_REG_SMPS12,
  1319. .ldo_begin = TPS65917_REG_LDO1,
  1320. .ldo_end = TPS65917_REG_LDO5,
  1321. .max_reg = TPS65917_NUM_REGS,
  1322. .has_regen3 = true,
  1323. .palmas_regs_info = tps65917_regs_info,
  1324. .palmas_matches = tps65917_matches,
  1325. .sleep_req_info = tps65917_sleep_req_info,
  1326. .smps_register = tps65917_smps_registration,
  1327. .ldo_register = tps65917_ldo_registration,
  1328. };
  1329. static int palmas_dt_to_pdata(struct device *dev,
  1330. struct device_node *node,
  1331. struct palmas_pmic_platform_data *pdata,
  1332. struct palmas_pmic_driver_data *ddata)
  1333. {
  1334. struct device_node *regulators;
  1335. u32 prop;
  1336. int idx, ret;
  1337. regulators = of_get_child_by_name(node, "regulators");
  1338. if (!regulators) {
  1339. dev_info(dev, "regulator node not found\n");
  1340. return 0;
  1341. }
  1342. ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
  1343. ddata->max_reg);
  1344. of_node_put(regulators);
  1345. if (ret < 0) {
  1346. dev_err(dev, "Error parsing regulator init data: %d\n", ret);
  1347. return 0;
  1348. }
  1349. for (idx = 0; idx < ddata->max_reg; idx++) {
  1350. struct of_regulator_match *match;
  1351. struct palmas_reg_init *rinit;
  1352. struct device_node *np;
  1353. match = &ddata->palmas_matches[idx];
  1354. np = match->of_node;
  1355. if (!match->init_data || !np)
  1356. continue;
  1357. rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
  1358. if (!rinit)
  1359. return -ENOMEM;
  1360. pdata->reg_data[idx] = match->init_data;
  1361. pdata->reg_init[idx] = rinit;
  1362. rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
  1363. ret = of_property_read_u32(np, "ti,roof-floor", &prop);
  1364. /* EINVAL: Property not found */
  1365. if (ret != -EINVAL) {
  1366. int econtrol;
  1367. /* use default value, when no value is specified */
  1368. econtrol = PALMAS_EXT_CONTROL_NSLEEP;
  1369. if (!ret) {
  1370. switch (prop) {
  1371. case 1:
  1372. econtrol = PALMAS_EXT_CONTROL_ENABLE1;
  1373. break;
  1374. case 2:
  1375. econtrol = PALMAS_EXT_CONTROL_ENABLE2;
  1376. break;
  1377. case 3:
  1378. econtrol = PALMAS_EXT_CONTROL_NSLEEP;
  1379. break;
  1380. default:
  1381. WARN_ON(1);
  1382. dev_warn(dev,
  1383. "%s: Invalid roof-floor option: %u\n",
  1384. match->name, prop);
  1385. break;
  1386. }
  1387. }
  1388. rinit->roof_floor = econtrol;
  1389. }
  1390. ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
  1391. if (!ret)
  1392. rinit->mode_sleep = prop;
  1393. ret = of_property_read_bool(np, "ti,smps-range");
  1394. if (ret)
  1395. rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
  1396. if (idx == PALMAS_REG_LDO8)
  1397. pdata->enable_ldo8_tracking = of_property_read_bool(
  1398. np, "ti,enable-ldo8-tracking");
  1399. }
  1400. pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
  1401. return 0;
  1402. }
  1403. static const struct of_device_id of_palmas_match_tbl[] = {
  1404. {
  1405. .compatible = "ti,palmas-pmic",
  1406. .data = &palmas_ddata,
  1407. },
  1408. {
  1409. .compatible = "ti,twl6035-pmic",
  1410. .data = &palmas_ddata,
  1411. },
  1412. {
  1413. .compatible = "ti,twl6036-pmic",
  1414. .data = &palmas_ddata,
  1415. },
  1416. {
  1417. .compatible = "ti,twl6037-pmic",
  1418. .data = &palmas_ddata,
  1419. },
  1420. {
  1421. .compatible = "ti,tps65913-pmic",
  1422. .data = &palmas_ddata,
  1423. },
  1424. {
  1425. .compatible = "ti,tps65914-pmic",
  1426. .data = &palmas_ddata,
  1427. },
  1428. {
  1429. .compatible = "ti,tps80036-pmic",
  1430. .data = &palmas_ddata,
  1431. },
  1432. {
  1433. .compatible = "ti,tps659038-pmic",
  1434. .data = &palmas_ddata,
  1435. },
  1436. {
  1437. .compatible = "ti,tps65917-pmic",
  1438. .data = &tps65917_ddata,
  1439. },
  1440. { /* end */ }
  1441. };
  1442. static int palmas_regulators_probe(struct platform_device *pdev)
  1443. {
  1444. struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
  1445. struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
  1446. struct device_node *node = pdev->dev.of_node;
  1447. struct palmas_pmic_driver_data *driver_data;
  1448. struct regulator_config config = { };
  1449. struct palmas_pmic *pmic;
  1450. const char *pdev_name;
  1451. const struct of_device_id *match;
  1452. int ret = 0;
  1453. unsigned int reg;
  1454. match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
  1455. if (!match)
  1456. return -ENODATA;
  1457. driver_data = (struct palmas_pmic_driver_data *)match->data;
  1458. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  1459. if (!pdata)
  1460. return -ENOMEM;
  1461. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  1462. if (!pmic)
  1463. return -ENOMEM;
  1464. if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
  1465. palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
  1466. TPS659038_REGEN2_CTRL;
  1467. palmas_ddata.has_regen3 = false;
  1468. }
  1469. pmic->dev = &pdev->dev;
  1470. pmic->palmas = palmas;
  1471. palmas->pmic = pmic;
  1472. platform_set_drvdata(pdev, pmic);
  1473. pmic->palmas->pmic_ddata = driver_data;
  1474. ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
  1475. if (ret)
  1476. return ret;
  1477. ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
  1478. if (ret)
  1479. return ret;
  1480. if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) {
  1481. pmic->smps123 = 1;
  1482. pmic->smps12 = 1;
  1483. }
  1484. if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
  1485. pmic->smps457 = 1;
  1486. config.regmap = palmas->regmap[REGULATOR_SLAVE];
  1487. config.dev = &pdev->dev;
  1488. config.driver_data = pmic;
  1489. pdev_name = pdev->name;
  1490. ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
  1491. config);
  1492. if (ret)
  1493. return ret;
  1494. ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
  1495. config);
  1496. return ret;
  1497. }
  1498. static struct platform_driver palmas_driver = {
  1499. .driver = {
  1500. .name = "palmas-pmic",
  1501. .of_match_table = of_palmas_match_tbl,
  1502. },
  1503. .probe = palmas_regulators_probe,
  1504. };
  1505. static int __init palmas_init(void)
  1506. {
  1507. return platform_driver_register(&palmas_driver);
  1508. }
  1509. subsys_initcall(palmas_init);
  1510. static void __exit palmas_exit(void)
  1511. {
  1512. platform_driver_unregister(&palmas_driver);
  1513. }
  1514. module_exit(palmas_exit);
  1515. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1516. MODULE_DESCRIPTION("Palmas voltage regulator driver");
  1517. MODULE_LICENSE("GPL");
  1518. MODULE_ALIAS("platform:palmas-pmic");
  1519. MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);