pinctrl-sun9i-a80-r.c 6.2 KB

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  1. /*
  2. * Allwinner A80 SoCs special pins pinctrl driver.
  3. *
  4. * Copyright (C) 2014 Maxime Ripard
  5. * Maxime Ripard <maxime.ripard@free-electrons.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/of.h>
  14. #include <linux/of_device.h>
  15. #include <linux/pinctrl/pinctrl.h>
  16. #include <linux/reset.h>
  17. #include "pinctrl-sunxi.h"
  18. static const struct sunxi_desc_pin sun9i_a80_r_pins[] = {
  19. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
  20. SUNXI_FUNCTION(0x0, "gpio_in"),
  21. SUNXI_FUNCTION(0x1, "gpio_out"),
  22. SUNXI_FUNCTION(0x3, "s_uart"), /* TX */
  23. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PL_EINT0 */
  24. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
  25. SUNXI_FUNCTION(0x0, "gpio_in"),
  26. SUNXI_FUNCTION(0x1, "gpio_out"),
  27. SUNXI_FUNCTION(0x3, "s_uart"), /* RX */
  28. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PL_EINT1 */
  29. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
  30. SUNXI_FUNCTION(0x0, "gpio_in"),
  31. SUNXI_FUNCTION(0x1, "gpio_out"),
  32. SUNXI_FUNCTION(0x3, "s_jtag"), /* TMS */
  33. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PL_EINT2 */
  34. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
  35. SUNXI_FUNCTION(0x0, "gpio_in"),
  36. SUNXI_FUNCTION(0x1, "gpio_out"),
  37. SUNXI_FUNCTION(0x3, "s_jtag"), /* TCK */
  38. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PL_EINT3 */
  39. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
  40. SUNXI_FUNCTION(0x0, "gpio_in"),
  41. SUNXI_FUNCTION(0x1, "gpio_out"),
  42. SUNXI_FUNCTION(0x3, "s_jtag"), /* TDO */
  43. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PL_EINT4 */
  44. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
  45. SUNXI_FUNCTION(0x0, "gpio_in"),
  46. SUNXI_FUNCTION(0x1, "gpio_out"),
  47. SUNXI_FUNCTION(0x3, "s_jtag"), /* TDI */
  48. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PL_EINT5 */
  49. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
  50. SUNXI_FUNCTION(0x0, "gpio_in"),
  51. SUNXI_FUNCTION(0x1, "gpio_out"),
  52. SUNXI_FUNCTION(0x3, "s_cir_rx"),
  53. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PL_EINT6 */
  54. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
  55. SUNXI_FUNCTION(0x0, "gpio_in"),
  56. SUNXI_FUNCTION(0x1, "gpio_out"),
  57. SUNXI_FUNCTION(0x3, "1wire"),
  58. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PL_EINT7 */
  59. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
  60. SUNXI_FUNCTION(0x0, "gpio_in"),
  61. SUNXI_FUNCTION(0x1, "gpio_out"),
  62. SUNXI_FUNCTION(0x2, "s_ps2"), /* SCK1 */
  63. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PL_EINT8 */
  64. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
  65. SUNXI_FUNCTION(0x0, "gpio_in"),
  66. SUNXI_FUNCTION(0x1, "gpio_out"),
  67. SUNXI_FUNCTION(0x2, "s_ps2"), /* SDA1 */
  68. SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PL_EINT9 */
  69. /* Hole */
  70. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
  71. SUNXI_FUNCTION(0x0, "gpio_in"),
  72. SUNXI_FUNCTION(0x1, "gpio_out"),
  73. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PM_EINT0 */
  74. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
  75. SUNXI_FUNCTION(0x0, "gpio_in"),
  76. SUNXI_FUNCTION(0x1, "gpio_out"),
  77. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PM_EINT1 */
  78. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
  79. SUNXI_FUNCTION(0x0, "gpio_in"),
  80. SUNXI_FUNCTION(0x1, "gpio_out"),
  81. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PM_EINT2 */
  82. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
  83. SUNXI_FUNCTION(0x0, "gpio_in"),
  84. SUNXI_FUNCTION(0x1, "gpio_out"),
  85. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PM_EINT3 */
  86. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
  87. SUNXI_FUNCTION(0x0, "gpio_in"),
  88. SUNXI_FUNCTION(0x1, "gpio_out"),
  89. SUNXI_FUNCTION(0x3, "s_i2s1"), /* LRCKR */
  90. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PM_EINT4 */
  91. /* Hole */
  92. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 8),
  93. SUNXI_FUNCTION(0x0, "gpio_in"),
  94. SUNXI_FUNCTION(0x1, "gpio_out"),
  95. SUNXI_FUNCTION(0x3, "s_i2c1"), /* SCK */
  96. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* PM_EINT8 */
  97. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 9),
  98. SUNXI_FUNCTION(0x0, "gpio_in"),
  99. SUNXI_FUNCTION(0x1, "gpio_out"),
  100. SUNXI_FUNCTION(0x3, "s_i2c1"), /* SDA */
  101. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* PM_EINT9 */
  102. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 10),
  103. SUNXI_FUNCTION(0x0, "gpio_in"),
  104. SUNXI_FUNCTION(0x1, "gpio_out"),
  105. SUNXI_FUNCTION(0x2, "s_i2s0"), /* MCLK */
  106. SUNXI_FUNCTION(0x3, "s_i2s1")), /* MCLK */
  107. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 11),
  108. SUNXI_FUNCTION(0x0, "gpio_in"),
  109. SUNXI_FUNCTION(0x1, "gpio_out"),
  110. SUNXI_FUNCTION(0x2, "s_i2s0"), /* BCLK */
  111. SUNXI_FUNCTION(0x3, "s_i2s1")), /* BCLK */
  112. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 12),
  113. SUNXI_FUNCTION(0x0, "gpio_in"),
  114. SUNXI_FUNCTION(0x1, "gpio_out"),
  115. SUNXI_FUNCTION(0x2, "s_i2s0"), /* LRCK */
  116. SUNXI_FUNCTION(0x3, "s_i2s1")), /* LRCK */
  117. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 13),
  118. SUNXI_FUNCTION(0x0, "gpio_in"),
  119. SUNXI_FUNCTION(0x1, "gpio_out"),
  120. SUNXI_FUNCTION(0x2, "s_i2s0"), /* DIN */
  121. SUNXI_FUNCTION(0x3, "s_i2s1")), /* DIN */
  122. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 14),
  123. SUNXI_FUNCTION(0x0, "gpio_in"),
  124. SUNXI_FUNCTION(0x1, "gpio_out"),
  125. SUNXI_FUNCTION(0x2, "s_i2s0"), /* DOUT */
  126. SUNXI_FUNCTION(0x3, "s_i2s1")), /* DOUT */
  127. SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 15),
  128. SUNXI_FUNCTION(0x0, "gpio_in"),
  129. SUNXI_FUNCTION(0x1, "gpio_out"),
  130. SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 15)), /* PM_EINT15 */
  131. /* Hole */
  132. SUNXI_PIN(SUNXI_PINCTRL_PIN(N, 0),
  133. SUNXI_FUNCTION(0x0, "gpio_in"),
  134. SUNXI_FUNCTION(0x1, "gpio_out"),
  135. SUNXI_FUNCTION(0x2, "s_i2c0"), /* SCK */
  136. SUNXI_FUNCTION(0x3, "s_rsb")), /* SCK */
  137. SUNXI_PIN(SUNXI_PINCTRL_PIN(N, 1),
  138. SUNXI_FUNCTION(0x0, "gpio_in"),
  139. SUNXI_FUNCTION(0x1, "gpio_out"),
  140. SUNXI_FUNCTION(0x2, "s_i2c0"), /* SDA */
  141. SUNXI_FUNCTION(0x3, "s_rsb")), /* SDA */
  142. };
  143. static const struct sunxi_pinctrl_desc sun9i_a80_r_pinctrl_data = {
  144. .pins = sun9i_a80_r_pins,
  145. .npins = ARRAY_SIZE(sun9i_a80_r_pins),
  146. .pin_base = PL_BASE,
  147. .irq_banks = 2,
  148. };
  149. static int sun9i_a80_r_pinctrl_probe(struct platform_device *pdev)
  150. {
  151. return sunxi_pinctrl_init(pdev,
  152. &sun9i_a80_r_pinctrl_data);
  153. }
  154. static const struct of_device_id sun9i_a80_r_pinctrl_match[] = {
  155. { .compatible = "allwinner,sun9i-a80-r-pinctrl", },
  156. {}
  157. };
  158. static struct platform_driver sun9i_a80_r_pinctrl_driver = {
  159. .probe = sun9i_a80_r_pinctrl_probe,
  160. .driver = {
  161. .name = "sun9i-a80-r-pinctrl",
  162. .owner = THIS_MODULE,
  163. .of_match_table = sun9i_a80_r_pinctrl_match,
  164. },
  165. };
  166. builtin_platform_driver(sun9i_a80_r_pinctrl_driver);