pinctrl-sun8i-a23-r.c 4.2 KB

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  1. /*
  2. * Allwinner A23 SoCs special pins pinctrl driver.
  3. *
  4. * Copyright (C) 2014 Chen-Yu Tsai
  5. * Chen-Yu Tsai <wens@csie.org>
  6. *
  7. * Copyright (C) 2014 Boris Brezillon
  8. * Boris Brezillon <boris.brezillon@free-electrons.com>
  9. *
  10. * Copyright (C) 2014 Maxime Ripard
  11. * Maxime Ripard <maxime.ripard@free-electrons.com>
  12. *
  13. * This file is licensed under the terms of the GNU General Public
  14. * License version 2. This program is licensed "as is" without any
  15. * warranty of any kind, whether express or implied.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/of.h>
  20. #include <linux/of_device.h>
  21. #include <linux/pinctrl/pinctrl.h>
  22. #include <linux/reset.h>
  23. #include "pinctrl-sunxi.h"
  24. static const struct sunxi_desc_pin sun8i_a23_r_pins[] = {
  25. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
  26. SUNXI_FUNCTION(0x0, "gpio_in"),
  27. SUNXI_FUNCTION(0x1, "gpio_out"),
  28. SUNXI_FUNCTION(0x2, "s_rsb"), /* SCK */
  29. SUNXI_FUNCTION(0x3, "s_i2c"), /* SCK */
  30. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 0)), /* PL_EINT0 */
  31. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
  32. SUNXI_FUNCTION(0x0, "gpio_in"),
  33. SUNXI_FUNCTION(0x1, "gpio_out"),
  34. SUNXI_FUNCTION(0x2, "s_rsb"), /* SDA */
  35. SUNXI_FUNCTION(0x3, "s_i2c"), /* SDA */
  36. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 1)), /* PL_EINT1 */
  37. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
  38. SUNXI_FUNCTION(0x0, "gpio_in"),
  39. SUNXI_FUNCTION(0x1, "gpio_out"),
  40. SUNXI_FUNCTION(0x2, "s_uart"), /* TX */
  41. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 2)), /* PL_EINT2 */
  42. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
  43. SUNXI_FUNCTION(0x0, "gpio_in"),
  44. SUNXI_FUNCTION(0x1, "gpio_out"),
  45. SUNXI_FUNCTION(0x2, "s_uart"), /* RX */
  46. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 3)), /* PL_EINT3 */
  47. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
  48. SUNXI_FUNCTION(0x0, "gpio_in"),
  49. SUNXI_FUNCTION(0x1, "gpio_out"),
  50. SUNXI_FUNCTION(0x3, "s_jtag"), /* MS */
  51. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 4)), /* PL_EINT4 */
  52. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
  53. SUNXI_FUNCTION(0x0, "gpio_in"),
  54. SUNXI_FUNCTION(0x1, "gpio_out"),
  55. SUNXI_FUNCTION(0x3, "s_jtag"), /* CK */
  56. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 5)), /* PL_EINT5 */
  57. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
  58. SUNXI_FUNCTION(0x0, "gpio_in"),
  59. SUNXI_FUNCTION(0x1, "gpio_out"),
  60. SUNXI_FUNCTION(0x3, "s_jtag"), /* DO */
  61. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 6)), /* PL_EINT6 */
  62. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
  63. SUNXI_FUNCTION(0x0, "gpio_in"),
  64. SUNXI_FUNCTION(0x1, "gpio_out"),
  65. SUNXI_FUNCTION(0x3, "s_jtag"), /* DI */
  66. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 7)), /* PL_EINT7 */
  67. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
  68. SUNXI_FUNCTION(0x0, "gpio_in"),
  69. SUNXI_FUNCTION(0x1, "gpio_out"),
  70. SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */
  71. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 8)), /* PL_EINT8 */
  72. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 9),
  73. SUNXI_FUNCTION(0x0, "gpio_in"),
  74. SUNXI_FUNCTION(0x1, "gpio_out"),
  75. SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */
  76. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 9)), /* PL_EINT9 */
  77. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 10),
  78. SUNXI_FUNCTION(0x0, "gpio_in"),
  79. SUNXI_FUNCTION(0x1, "gpio_out"),
  80. SUNXI_FUNCTION(0x2, "s_pwm"),
  81. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 10)), /* PL_EINT10 */
  82. SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 11),
  83. SUNXI_FUNCTION(0x0, "gpio_in"),
  84. SUNXI_FUNCTION(0x1, "gpio_out"),
  85. SUNXI_FUNCTION_IRQ_BANK(0x4, 0, 11)), /* PL_EINT11 */
  86. };
  87. static const struct sunxi_pinctrl_desc sun8i_a23_r_pinctrl_data = {
  88. .pins = sun8i_a23_r_pins,
  89. .npins = ARRAY_SIZE(sun8i_a23_r_pins),
  90. .pin_base = PL_BASE,
  91. .irq_banks = 1,
  92. };
  93. static int sun8i_a23_r_pinctrl_probe(struct platform_device *pdev)
  94. {
  95. struct reset_control *rstc;
  96. int ret;
  97. rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
  98. if (IS_ERR(rstc)) {
  99. dev_err(&pdev->dev, "Reset controller missing\n");
  100. return PTR_ERR(rstc);
  101. }
  102. ret = reset_control_deassert(rstc);
  103. if (ret)
  104. return ret;
  105. ret = sunxi_pinctrl_init(pdev,
  106. &sun8i_a23_r_pinctrl_data);
  107. if (ret)
  108. reset_control_assert(rstc);
  109. return ret;
  110. }
  111. static const struct of_device_id sun8i_a23_r_pinctrl_match[] = {
  112. { .compatible = "allwinner,sun8i-a23-r-pinctrl", },
  113. {}
  114. };
  115. static struct platform_driver sun8i_a23_r_pinctrl_driver = {
  116. .probe = sun8i_a23_r_pinctrl_probe,
  117. .driver = {
  118. .name = "sun8i-a23-r-pinctrl",
  119. .of_match_table = sun8i_a23_r_pinctrl_match,
  120. },
  121. };
  122. builtin_platform_driver(sun8i_a23_r_pinctrl_driver);