pinctrl-exynos.h 4.3 KB

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  1. /*
  2. * Exynos specific definitions for Samsung pinctrl and gpiolib driver.
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2012 Linaro Ltd
  7. * http://www.linaro.org
  8. *
  9. * This file contains the Exynos specific definitions for the Samsung
  10. * pinctrl/gpiolib interface drivers.
  11. *
  12. * Author: Thomas Abraham <thomas.ab@samsung.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. */
  19. #ifndef __PINCTRL_SAMSUNG_EXYNOS_H
  20. #define __PINCTRL_SAMSUNG_EXYNOS_H
  21. /* External GPIO and wakeup interrupt related definitions */
  22. #define EXYNOS_GPIO_ECON_OFFSET 0x700
  23. #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
  24. #define EXYNOS_GPIO_EMASK_OFFSET 0x900
  25. #define EXYNOS_GPIO_EPEND_OFFSET 0xA00
  26. #define EXYNOS_WKUP_ECON_OFFSET 0xE00
  27. #define EXYNOS_WKUP_EMASK_OFFSET 0xF00
  28. #define EXYNOS_WKUP_EPEND_OFFSET 0xF40
  29. #define EXYNOS7_WKUP_ECON_OFFSET 0x700
  30. #define EXYNOS7_WKUP_EMASK_OFFSET 0x900
  31. #define EXYNOS7_WKUP_EPEND_OFFSET 0xA00
  32. #define EXYNOS_SVC_OFFSET 0xB08
  33. /* helpers to access interrupt service register */
  34. #define EXYNOS_SVC_GROUP_SHIFT 3
  35. #define EXYNOS_SVC_GROUP_MASK 0x1f
  36. #define EXYNOS_SVC_NUM_MASK 7
  37. #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \
  38. EXYNOS_SVC_GROUP_MASK)
  39. /* Exynos specific external interrupt trigger types */
  40. #define EXYNOS_EINT_LEVEL_LOW 0
  41. #define EXYNOS_EINT_LEVEL_HIGH 1
  42. #define EXYNOS_EINT_EDGE_FALLING 2
  43. #define EXYNOS_EINT_EDGE_RISING 3
  44. #define EXYNOS_EINT_EDGE_BOTH 4
  45. #define EXYNOS_EINT_CON_MASK 0xF
  46. #define EXYNOS_EINT_CON_LEN 4
  47. #define EXYNOS_EINT_MAX_PER_BANK 8
  48. #define EXYNOS_EINT_NR_WKUP_EINT
  49. #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
  50. { \
  51. .type = &bank_type_off, \
  52. .pctl_offset = reg, \
  53. .nr_pins = pins, \
  54. .eint_type = EINT_TYPE_NONE, \
  55. .name = id \
  56. }
  57. #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
  58. { \
  59. .type = &bank_type_off, \
  60. .pctl_offset = reg, \
  61. .nr_pins = pins, \
  62. .eint_type = EINT_TYPE_GPIO, \
  63. .eint_offset = offs, \
  64. .name = id \
  65. }
  66. #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
  67. { \
  68. .type = &bank_type_alive, \
  69. .pctl_offset = reg, \
  70. .nr_pins = pins, \
  71. .eint_type = EINT_TYPE_WKUP, \
  72. .eint_offset = offs, \
  73. .name = id \
  74. }
  75. #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \
  76. { \
  77. .type = &exynos5433_bank_type_off, \
  78. .pctl_offset = reg, \
  79. .nr_pins = pins, \
  80. .eint_type = EINT_TYPE_GPIO, \
  81. .eint_offset = offs, \
  82. .name = id \
  83. }
  84. #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \
  85. { \
  86. .type = &exynos5433_bank_type_alive, \
  87. .pctl_offset = reg, \
  88. .nr_pins = pins, \
  89. .eint_type = EINT_TYPE_WKUP, \
  90. .eint_offset = offs, \
  91. .name = id \
  92. }
  93. #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
  94. { \
  95. .type = &exynos5433_bank_type_alive, \
  96. .pctl_offset = reg, \
  97. .nr_pins = pins, \
  98. .eint_type = EINT_TYPE_WKUP, \
  99. .eint_offset = offs, \
  100. .name = id, \
  101. .pctl_res_idx = pctl_idx, \
  102. } \
  103. /**
  104. * struct exynos_weint_data: irq specific data for all the wakeup interrupts
  105. * generated by the external wakeup interrupt controller.
  106. * @irq: interrupt number within the domain.
  107. * @bank: bank responsible for this interrupt
  108. */
  109. struct exynos_weint_data {
  110. unsigned int irq;
  111. struct samsung_pin_bank *bank;
  112. };
  113. /**
  114. * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
  115. * generated by the external wakeup interrupt controller.
  116. * @nr_banks: count of banks being part of the mux
  117. * @banks: array of banks being part of the mux
  118. */
  119. struct exynos_muxed_weint_data {
  120. unsigned int nr_banks;
  121. struct samsung_pin_bank *banks[];
  122. };
  123. int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d);
  124. int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d);
  125. void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata);
  126. void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata);
  127. struct samsung_retention_ctrl *
  128. exynos_retention_init(struct samsung_pinctrl_drv_data *drvdata,
  129. const struct samsung_retention_data *data);
  130. #endif /* __PINCTRL_SAMSUNG_EXYNOS_H */