pinctrl-meson.h 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179
  1. /*
  2. * Pin controller and GPIO driver for Amlogic Meson SoCs
  3. *
  4. * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * You should have received a copy of the GNU General Public License
  11. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  12. */
  13. #include <linux/gpio.h>
  14. #include <linux/pinctrl/pinctrl.h>
  15. #include <linux/regmap.h>
  16. #include <linux/types.h>
  17. /**
  18. * struct meson_pmx_group - a pinmux group
  19. *
  20. * @name: group name
  21. * @pins: pins in the group
  22. * @num_pins: number of pins in the group
  23. * @is_gpio: whether the group is a single GPIO group
  24. * @reg: register offset for the group in the domain mux registers
  25. * @bit bit index enabling the group
  26. * @domain: index of the domain this group belongs to
  27. */
  28. struct meson_pmx_group {
  29. const char *name;
  30. const unsigned int *pins;
  31. unsigned int num_pins;
  32. bool is_gpio;
  33. unsigned int reg;
  34. unsigned int bit;
  35. };
  36. /**
  37. * struct meson_pmx_func - a pinmux function
  38. *
  39. * @name: function name
  40. * @groups: groups in the function
  41. * @num_groups: number of groups in the function
  42. */
  43. struct meson_pmx_func {
  44. const char *name;
  45. const char * const *groups;
  46. unsigned int num_groups;
  47. };
  48. /**
  49. * struct meson_reg_desc - a register descriptor
  50. *
  51. * @reg: register offset in the regmap
  52. * @bit: bit index in register
  53. *
  54. * The structure describes the information needed to control pull,
  55. * pull-enable, direction, etc. for a single pin
  56. */
  57. struct meson_reg_desc {
  58. unsigned int reg;
  59. unsigned int bit;
  60. };
  61. /**
  62. * enum meson_reg_type - type of registers encoded in @meson_reg_desc
  63. */
  64. enum meson_reg_type {
  65. REG_PULLEN,
  66. REG_PULL,
  67. REG_DIR,
  68. REG_OUT,
  69. REG_IN,
  70. NUM_REG,
  71. };
  72. /**
  73. * struct meson bank
  74. *
  75. * @name: bank name
  76. * @first: first pin of the bank
  77. * @last: last pin of the bank
  78. * @irq: hwirq base number of the bank
  79. * @regs: array of register descriptors
  80. *
  81. * A bank represents a set of pins controlled by a contiguous set of
  82. * bits in the domain registers. The structure specifies which bits in
  83. * the regmap control the different functionalities. Each member of
  84. * the @regs array refers to the first pin of the bank.
  85. */
  86. struct meson_bank {
  87. const char *name;
  88. unsigned int first;
  89. unsigned int last;
  90. int irq_first;
  91. int irq_last;
  92. struct meson_reg_desc regs[NUM_REG];
  93. };
  94. struct meson_pinctrl_data {
  95. const char *name;
  96. const struct pinctrl_pin_desc *pins;
  97. struct meson_pmx_group *groups;
  98. struct meson_pmx_func *funcs;
  99. unsigned int pin_base;
  100. unsigned int num_pins;
  101. unsigned int num_groups;
  102. unsigned int num_funcs;
  103. struct meson_bank *banks;
  104. unsigned int num_banks;
  105. };
  106. struct meson_pinctrl {
  107. struct device *dev;
  108. struct pinctrl_dev *pcdev;
  109. struct pinctrl_desc desc;
  110. struct meson_pinctrl_data *data;
  111. struct regmap *reg_mux;
  112. struct regmap *reg_pullen;
  113. struct regmap *reg_pull;
  114. struct regmap *reg_gpio;
  115. struct gpio_chip chip;
  116. struct device_node *of_node;
  117. };
  118. #define PIN(x, b) (b + x)
  119. #define GROUP(grp, r, b) \
  120. { \
  121. .name = #grp, \
  122. .pins = grp ## _pins, \
  123. .num_pins = ARRAY_SIZE(grp ## _pins), \
  124. .reg = r, \
  125. .bit = b, \
  126. }
  127. #define GPIO_GROUP(gpio, b) \
  128. { \
  129. .name = #gpio, \
  130. .pins = (const unsigned int[]){ PIN(gpio, b) }, \
  131. .num_pins = 1, \
  132. .is_gpio = true, \
  133. }
  134. #define FUNCTION(fn) \
  135. { \
  136. .name = #fn, \
  137. .groups = fn ## _groups, \
  138. .num_groups = ARRAY_SIZE(fn ## _groups), \
  139. }
  140. #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
  141. { \
  142. .name = n, \
  143. .first = f, \
  144. .last = l, \
  145. .irq_first = fi, \
  146. .irq_last = li, \
  147. .regs = { \
  148. [REG_PULLEN] = { per, peb }, \
  149. [REG_PULL] = { pr, pb }, \
  150. [REG_DIR] = { dr, db }, \
  151. [REG_OUT] = { or, ob }, \
  152. [REG_IN] = { ir, ib }, \
  153. }, \
  154. }
  155. #define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)
  156. extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;
  157. extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;
  158. extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data;
  159. extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data;
  160. extern struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data;
  161. extern struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data;
  162. extern struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data;
  163. extern struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data;