phy-hi6220-usb.c 4.1 KB

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  1. /*
  2. * Copyright (c) 2015 Linaro Ltd.
  3. * Copyright (c) 2015 Hisilicon Limited.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. */
  10. #include <linux/mfd/syscon.h>
  11. #include <linux/module.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/phy/phy.h>
  14. #include <linux/regmap.h>
  15. #define SC_PERIPH_CTRL4 0x00c
  16. #define CTRL4_PICO_SIDDQ BIT(6)
  17. #define CTRL4_PICO_OGDISABLE BIT(8)
  18. #define CTRL4_PICO_VBUSVLDEXT BIT(10)
  19. #define CTRL4_PICO_VBUSVLDEXTSEL BIT(11)
  20. #define CTRL4_OTG_PHY_SEL BIT(21)
  21. #define SC_PERIPH_CTRL5 0x010
  22. #define CTRL5_USBOTG_RES_SEL BIT(3)
  23. #define CTRL5_PICOPHY_ACAENB BIT(4)
  24. #define CTRL5_PICOPHY_BC_MODE BIT(5)
  25. #define CTRL5_PICOPHY_CHRGSEL BIT(6)
  26. #define CTRL5_PICOPHY_VDATSRCEND BIT(7)
  27. #define CTRL5_PICOPHY_VDATDETENB BIT(8)
  28. #define CTRL5_PICOPHY_DCDENB BIT(9)
  29. #define CTRL5_PICOPHY_IDDIG BIT(10)
  30. #define SC_PERIPH_CTRL8 0x018
  31. #define SC_PERIPH_RSTEN0 0x300
  32. #define SC_PERIPH_RSTDIS0 0x304
  33. #define RST0_USBOTG_BUS BIT(4)
  34. #define RST0_POR_PICOPHY BIT(5)
  35. #define RST0_USBOTG BIT(6)
  36. #define RST0_USBOTG_32K BIT(7)
  37. #define EYE_PATTERN_PARA 0x7053348c
  38. struct hi6220_priv {
  39. struct regmap *reg;
  40. struct device *dev;
  41. };
  42. static void hi6220_phy_init(struct hi6220_priv *priv)
  43. {
  44. struct regmap *reg = priv->reg;
  45. u32 val, mask;
  46. val = RST0_USBOTG_BUS | RST0_POR_PICOPHY |
  47. RST0_USBOTG | RST0_USBOTG_32K;
  48. mask = val;
  49. regmap_update_bits(reg, SC_PERIPH_RSTEN0, mask, val);
  50. regmap_update_bits(reg, SC_PERIPH_RSTDIS0, mask, val);
  51. }
  52. static int hi6220_phy_setup(struct hi6220_priv *priv, bool on)
  53. {
  54. struct regmap *reg = priv->reg;
  55. u32 val, mask;
  56. int ret;
  57. if (on) {
  58. val = CTRL5_USBOTG_RES_SEL | CTRL5_PICOPHY_ACAENB;
  59. mask = val | CTRL5_PICOPHY_BC_MODE;
  60. ret = regmap_update_bits(reg, SC_PERIPH_CTRL5, mask, val);
  61. if (ret)
  62. goto out;
  63. val = CTRL4_PICO_VBUSVLDEXT | CTRL4_PICO_VBUSVLDEXTSEL |
  64. CTRL4_OTG_PHY_SEL;
  65. mask = val | CTRL4_PICO_SIDDQ | CTRL4_PICO_OGDISABLE;
  66. ret = regmap_update_bits(reg, SC_PERIPH_CTRL4, mask, val);
  67. if (ret)
  68. goto out;
  69. ret = regmap_write(reg, SC_PERIPH_CTRL8, EYE_PATTERN_PARA);
  70. if (ret)
  71. goto out;
  72. } else {
  73. val = CTRL4_PICO_SIDDQ;
  74. mask = val;
  75. ret = regmap_update_bits(reg, SC_PERIPH_CTRL4, mask, val);
  76. if (ret)
  77. goto out;
  78. }
  79. return 0;
  80. out:
  81. dev_err(priv->dev, "failed to setup phy ret: %d\n", ret);
  82. return ret;
  83. }
  84. static int hi6220_phy_start(struct phy *phy)
  85. {
  86. struct hi6220_priv *priv = phy_get_drvdata(phy);
  87. return hi6220_phy_setup(priv, true);
  88. }
  89. static int hi6220_phy_exit(struct phy *phy)
  90. {
  91. struct hi6220_priv *priv = phy_get_drvdata(phy);
  92. return hi6220_phy_setup(priv, false);
  93. }
  94. static const struct phy_ops hi6220_phy_ops = {
  95. .init = hi6220_phy_start,
  96. .exit = hi6220_phy_exit,
  97. .owner = THIS_MODULE,
  98. };
  99. static int hi6220_phy_probe(struct platform_device *pdev)
  100. {
  101. struct phy_provider *phy_provider;
  102. struct device *dev = &pdev->dev;
  103. struct phy *phy;
  104. struct hi6220_priv *priv;
  105. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  106. if (!priv)
  107. return -ENOMEM;
  108. priv->dev = dev;
  109. priv->reg = syscon_regmap_lookup_by_phandle(dev->of_node,
  110. "hisilicon,peripheral-syscon");
  111. if (IS_ERR(priv->reg)) {
  112. dev_err(dev, "no hisilicon,peripheral-syscon\n");
  113. return PTR_ERR(priv->reg);
  114. }
  115. hi6220_phy_init(priv);
  116. phy = devm_phy_create(dev, NULL, &hi6220_phy_ops);
  117. if (IS_ERR(phy))
  118. return PTR_ERR(phy);
  119. phy_set_drvdata(phy, priv);
  120. phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
  121. return PTR_ERR_OR_ZERO(phy_provider);
  122. }
  123. static const struct of_device_id hi6220_phy_of_match[] = {
  124. {.compatible = "hisilicon,hi6220-usb-phy",},
  125. { },
  126. };
  127. MODULE_DEVICE_TABLE(of, hi6220_phy_of_match);
  128. static struct platform_driver hi6220_phy_driver = {
  129. .probe = hi6220_phy_probe,
  130. .driver = {
  131. .name = "hi6220-usb-phy",
  132. .of_match_table = hi6220_phy_of_match,
  133. }
  134. };
  135. module_platform_driver(hi6220_phy_driver);
  136. MODULE_DESCRIPTION("HISILICON HI6220 USB PHY driver");
  137. MODULE_ALIAS("platform:hi6220-usb-phy");
  138. MODULE_LICENSE("GPL");