iov.c 18 KB

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  1. /*
  2. * drivers/pci/iov.c
  3. *
  4. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  5. *
  6. * PCI Express I/O Virtualization (IOV) support.
  7. * Single Root IOV 1.0
  8. * Address Translation Service 1.0
  9. */
  10. #include <linux/pci.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/delay.h>
  16. #include <linux/pci-ats.h>
  17. #include "pci.h"
  18. #define VIRTFN_ID_LEN 16
  19. int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
  20. {
  21. if (!dev->is_physfn)
  22. return -EINVAL;
  23. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  24. dev->sriov->stride * vf_id) >> 8);
  25. }
  26. int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
  27. {
  28. if (!dev->is_physfn)
  29. return -EINVAL;
  30. return (dev->devfn + dev->sriov->offset +
  31. dev->sriov->stride * vf_id) & 0xff;
  32. }
  33. /*
  34. * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
  35. * change when NumVFs changes.
  36. *
  37. * Update iov->offset and iov->stride when NumVFs is written.
  38. */
  39. static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
  40. {
  41. struct pci_sriov *iov = dev->sriov;
  42. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  43. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  44. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  45. }
  46. /*
  47. * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
  48. * determine how many additional bus numbers will be consumed by VFs.
  49. *
  50. * Iterate over all valid NumVFs, validate offset and stride, and calculate
  51. * the maximum number of bus numbers that could ever be required.
  52. */
  53. static int compute_max_vf_buses(struct pci_dev *dev)
  54. {
  55. struct pci_sriov *iov = dev->sriov;
  56. int nr_virtfn, busnr, rc = 0;
  57. for (nr_virtfn = iov->total_VFs; nr_virtfn; nr_virtfn--) {
  58. pci_iov_set_numvfs(dev, nr_virtfn);
  59. if (!iov->offset || (nr_virtfn > 1 && !iov->stride)) {
  60. rc = -EIO;
  61. goto out;
  62. }
  63. busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  64. if (busnr > iov->max_VF_buses)
  65. iov->max_VF_buses = busnr;
  66. }
  67. out:
  68. pci_iov_set_numvfs(dev, 0);
  69. return rc;
  70. }
  71. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  72. {
  73. struct pci_bus *child;
  74. if (bus->number == busnr)
  75. return bus;
  76. child = pci_find_bus(pci_domain_nr(bus), busnr);
  77. if (child)
  78. return child;
  79. child = pci_add_new_bus(bus, NULL, busnr);
  80. if (!child)
  81. return NULL;
  82. pci_bus_insert_busn_res(child, busnr, busnr);
  83. return child;
  84. }
  85. static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
  86. {
  87. if (physbus != virtbus && list_empty(&virtbus->devices))
  88. pci_remove_bus(virtbus);
  89. }
  90. resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
  91. {
  92. if (!dev->is_physfn)
  93. return 0;
  94. return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
  95. }
  96. int pci_iov_add_virtfn(struct pci_dev *dev, int id, int reset)
  97. {
  98. int i;
  99. int rc = -ENOMEM;
  100. u64 size;
  101. char buf[VIRTFN_ID_LEN];
  102. struct pci_dev *virtfn;
  103. struct resource *res;
  104. struct pci_sriov *iov = dev->sriov;
  105. struct pci_bus *bus;
  106. bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
  107. if (!bus)
  108. goto failed;
  109. virtfn = pci_alloc_dev(bus);
  110. if (!virtfn)
  111. goto failed0;
  112. virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
  113. virtfn->vendor = dev->vendor;
  114. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
  115. rc = pci_setup_device(virtfn);
  116. if (rc)
  117. goto failed0;
  118. virtfn->dev.parent = dev->dev.parent;
  119. virtfn->physfn = pci_dev_get(dev);
  120. virtfn->is_virtfn = 1;
  121. virtfn->multifunction = 0;
  122. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  123. res = &dev->resource[i + PCI_IOV_RESOURCES];
  124. if (!res->parent)
  125. continue;
  126. virtfn->resource[i].name = pci_name(virtfn);
  127. virtfn->resource[i].flags = res->flags;
  128. size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
  129. virtfn->resource[i].start = res->start + size * id;
  130. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  131. rc = request_resource(res, &virtfn->resource[i]);
  132. BUG_ON(rc);
  133. }
  134. if (reset)
  135. __pci_reset_function(virtfn);
  136. pci_device_add(virtfn, virtfn->bus);
  137. sprintf(buf, "virtfn%u", id);
  138. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  139. if (rc)
  140. goto failed1;
  141. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  142. if (rc)
  143. goto failed2;
  144. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  145. pci_bus_add_device(virtfn);
  146. return 0;
  147. failed2:
  148. sysfs_remove_link(&dev->dev.kobj, buf);
  149. failed1:
  150. pci_stop_and_remove_bus_device(virtfn);
  151. pci_dev_put(dev);
  152. pci_stop_and_remove_bus_device(virtfn);
  153. failed0:
  154. virtfn_remove_bus(dev->bus, bus);
  155. failed:
  156. return rc;
  157. }
  158. void pci_iov_remove_virtfn(struct pci_dev *dev, int id, int reset)
  159. {
  160. char buf[VIRTFN_ID_LEN];
  161. struct pci_dev *virtfn;
  162. virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
  163. pci_iov_virtfn_bus(dev, id),
  164. pci_iov_virtfn_devfn(dev, id));
  165. if (!virtfn)
  166. return;
  167. if (reset) {
  168. device_release_driver(&virtfn->dev);
  169. __pci_reset_function(virtfn);
  170. }
  171. sprintf(buf, "virtfn%u", id);
  172. sysfs_remove_link(&dev->dev.kobj, buf);
  173. /*
  174. * pci_stop_dev() could have been called for this virtfn already,
  175. * so the directory for the virtfn may have been removed before.
  176. * Double check to avoid spurious sysfs warnings.
  177. */
  178. if (virtfn->dev.kobj.sd)
  179. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  180. pci_stop_and_remove_bus_device(virtfn);
  181. virtfn_remove_bus(dev->bus, virtfn->bus);
  182. /* balance pci_get_domain_bus_and_slot() */
  183. pci_dev_put(virtfn);
  184. pci_dev_put(dev);
  185. }
  186. int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
  187. {
  188. return 0;
  189. }
  190. int __weak pcibios_sriov_disable(struct pci_dev *pdev)
  191. {
  192. return 0;
  193. }
  194. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  195. {
  196. int rc;
  197. int i;
  198. int nres;
  199. u16 initial;
  200. struct resource *res;
  201. struct pci_dev *pdev;
  202. struct pci_sriov *iov = dev->sriov;
  203. int bars = 0;
  204. int bus;
  205. if (!nr_virtfn)
  206. return 0;
  207. if (iov->num_VFs)
  208. return -EINVAL;
  209. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  210. if (initial > iov->total_VFs ||
  211. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
  212. return -EIO;
  213. if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
  214. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  215. return -EINVAL;
  216. nres = 0;
  217. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  218. bars |= (1 << (i + PCI_IOV_RESOURCES));
  219. res = &dev->resource[i + PCI_IOV_RESOURCES];
  220. if (res->parent)
  221. nres++;
  222. }
  223. if (nres != iov->nres) {
  224. dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
  225. return -ENOMEM;
  226. }
  227. bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  228. if (bus > dev->bus->busn_res.end) {
  229. dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
  230. nr_virtfn, bus, &dev->bus->busn_res);
  231. return -ENOMEM;
  232. }
  233. if (pci_enable_resources(dev, bars)) {
  234. dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
  235. return -ENOMEM;
  236. }
  237. if (iov->link != dev->devfn) {
  238. pdev = pci_get_slot(dev->bus, iov->link);
  239. if (!pdev)
  240. return -ENODEV;
  241. if (!pdev->is_physfn) {
  242. pci_dev_put(pdev);
  243. return -ENOSYS;
  244. }
  245. rc = sysfs_create_link(&dev->dev.kobj,
  246. &pdev->dev.kobj, "dep_link");
  247. pci_dev_put(pdev);
  248. if (rc)
  249. return rc;
  250. }
  251. iov->initial_VFs = initial;
  252. if (nr_virtfn < initial)
  253. initial = nr_virtfn;
  254. rc = pcibios_sriov_enable(dev, initial);
  255. if (rc) {
  256. dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", rc);
  257. goto err_pcibios;
  258. }
  259. pci_iov_set_numvfs(dev, nr_virtfn);
  260. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  261. pci_cfg_access_lock(dev);
  262. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  263. msleep(100);
  264. pci_cfg_access_unlock(dev);
  265. for (i = 0; i < initial; i++) {
  266. rc = pci_iov_add_virtfn(dev, i, 0);
  267. if (rc)
  268. goto failed;
  269. }
  270. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  271. iov->num_VFs = nr_virtfn;
  272. return 0;
  273. failed:
  274. while (i--)
  275. pci_iov_remove_virtfn(dev, i, 0);
  276. err_pcibios:
  277. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  278. pci_cfg_access_lock(dev);
  279. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  280. ssleep(1);
  281. pci_cfg_access_unlock(dev);
  282. pcibios_sriov_disable(dev);
  283. if (iov->link != dev->devfn)
  284. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  285. pci_iov_set_numvfs(dev, 0);
  286. return rc;
  287. }
  288. static void sriov_disable(struct pci_dev *dev)
  289. {
  290. int i;
  291. struct pci_sriov *iov = dev->sriov;
  292. if (!iov->num_VFs)
  293. return;
  294. for (i = 0; i < iov->num_VFs; i++)
  295. pci_iov_remove_virtfn(dev, i, 0);
  296. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  297. pci_cfg_access_lock(dev);
  298. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  299. ssleep(1);
  300. pci_cfg_access_unlock(dev);
  301. pcibios_sriov_disable(dev);
  302. if (iov->link != dev->devfn)
  303. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  304. iov->num_VFs = 0;
  305. pci_iov_set_numvfs(dev, 0);
  306. }
  307. static int sriov_init(struct pci_dev *dev, int pos)
  308. {
  309. int i, bar64;
  310. int rc;
  311. int nres;
  312. u32 pgsz;
  313. u16 ctrl, total;
  314. struct pci_sriov *iov;
  315. struct resource *res;
  316. struct pci_dev *pdev;
  317. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  318. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  319. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  320. ssleep(1);
  321. }
  322. ctrl = 0;
  323. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  324. if (pdev->is_physfn)
  325. goto found;
  326. pdev = NULL;
  327. if (pci_ari_enabled(dev->bus))
  328. ctrl |= PCI_SRIOV_CTRL_ARI;
  329. found:
  330. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  331. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  332. if (!total)
  333. return 0;
  334. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  335. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  336. pgsz &= ~((1 << i) - 1);
  337. if (!pgsz)
  338. return -EIO;
  339. pgsz &= ~(pgsz - 1);
  340. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  341. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  342. if (!iov)
  343. return -ENOMEM;
  344. nres = 0;
  345. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  346. res = &dev->resource[i + PCI_IOV_RESOURCES];
  347. /*
  348. * If it is already FIXED, don't change it, something
  349. * (perhaps EA or header fixups) wants it this way.
  350. */
  351. if (res->flags & IORESOURCE_PCI_FIXED)
  352. bar64 = (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
  353. else
  354. bar64 = __pci_read_base(dev, pci_bar_unknown, res,
  355. pos + PCI_SRIOV_BAR + i * 4);
  356. if (!res->flags)
  357. continue;
  358. if (resource_size(res) & (PAGE_SIZE - 1)) {
  359. rc = -EIO;
  360. goto failed;
  361. }
  362. iov->barsz[i] = resource_size(res);
  363. res->end = res->start + resource_size(res) * total - 1;
  364. dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
  365. i, res, i, total);
  366. i += bar64;
  367. nres++;
  368. }
  369. iov->pos = pos;
  370. iov->nres = nres;
  371. iov->ctrl = ctrl;
  372. iov->total_VFs = total;
  373. iov->pgsz = pgsz;
  374. iov->self = dev;
  375. iov->drivers_autoprobe = true;
  376. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  377. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  378. if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  379. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  380. if (pdev)
  381. iov->dev = pci_dev_get(pdev);
  382. else
  383. iov->dev = dev;
  384. dev->sriov = iov;
  385. dev->is_physfn = 1;
  386. rc = compute_max_vf_buses(dev);
  387. if (rc)
  388. goto fail_max_buses;
  389. return 0;
  390. fail_max_buses:
  391. dev->sriov = NULL;
  392. dev->is_physfn = 0;
  393. failed:
  394. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  395. res = &dev->resource[i + PCI_IOV_RESOURCES];
  396. res->flags = 0;
  397. }
  398. kfree(iov);
  399. return rc;
  400. }
  401. static void sriov_release(struct pci_dev *dev)
  402. {
  403. BUG_ON(dev->sriov->num_VFs);
  404. if (dev != dev->sriov->dev)
  405. pci_dev_put(dev->sriov->dev);
  406. kfree(dev->sriov);
  407. dev->sriov = NULL;
  408. }
  409. static void sriov_restore_state(struct pci_dev *dev)
  410. {
  411. int i;
  412. u16 ctrl;
  413. struct pci_sriov *iov = dev->sriov;
  414. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  415. if (ctrl & PCI_SRIOV_CTRL_VFE)
  416. return;
  417. for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
  418. pci_update_resource(dev, i);
  419. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  420. pci_iov_set_numvfs(dev, iov->num_VFs);
  421. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  422. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  423. msleep(100);
  424. }
  425. /**
  426. * pci_iov_init - initialize the IOV capability
  427. * @dev: the PCI device
  428. *
  429. * Returns 0 on success, or negative on failure.
  430. */
  431. int pci_iov_init(struct pci_dev *dev)
  432. {
  433. int pos;
  434. if (!pci_is_pcie(dev))
  435. return -ENODEV;
  436. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  437. if (pos)
  438. return sriov_init(dev, pos);
  439. return -ENODEV;
  440. }
  441. /**
  442. * pci_iov_release - release resources used by the IOV capability
  443. * @dev: the PCI device
  444. */
  445. void pci_iov_release(struct pci_dev *dev)
  446. {
  447. if (dev->is_physfn)
  448. sriov_release(dev);
  449. }
  450. /**
  451. * pci_iov_update_resource - update a VF BAR
  452. * @dev: the PCI device
  453. * @resno: the resource number
  454. *
  455. * Update a VF BAR in the SR-IOV capability of a PF.
  456. */
  457. void pci_iov_update_resource(struct pci_dev *dev, int resno)
  458. {
  459. struct pci_sriov *iov = dev->is_physfn ? dev->sriov : NULL;
  460. struct resource *res = dev->resource + resno;
  461. int vf_bar = resno - PCI_IOV_RESOURCES;
  462. struct pci_bus_region region;
  463. u16 cmd;
  464. u32 new;
  465. int reg;
  466. /*
  467. * The generic pci_restore_bars() path calls this for all devices,
  468. * including VFs and non-SR-IOV devices. If this is not a PF, we
  469. * have nothing to do.
  470. */
  471. if (!iov)
  472. return;
  473. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &cmd);
  474. if ((cmd & PCI_SRIOV_CTRL_VFE) && (cmd & PCI_SRIOV_CTRL_MSE)) {
  475. dev_WARN(&dev->dev, "can't update enabled VF BAR%d %pR\n",
  476. vf_bar, res);
  477. return;
  478. }
  479. /*
  480. * Ignore unimplemented BARs, unused resource slots for 64-bit
  481. * BARs, and non-movable resources, e.g., those described via
  482. * Enhanced Allocation.
  483. */
  484. if (!res->flags)
  485. return;
  486. if (res->flags & IORESOURCE_UNSET)
  487. return;
  488. if (res->flags & IORESOURCE_PCI_FIXED)
  489. return;
  490. pcibios_resource_to_bus(dev->bus, &region, res);
  491. new = region.start;
  492. new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
  493. reg = iov->pos + PCI_SRIOV_BAR + 4 * vf_bar;
  494. pci_write_config_dword(dev, reg, new);
  495. if (res->flags & IORESOURCE_MEM_64) {
  496. new = region.start >> 16 >> 16;
  497. pci_write_config_dword(dev, reg + 4, new);
  498. }
  499. }
  500. resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
  501. int resno)
  502. {
  503. return pci_iov_resource_size(dev, resno);
  504. }
  505. /**
  506. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  507. * @dev: the PCI device
  508. * @resno: the resource number
  509. *
  510. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  511. * This is not the same as the resource size which is defined as
  512. * the VF BAR size multiplied by the number of VFs. The alignment
  513. * is just the VF BAR size.
  514. */
  515. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  516. {
  517. return pcibios_iov_resource_alignment(dev, resno);
  518. }
  519. /**
  520. * pci_restore_iov_state - restore the state of the IOV capability
  521. * @dev: the PCI device
  522. */
  523. void pci_restore_iov_state(struct pci_dev *dev)
  524. {
  525. if (dev->is_physfn)
  526. sriov_restore_state(dev);
  527. }
  528. /**
  529. * pci_iov_bus_range - find bus range used by Virtual Function
  530. * @bus: the PCI bus
  531. *
  532. * Returns max number of buses (exclude current one) used by Virtual
  533. * Functions.
  534. */
  535. int pci_iov_bus_range(struct pci_bus *bus)
  536. {
  537. int max = 0;
  538. struct pci_dev *dev;
  539. list_for_each_entry(dev, &bus->devices, bus_list) {
  540. if (!dev->is_physfn)
  541. continue;
  542. if (dev->sriov->max_VF_buses > max)
  543. max = dev->sriov->max_VF_buses;
  544. }
  545. return max ? max - bus->number : 0;
  546. }
  547. /**
  548. * pci_enable_sriov - enable the SR-IOV capability
  549. * @dev: the PCI device
  550. * @nr_virtfn: number of virtual functions to enable
  551. *
  552. * Returns 0 on success, or negative on failure.
  553. */
  554. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  555. {
  556. might_sleep();
  557. if (!dev->is_physfn)
  558. return -ENOSYS;
  559. return sriov_enable(dev, nr_virtfn);
  560. }
  561. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  562. /**
  563. * pci_disable_sriov - disable the SR-IOV capability
  564. * @dev: the PCI device
  565. */
  566. void pci_disable_sriov(struct pci_dev *dev)
  567. {
  568. might_sleep();
  569. if (!dev->is_physfn)
  570. return;
  571. sriov_disable(dev);
  572. }
  573. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  574. /**
  575. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  576. * @dev: the PCI device
  577. *
  578. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  579. */
  580. int pci_num_vf(struct pci_dev *dev)
  581. {
  582. if (!dev->is_physfn)
  583. return 0;
  584. return dev->sriov->num_VFs;
  585. }
  586. EXPORT_SYMBOL_GPL(pci_num_vf);
  587. /**
  588. * pci_vfs_assigned - returns number of VFs are assigned to a guest
  589. * @dev: the PCI device
  590. *
  591. * Returns number of VFs belonging to this device that are assigned to a guest.
  592. * If device is not a physical function returns 0.
  593. */
  594. int pci_vfs_assigned(struct pci_dev *dev)
  595. {
  596. struct pci_dev *vfdev;
  597. unsigned int vfs_assigned = 0;
  598. unsigned short dev_id;
  599. /* only search if we are a PF */
  600. if (!dev->is_physfn)
  601. return 0;
  602. /*
  603. * determine the device ID for the VFs, the vendor ID will be the
  604. * same as the PF so there is no need to check for that one
  605. */
  606. pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
  607. /* loop through all the VFs to see if we own any that are assigned */
  608. vfdev = pci_get_device(dev->vendor, dev_id, NULL);
  609. while (vfdev) {
  610. /*
  611. * It is considered assigned if it is a virtual function with
  612. * our dev as the physical function and the assigned bit is set
  613. */
  614. if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
  615. pci_is_dev_assigned(vfdev))
  616. vfs_assigned++;
  617. vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
  618. }
  619. return vfs_assigned;
  620. }
  621. EXPORT_SYMBOL_GPL(pci_vfs_assigned);
  622. /**
  623. * pci_sriov_set_totalvfs -- reduce the TotalVFs available
  624. * @dev: the PCI PF device
  625. * @numvfs: number that should be used for TotalVFs supported
  626. *
  627. * Should be called from PF driver's probe routine with
  628. * device's mutex held.
  629. *
  630. * Returns 0 if PF is an SRIOV-capable device and
  631. * value of numvfs valid. If not a PF return -ENOSYS;
  632. * if numvfs is invalid return -EINVAL;
  633. * if VFs already enabled, return -EBUSY.
  634. */
  635. int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
  636. {
  637. if (!dev->is_physfn)
  638. return -ENOSYS;
  639. if (numvfs > dev->sriov->total_VFs)
  640. return -EINVAL;
  641. /* Shouldn't change if VFs already enabled */
  642. if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
  643. return -EBUSY;
  644. else
  645. dev->sriov->driver_max_VFs = numvfs;
  646. return 0;
  647. }
  648. EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
  649. /**
  650. * pci_sriov_get_totalvfs -- get total VFs supported on this device
  651. * @dev: the PCI PF device
  652. *
  653. * For a PCIe device with SRIOV support, return the PCIe
  654. * SRIOV capability value of TotalVFs or the value of driver_max_VFs
  655. * if the driver reduced it. Otherwise 0.
  656. */
  657. int pci_sriov_get_totalvfs(struct pci_dev *dev)
  658. {
  659. if (!dev->is_physfn)
  660. return 0;
  661. if (dev->sriov->driver_max_VFs)
  662. return dev->sriov->driver_max_VFs;
  663. return dev->sriov->total_VFs;
  664. }
  665. EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);