pci-epc-core.c 14 KB

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  1. /**
  2. * PCI Endpoint *Controller* (EPC) library
  3. *
  4. * Copyright (C) 2017 Texas Instruments
  5. * Author: Kishon Vijay Abraham I <kishon@ti.com>
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 of
  9. * the License as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/device.h>
  20. #include <linux/slab.h>
  21. #include <linux/module.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pci-epc.h>
  24. #include <linux/pci-epf.h>
  25. #include <linux/pci-ep-cfs.h>
  26. static struct class *pci_epc_class;
  27. static void devm_pci_epc_release(struct device *dev, void *res)
  28. {
  29. struct pci_epc *epc = *(struct pci_epc **)res;
  30. pci_epc_destroy(epc);
  31. }
  32. static int devm_pci_epc_match(struct device *dev, void *res, void *match_data)
  33. {
  34. struct pci_epc **epc = res;
  35. return *epc == match_data;
  36. }
  37. /**
  38. * pci_epc_put() - release the PCI endpoint controller
  39. * @epc: epc returned by pci_epc_get()
  40. *
  41. * release the refcount the caller obtained by invoking pci_epc_get()
  42. */
  43. void pci_epc_put(struct pci_epc *epc)
  44. {
  45. if (!epc || IS_ERR(epc))
  46. return;
  47. module_put(epc->ops->owner);
  48. put_device(&epc->dev);
  49. }
  50. EXPORT_SYMBOL_GPL(pci_epc_put);
  51. /**
  52. * pci_epc_get() - get the PCI endpoint controller
  53. * @epc_name: device name of the endpoint controller
  54. *
  55. * Invoke to get struct pci_epc * corresponding to the device name of the
  56. * endpoint controller
  57. */
  58. struct pci_epc *pci_epc_get(const char *epc_name)
  59. {
  60. int ret = -EINVAL;
  61. struct pci_epc *epc;
  62. struct device *dev;
  63. struct class_dev_iter iter;
  64. class_dev_iter_init(&iter, pci_epc_class, NULL, NULL);
  65. while ((dev = class_dev_iter_next(&iter))) {
  66. if (strcmp(epc_name, dev_name(dev)))
  67. continue;
  68. epc = to_pci_epc(dev);
  69. if (!try_module_get(epc->ops->owner)) {
  70. ret = -EINVAL;
  71. goto err;
  72. }
  73. class_dev_iter_exit(&iter);
  74. get_device(&epc->dev);
  75. return epc;
  76. }
  77. err:
  78. class_dev_iter_exit(&iter);
  79. return ERR_PTR(ret);
  80. }
  81. EXPORT_SYMBOL_GPL(pci_epc_get);
  82. /**
  83. * pci_epc_stop() - stop the PCI link
  84. * @epc: the link of the EPC device that has to be stopped
  85. *
  86. * Invoke to stop the PCI link
  87. */
  88. void pci_epc_stop(struct pci_epc *epc)
  89. {
  90. unsigned long flags;
  91. if (IS_ERR(epc) || !epc->ops->stop)
  92. return;
  93. spin_lock_irqsave(&epc->lock, flags);
  94. epc->ops->stop(epc);
  95. spin_unlock_irqrestore(&epc->lock, flags);
  96. }
  97. EXPORT_SYMBOL_GPL(pci_epc_stop);
  98. /**
  99. * pci_epc_start() - start the PCI link
  100. * @epc: the link of *this* EPC device has to be started
  101. *
  102. * Invoke to start the PCI link
  103. */
  104. int pci_epc_start(struct pci_epc *epc)
  105. {
  106. int ret;
  107. unsigned long flags;
  108. if (IS_ERR(epc))
  109. return -EINVAL;
  110. if (!epc->ops->start)
  111. return 0;
  112. spin_lock_irqsave(&epc->lock, flags);
  113. ret = epc->ops->start(epc);
  114. spin_unlock_irqrestore(&epc->lock, flags);
  115. return ret;
  116. }
  117. EXPORT_SYMBOL_GPL(pci_epc_start);
  118. /**
  119. * pci_epc_raise_irq() - interrupt the host system
  120. * @epc: the EPC device which has to interrupt the host
  121. * @type: specify the type of interrupt; legacy or MSI
  122. * @interrupt_num: the MSI interrupt number
  123. *
  124. * Invoke to raise an MSI or legacy interrupt
  125. */
  126. int pci_epc_raise_irq(struct pci_epc *epc, enum pci_epc_irq_type type,
  127. u8 interrupt_num)
  128. {
  129. int ret;
  130. unsigned long flags;
  131. if (IS_ERR(epc))
  132. return -EINVAL;
  133. if (!epc->ops->raise_irq)
  134. return 0;
  135. spin_lock_irqsave(&epc->lock, flags);
  136. ret = epc->ops->raise_irq(epc, type, interrupt_num);
  137. spin_unlock_irqrestore(&epc->lock, flags);
  138. return ret;
  139. }
  140. EXPORT_SYMBOL_GPL(pci_epc_raise_irq);
  141. /**
  142. * pci_epc_get_msi() - get the number of MSI interrupt numbers allocated
  143. * @epc: the EPC device to which MSI interrupts was requested
  144. *
  145. * Invoke to get the number of MSI interrupts allocated by the RC
  146. */
  147. int pci_epc_get_msi(struct pci_epc *epc)
  148. {
  149. int interrupt;
  150. unsigned long flags;
  151. if (IS_ERR(epc))
  152. return 0;
  153. if (!epc->ops->get_msi)
  154. return 0;
  155. spin_lock_irqsave(&epc->lock, flags);
  156. interrupt = epc->ops->get_msi(epc);
  157. spin_unlock_irqrestore(&epc->lock, flags);
  158. if (interrupt < 0)
  159. return 0;
  160. interrupt = 1 << interrupt;
  161. return interrupt;
  162. }
  163. EXPORT_SYMBOL_GPL(pci_epc_get_msi);
  164. /**
  165. * pci_epc_set_msi() - set the number of MSI interrupt numbers required
  166. * @epc: the EPC device on which MSI has to be configured
  167. * @interrupts: number of MSI interrupts required by the EPF
  168. *
  169. * Invoke to set the required number of MSI interrupts.
  170. */
  171. int pci_epc_set_msi(struct pci_epc *epc, u8 interrupts)
  172. {
  173. int ret;
  174. u8 encode_int;
  175. unsigned long flags;
  176. if (IS_ERR(epc))
  177. return -EINVAL;
  178. if (!epc->ops->set_msi)
  179. return 0;
  180. encode_int = order_base_2(interrupts);
  181. spin_lock_irqsave(&epc->lock, flags);
  182. ret = epc->ops->set_msi(epc, encode_int);
  183. spin_unlock_irqrestore(&epc->lock, flags);
  184. return ret;
  185. }
  186. EXPORT_SYMBOL_GPL(pci_epc_set_msi);
  187. /**
  188. * pci_epc_unmap_addr() - unmap CPU address from PCI address
  189. * @epc: the EPC device on which address is allocated
  190. * @phys_addr: physical address of the local system
  191. *
  192. * Invoke to unmap the CPU address from PCI address.
  193. */
  194. void pci_epc_unmap_addr(struct pci_epc *epc, phys_addr_t phys_addr)
  195. {
  196. unsigned long flags;
  197. if (IS_ERR(epc))
  198. return;
  199. if (!epc->ops->unmap_addr)
  200. return;
  201. spin_lock_irqsave(&epc->lock, flags);
  202. epc->ops->unmap_addr(epc, phys_addr);
  203. spin_unlock_irqrestore(&epc->lock, flags);
  204. }
  205. EXPORT_SYMBOL_GPL(pci_epc_unmap_addr);
  206. /**
  207. * pci_epc_map_addr() - map CPU address to PCI address
  208. * @epc: the EPC device on which address is allocated
  209. * @phys_addr: physical address of the local system
  210. * @pci_addr: PCI address to which the physical address should be mapped
  211. * @size: the size of the allocation
  212. *
  213. * Invoke to map CPU address with PCI address.
  214. */
  215. int pci_epc_map_addr(struct pci_epc *epc, phys_addr_t phys_addr,
  216. u64 pci_addr, size_t size)
  217. {
  218. int ret;
  219. unsigned long flags;
  220. if (IS_ERR(epc))
  221. return -EINVAL;
  222. if (!epc->ops->map_addr)
  223. return 0;
  224. spin_lock_irqsave(&epc->lock, flags);
  225. ret = epc->ops->map_addr(epc, phys_addr, pci_addr, size);
  226. spin_unlock_irqrestore(&epc->lock, flags);
  227. return ret;
  228. }
  229. EXPORT_SYMBOL_GPL(pci_epc_map_addr);
  230. /**
  231. * pci_epc_clear_bar() - reset the BAR
  232. * @epc: the EPC device for which the BAR has to be cleared
  233. * @bar: the BAR number that has to be reset
  234. *
  235. * Invoke to reset the BAR of the endpoint device.
  236. */
  237. void pci_epc_clear_bar(struct pci_epc *epc, int bar)
  238. {
  239. unsigned long flags;
  240. if (IS_ERR(epc))
  241. return;
  242. if (!epc->ops->clear_bar)
  243. return;
  244. spin_lock_irqsave(&epc->lock, flags);
  245. epc->ops->clear_bar(epc, bar);
  246. spin_unlock_irqrestore(&epc->lock, flags);
  247. }
  248. EXPORT_SYMBOL_GPL(pci_epc_clear_bar);
  249. /**
  250. * pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space
  251. * @epc: the EPC device on which BAR has to be configured
  252. * @bar: the BAR number that has to be configured
  253. * @size: the size of the addr space
  254. * @flags: specify memory allocation/io allocation/32bit address/64 bit address
  255. *
  256. * Invoke to configure the BAR of the endpoint device.
  257. */
  258. int pci_epc_set_bar(struct pci_epc *epc, enum pci_barno bar,
  259. dma_addr_t bar_phys, size_t size, int flags)
  260. {
  261. int ret;
  262. unsigned long irq_flags;
  263. if (IS_ERR(epc))
  264. return -EINVAL;
  265. if (!epc->ops->set_bar)
  266. return 0;
  267. spin_lock_irqsave(&epc->lock, irq_flags);
  268. ret = epc->ops->set_bar(epc, bar, bar_phys, size, flags);
  269. spin_unlock_irqrestore(&epc->lock, irq_flags);
  270. return ret;
  271. }
  272. EXPORT_SYMBOL_GPL(pci_epc_set_bar);
  273. /**
  274. * pci_epc_write_header() - write standard configuration header
  275. * @epc: the EPC device to which the configuration header should be written
  276. * @header: standard configuration header fields
  277. *
  278. * Invoke to write the configuration header to the endpoint controller. Every
  279. * endpoint controller will have a dedicated location to which the standard
  280. * configuration header would be written. The callback function should write
  281. * the header fields to this dedicated location.
  282. */
  283. int pci_epc_write_header(struct pci_epc *epc, struct pci_epf_header *header)
  284. {
  285. int ret;
  286. unsigned long flags;
  287. if (IS_ERR(epc))
  288. return -EINVAL;
  289. if (!epc->ops->write_header)
  290. return 0;
  291. spin_lock_irqsave(&epc->lock, flags);
  292. ret = epc->ops->write_header(epc, header);
  293. spin_unlock_irqrestore(&epc->lock, flags);
  294. return ret;
  295. }
  296. EXPORT_SYMBOL_GPL(pci_epc_write_header);
  297. /**
  298. * pci_epc_add_epf() - bind PCI endpoint function to an endpoint controller
  299. * @epc: the EPC device to which the endpoint function should be added
  300. * @epf: the endpoint function to be added
  301. *
  302. * A PCI endpoint device can have one or more functions. In the case of PCIe,
  303. * the specification allows up to 8 PCIe endpoint functions. Invoke
  304. * pci_epc_add_epf() to add a PCI endpoint function to an endpoint controller.
  305. */
  306. int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf)
  307. {
  308. unsigned long flags;
  309. if (epf->epc)
  310. return -EBUSY;
  311. if (IS_ERR(epc))
  312. return -EINVAL;
  313. if (epf->func_no > epc->max_functions - 1)
  314. return -EINVAL;
  315. epf->epc = epc;
  316. spin_lock_irqsave(&epc->lock, flags);
  317. list_add_tail(&epf->list, &epc->pci_epf);
  318. spin_unlock_irqrestore(&epc->lock, flags);
  319. return 0;
  320. }
  321. EXPORT_SYMBOL_GPL(pci_epc_add_epf);
  322. /**
  323. * pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller
  324. * @epc: the EPC device from which the endpoint function should be removed
  325. * @epf: the endpoint function to be removed
  326. *
  327. * Invoke to remove PCI endpoint function from the endpoint controller.
  328. */
  329. void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf)
  330. {
  331. unsigned long flags;
  332. if (!epc || IS_ERR(epc))
  333. return;
  334. spin_lock_irqsave(&epc->lock, flags);
  335. list_del(&epf->list);
  336. spin_unlock_irqrestore(&epc->lock, flags);
  337. }
  338. EXPORT_SYMBOL_GPL(pci_epc_remove_epf);
  339. /**
  340. * pci_epc_linkup() - Notify the EPF device that EPC device has established a
  341. * connection with the Root Complex.
  342. * @epc: the EPC device which has established link with the host
  343. *
  344. * Invoke to Notify the EPF device that the EPC device has established a
  345. * connection with the Root Complex.
  346. */
  347. void pci_epc_linkup(struct pci_epc *epc)
  348. {
  349. unsigned long flags;
  350. struct pci_epf *epf;
  351. if (!epc || IS_ERR(epc))
  352. return;
  353. spin_lock_irqsave(&epc->lock, flags);
  354. list_for_each_entry(epf, &epc->pci_epf, list)
  355. pci_epf_linkup(epf);
  356. spin_unlock_irqrestore(&epc->lock, flags);
  357. }
  358. EXPORT_SYMBOL_GPL(pci_epc_linkup);
  359. /**
  360. * pci_epc_destroy() - destroy the EPC device
  361. * @epc: the EPC device that has to be destroyed
  362. *
  363. * Invoke to destroy the PCI EPC device
  364. */
  365. void pci_epc_destroy(struct pci_epc *epc)
  366. {
  367. pci_ep_cfs_remove_epc_group(epc->group);
  368. device_unregister(&epc->dev);
  369. kfree(epc);
  370. }
  371. EXPORT_SYMBOL_GPL(pci_epc_destroy);
  372. /**
  373. * devm_pci_epc_destroy() - destroy the EPC device
  374. * @dev: device that wants to destroy the EPC
  375. * @epc: the EPC device that has to be destroyed
  376. *
  377. * Invoke to destroy the devres associated with this
  378. * pci_epc and destroy the EPC device.
  379. */
  380. void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc)
  381. {
  382. int r;
  383. r = devres_destroy(dev, devm_pci_epc_release, devm_pci_epc_match,
  384. epc);
  385. dev_WARN_ONCE(dev, r, "couldn't find PCI EPC resource\n");
  386. }
  387. EXPORT_SYMBOL_GPL(devm_pci_epc_destroy);
  388. /**
  389. * __pci_epc_create() - create a new endpoint controller (EPC) device
  390. * @dev: device that is creating the new EPC
  391. * @ops: function pointers for performing EPC operations
  392. * @owner: the owner of the module that creates the EPC device
  393. *
  394. * Invoke to create a new EPC device and add it to pci_epc class.
  395. */
  396. struct pci_epc *
  397. __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  398. struct module *owner)
  399. {
  400. int ret;
  401. struct pci_epc *epc;
  402. if (WARN_ON(!dev)) {
  403. ret = -EINVAL;
  404. goto err_ret;
  405. }
  406. epc = kzalloc(sizeof(*epc), GFP_KERNEL);
  407. if (!epc) {
  408. ret = -ENOMEM;
  409. goto err_ret;
  410. }
  411. spin_lock_init(&epc->lock);
  412. INIT_LIST_HEAD(&epc->pci_epf);
  413. device_initialize(&epc->dev);
  414. epc->dev.class = pci_epc_class;
  415. epc->dev.parent = dev;
  416. epc->ops = ops;
  417. ret = dev_set_name(&epc->dev, "%s", dev_name(dev));
  418. if (ret)
  419. goto put_dev;
  420. ret = device_add(&epc->dev);
  421. if (ret)
  422. goto put_dev;
  423. epc->group = pci_ep_cfs_add_epc_group(dev_name(dev));
  424. return epc;
  425. put_dev:
  426. put_device(&epc->dev);
  427. kfree(epc);
  428. err_ret:
  429. return ERR_PTR(ret);
  430. }
  431. EXPORT_SYMBOL_GPL(__pci_epc_create);
  432. /**
  433. * __devm_pci_epc_create() - create a new endpoint controller (EPC) device
  434. * @dev: device that is creating the new EPC
  435. * @ops: function pointers for performing EPC operations
  436. * @owner: the owner of the module that creates the EPC device
  437. *
  438. * Invoke to create a new EPC device and add it to pci_epc class.
  439. * While at that, it also associates the device with the pci_epc using devres.
  440. * On driver detach, release function is invoked on the devres data,
  441. * then, devres data is freed.
  442. */
  443. struct pci_epc *
  444. __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  445. struct module *owner)
  446. {
  447. struct pci_epc **ptr, *epc;
  448. ptr = devres_alloc(devm_pci_epc_release, sizeof(*ptr), GFP_KERNEL);
  449. if (!ptr)
  450. return ERR_PTR(-ENOMEM);
  451. epc = __pci_epc_create(dev, ops, owner);
  452. if (!IS_ERR(epc)) {
  453. *ptr = epc;
  454. devres_add(dev, ptr);
  455. } else {
  456. devres_free(ptr);
  457. }
  458. return epc;
  459. }
  460. EXPORT_SYMBOL_GPL(__devm_pci_epc_create);
  461. static int __init pci_epc_init(void)
  462. {
  463. pci_epc_class = class_create(THIS_MODULE, "pci_epc");
  464. if (IS_ERR(pci_epc_class)) {
  465. pr_err("failed to create pci epc class --> %ld\n",
  466. PTR_ERR(pci_epc_class));
  467. return PTR_ERR(pci_epc_class);
  468. }
  469. return 0;
  470. }
  471. module_init(pci_epc_init);
  472. static void __exit pci_epc_exit(void)
  473. {
  474. class_destroy(pci_epc_class);
  475. }
  476. module_exit(pci_epc_exit);
  477. MODULE_DESCRIPTION("PCI EPC Library");
  478. MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
  479. MODULE_LICENSE("GPL v2");