core.c 74 KB

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  1. /*
  2. * NVM Express device driver
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/blkdev.h>
  15. #include <linux/blk-mq.h>
  16. #include <linux/delay.h>
  17. #include <linux/errno.h>
  18. #include <linux/hdreg.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list_sort.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/pr.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/nvme_ioctl.h>
  27. #include <linux/t10-pi.h>
  28. #include <linux/pm_qos.h>
  29. #include <asm/unaligned.h>
  30. #include "nvme.h"
  31. #include "fabrics.h"
  32. #define NVME_MINORS (1U << MINORBITS)
  33. unsigned char admin_timeout = 60;
  34. module_param(admin_timeout, byte, 0644);
  35. MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  36. EXPORT_SYMBOL_GPL(admin_timeout);
  37. unsigned char nvme_io_timeout = 30;
  38. module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  39. MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  40. EXPORT_SYMBOL_GPL(nvme_io_timeout);
  41. static unsigned char shutdown_timeout = 5;
  42. module_param(shutdown_timeout, byte, 0644);
  43. MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  44. static u8 nvme_max_retries = 5;
  45. module_param_named(max_retries, nvme_max_retries, byte, 0644);
  46. MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  47. static int nvme_char_major;
  48. module_param(nvme_char_major, int, 0);
  49. static unsigned long default_ps_max_latency_us = 100000;
  50. module_param(default_ps_max_latency_us, ulong, 0644);
  51. MODULE_PARM_DESC(default_ps_max_latency_us,
  52. "max power saving latency for new devices; use PM QOS to change per device");
  53. static bool force_apst;
  54. module_param(force_apst, bool, 0644);
  55. MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
  56. static bool streams;
  57. module_param(streams, bool, 0644);
  58. MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
  59. struct workqueue_struct *nvme_wq;
  60. EXPORT_SYMBOL_GPL(nvme_wq);
  61. static LIST_HEAD(nvme_ctrl_list);
  62. static DEFINE_SPINLOCK(dev_list_lock);
  63. static struct class *nvme_class;
  64. static __le32 nvme_get_log_dw10(u8 lid, size_t size)
  65. {
  66. return cpu_to_le32((((size / 4) - 1) << 16) | lid);
  67. }
  68. int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
  69. {
  70. if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
  71. return -EBUSY;
  72. if (!queue_work(nvme_wq, &ctrl->reset_work))
  73. return -EBUSY;
  74. return 0;
  75. }
  76. EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
  77. static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
  78. {
  79. int ret;
  80. ret = nvme_reset_ctrl(ctrl);
  81. if (!ret)
  82. flush_work(&ctrl->reset_work);
  83. return ret;
  84. }
  85. static blk_status_t nvme_error_status(struct request *req)
  86. {
  87. switch (nvme_req(req)->status & 0x7ff) {
  88. case NVME_SC_SUCCESS:
  89. return BLK_STS_OK;
  90. case NVME_SC_CAP_EXCEEDED:
  91. return BLK_STS_NOSPC;
  92. case NVME_SC_ONCS_NOT_SUPPORTED:
  93. return BLK_STS_NOTSUPP;
  94. case NVME_SC_WRITE_FAULT:
  95. case NVME_SC_READ_ERROR:
  96. case NVME_SC_UNWRITTEN_BLOCK:
  97. case NVME_SC_ACCESS_DENIED:
  98. case NVME_SC_READ_ONLY:
  99. return BLK_STS_MEDIUM;
  100. case NVME_SC_GUARD_CHECK:
  101. case NVME_SC_APPTAG_CHECK:
  102. case NVME_SC_REFTAG_CHECK:
  103. case NVME_SC_INVALID_PI:
  104. return BLK_STS_PROTECTION;
  105. case NVME_SC_RESERVATION_CONFLICT:
  106. return BLK_STS_NEXUS;
  107. default:
  108. return BLK_STS_IOERR;
  109. }
  110. }
  111. static inline bool nvme_req_needs_retry(struct request *req)
  112. {
  113. if (blk_noretry_request(req))
  114. return false;
  115. if (nvme_req(req)->status & NVME_SC_DNR)
  116. return false;
  117. if (nvme_req(req)->retries >= nvme_max_retries)
  118. return false;
  119. return true;
  120. }
  121. void nvme_complete_rq(struct request *req)
  122. {
  123. if (unlikely(nvme_req(req)->status && nvme_req_needs_retry(req))) {
  124. nvme_req(req)->retries++;
  125. blk_mq_requeue_request(req, true);
  126. return;
  127. }
  128. blk_mq_end_request(req, nvme_error_status(req));
  129. }
  130. EXPORT_SYMBOL_GPL(nvme_complete_rq);
  131. void nvme_cancel_request(struct request *req, void *data, bool reserved)
  132. {
  133. int status;
  134. if (!blk_mq_request_started(req))
  135. return;
  136. dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
  137. "Cancelling I/O %d", req->tag);
  138. status = NVME_SC_ABORT_REQ;
  139. if (blk_queue_dying(req->q))
  140. status |= NVME_SC_DNR;
  141. nvme_req(req)->status = status;
  142. blk_mq_complete_request(req);
  143. }
  144. EXPORT_SYMBOL_GPL(nvme_cancel_request);
  145. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  146. enum nvme_ctrl_state new_state)
  147. {
  148. enum nvme_ctrl_state old_state;
  149. unsigned long flags;
  150. bool changed = false;
  151. spin_lock_irqsave(&ctrl->lock, flags);
  152. old_state = ctrl->state;
  153. switch (new_state) {
  154. case NVME_CTRL_LIVE:
  155. switch (old_state) {
  156. case NVME_CTRL_NEW:
  157. case NVME_CTRL_RESETTING:
  158. case NVME_CTRL_RECONNECTING:
  159. changed = true;
  160. /* FALLTHRU */
  161. default:
  162. break;
  163. }
  164. break;
  165. case NVME_CTRL_RESETTING:
  166. switch (old_state) {
  167. case NVME_CTRL_NEW:
  168. case NVME_CTRL_LIVE:
  169. changed = true;
  170. /* FALLTHRU */
  171. default:
  172. break;
  173. }
  174. break;
  175. case NVME_CTRL_RECONNECTING:
  176. switch (old_state) {
  177. case NVME_CTRL_LIVE:
  178. changed = true;
  179. /* FALLTHRU */
  180. default:
  181. break;
  182. }
  183. break;
  184. case NVME_CTRL_DELETING:
  185. switch (old_state) {
  186. case NVME_CTRL_LIVE:
  187. case NVME_CTRL_RESETTING:
  188. case NVME_CTRL_RECONNECTING:
  189. changed = true;
  190. /* FALLTHRU */
  191. default:
  192. break;
  193. }
  194. break;
  195. case NVME_CTRL_DEAD:
  196. switch (old_state) {
  197. case NVME_CTRL_DELETING:
  198. changed = true;
  199. /* FALLTHRU */
  200. default:
  201. break;
  202. }
  203. break;
  204. default:
  205. break;
  206. }
  207. if (changed)
  208. ctrl->state = new_state;
  209. spin_unlock_irqrestore(&ctrl->lock, flags);
  210. return changed;
  211. }
  212. EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
  213. static void nvme_free_ns(struct kref *kref)
  214. {
  215. struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
  216. if (ns->ndev)
  217. nvme_nvm_unregister(ns);
  218. if (ns->disk) {
  219. spin_lock(&dev_list_lock);
  220. ns->disk->private_data = NULL;
  221. spin_unlock(&dev_list_lock);
  222. }
  223. put_disk(ns->disk);
  224. ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
  225. nvme_put_ctrl(ns->ctrl);
  226. kfree(ns);
  227. }
  228. static void nvme_put_ns(struct nvme_ns *ns)
  229. {
  230. kref_put(&ns->kref, nvme_free_ns);
  231. }
  232. static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
  233. {
  234. struct nvme_ns *ns;
  235. spin_lock(&dev_list_lock);
  236. ns = disk->private_data;
  237. if (ns) {
  238. if (!kref_get_unless_zero(&ns->kref))
  239. goto fail;
  240. if (!try_module_get(ns->ctrl->ops->module))
  241. goto fail_put_ns;
  242. }
  243. spin_unlock(&dev_list_lock);
  244. return ns;
  245. fail_put_ns:
  246. kref_put(&ns->kref, nvme_free_ns);
  247. fail:
  248. spin_unlock(&dev_list_lock);
  249. return NULL;
  250. }
  251. struct request *nvme_alloc_request(struct request_queue *q,
  252. struct nvme_command *cmd, unsigned int flags, int qid)
  253. {
  254. unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  255. struct request *req;
  256. if (qid == NVME_QID_ANY) {
  257. req = blk_mq_alloc_request(q, op, flags);
  258. } else {
  259. req = blk_mq_alloc_request_hctx(q, op, flags,
  260. qid ? qid - 1 : 0);
  261. }
  262. if (IS_ERR(req))
  263. return req;
  264. req->cmd_flags |= REQ_FAILFAST_DRIVER;
  265. nvme_req(req)->cmd = cmd;
  266. return req;
  267. }
  268. EXPORT_SYMBOL_GPL(nvme_alloc_request);
  269. static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable)
  270. {
  271. struct nvme_command c;
  272. memset(&c, 0, sizeof(c));
  273. c.directive.opcode = nvme_admin_directive_send;
  274. c.directive.nsid = cpu_to_le32(NVME_NSID_ALL);
  275. c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE;
  276. c.directive.dtype = NVME_DIR_IDENTIFY;
  277. c.directive.tdtype = NVME_DIR_STREAMS;
  278. c.directive.endir = enable ? NVME_DIR_ENDIR : 0;
  279. return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0);
  280. }
  281. static int nvme_disable_streams(struct nvme_ctrl *ctrl)
  282. {
  283. return nvme_toggle_streams(ctrl, false);
  284. }
  285. static int nvme_enable_streams(struct nvme_ctrl *ctrl)
  286. {
  287. return nvme_toggle_streams(ctrl, true);
  288. }
  289. static int nvme_get_stream_params(struct nvme_ctrl *ctrl,
  290. struct streams_directive_params *s, u32 nsid)
  291. {
  292. struct nvme_command c;
  293. memset(&c, 0, sizeof(c));
  294. memset(s, 0, sizeof(*s));
  295. c.directive.opcode = nvme_admin_directive_recv;
  296. c.directive.nsid = cpu_to_le32(nsid);
  297. c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1);
  298. c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM;
  299. c.directive.dtype = NVME_DIR_STREAMS;
  300. return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s));
  301. }
  302. static int nvme_configure_directives(struct nvme_ctrl *ctrl)
  303. {
  304. struct streams_directive_params s;
  305. int ret;
  306. if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES))
  307. return 0;
  308. if (!streams)
  309. return 0;
  310. ret = nvme_enable_streams(ctrl);
  311. if (ret)
  312. return ret;
  313. ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL);
  314. if (ret)
  315. return ret;
  316. ctrl->nssa = le16_to_cpu(s.nssa);
  317. if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) {
  318. dev_info(ctrl->device, "too few streams (%u) available\n",
  319. ctrl->nssa);
  320. nvme_disable_streams(ctrl);
  321. return 0;
  322. }
  323. ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1);
  324. dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams);
  325. return 0;
  326. }
  327. /*
  328. * Check if 'req' has a write hint associated with it. If it does, assign
  329. * a valid namespace stream to the write.
  330. */
  331. static void nvme_assign_write_stream(struct nvme_ctrl *ctrl,
  332. struct request *req, u16 *control,
  333. u32 *dsmgmt)
  334. {
  335. enum rw_hint streamid = req->write_hint;
  336. if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE)
  337. streamid = 0;
  338. else {
  339. streamid--;
  340. if (WARN_ON_ONCE(streamid > ctrl->nr_streams))
  341. return;
  342. *control |= NVME_RW_DTYPE_STREAMS;
  343. *dsmgmt |= streamid << 16;
  344. }
  345. if (streamid < ARRAY_SIZE(req->q->write_hints))
  346. req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9;
  347. }
  348. static inline void nvme_setup_flush(struct nvme_ns *ns,
  349. struct nvme_command *cmnd)
  350. {
  351. memset(cmnd, 0, sizeof(*cmnd));
  352. cmnd->common.opcode = nvme_cmd_flush;
  353. cmnd->common.nsid = cpu_to_le32(ns->ns_id);
  354. }
  355. static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
  356. struct nvme_command *cmnd)
  357. {
  358. unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
  359. struct nvme_dsm_range *range;
  360. struct bio *bio;
  361. range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
  362. if (!range)
  363. return BLK_STS_RESOURCE;
  364. __rq_for_each_bio(bio, req) {
  365. u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
  366. u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
  367. range[n].cattr = cpu_to_le32(0);
  368. range[n].nlb = cpu_to_le32(nlb);
  369. range[n].slba = cpu_to_le64(slba);
  370. n++;
  371. }
  372. if (WARN_ON_ONCE(n != segments)) {
  373. kfree(range);
  374. return BLK_STS_IOERR;
  375. }
  376. memset(cmnd, 0, sizeof(*cmnd));
  377. cmnd->dsm.opcode = nvme_cmd_dsm;
  378. cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
  379. cmnd->dsm.nr = cpu_to_le32(segments - 1);
  380. cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
  381. req->special_vec.bv_page = virt_to_page(range);
  382. req->special_vec.bv_offset = offset_in_page(range);
  383. req->special_vec.bv_len = sizeof(*range) * segments;
  384. req->rq_flags |= RQF_SPECIAL_PAYLOAD;
  385. return BLK_STS_OK;
  386. }
  387. static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
  388. struct request *req, struct nvme_command *cmnd)
  389. {
  390. struct nvme_ctrl *ctrl = ns->ctrl;
  391. u16 control = 0;
  392. u32 dsmgmt = 0;
  393. /*
  394. * If formated with metadata, require the block layer provide a buffer
  395. * unless this namespace is formated such that the metadata can be
  396. * stripped/generated by the controller with PRACT=1.
  397. */
  398. if (ns && ns->ms &&
  399. (!ns->pi_type || ns->ms != sizeof(struct t10_pi_tuple)) &&
  400. !blk_integrity_rq(req) && !blk_rq_is_passthrough(req))
  401. return BLK_STS_NOTSUPP;
  402. if (req->cmd_flags & REQ_FUA)
  403. control |= NVME_RW_FUA;
  404. if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
  405. control |= NVME_RW_LR;
  406. if (req->cmd_flags & REQ_RAHEAD)
  407. dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
  408. memset(cmnd, 0, sizeof(*cmnd));
  409. cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
  410. cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
  411. cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
  412. cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
  413. if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams)
  414. nvme_assign_write_stream(ctrl, req, &control, &dsmgmt);
  415. if (ns->ms) {
  416. switch (ns->pi_type) {
  417. case NVME_NS_DPS_PI_TYPE3:
  418. control |= NVME_RW_PRINFO_PRCHK_GUARD;
  419. break;
  420. case NVME_NS_DPS_PI_TYPE1:
  421. case NVME_NS_DPS_PI_TYPE2:
  422. control |= NVME_RW_PRINFO_PRCHK_GUARD |
  423. NVME_RW_PRINFO_PRCHK_REF;
  424. cmnd->rw.reftag = cpu_to_le32(
  425. nvme_block_nr(ns, blk_rq_pos(req)));
  426. break;
  427. }
  428. if (!blk_integrity_rq(req))
  429. control |= NVME_RW_PRINFO_PRACT;
  430. }
  431. cmnd->rw.control = cpu_to_le16(control);
  432. cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
  433. return 0;
  434. }
  435. blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  436. struct nvme_command *cmd)
  437. {
  438. blk_status_t ret = BLK_STS_OK;
  439. if (!(req->rq_flags & RQF_DONTPREP)) {
  440. nvme_req(req)->retries = 0;
  441. nvme_req(req)->flags = 0;
  442. req->rq_flags |= RQF_DONTPREP;
  443. }
  444. switch (req_op(req)) {
  445. case REQ_OP_DRV_IN:
  446. case REQ_OP_DRV_OUT:
  447. memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
  448. break;
  449. case REQ_OP_FLUSH:
  450. nvme_setup_flush(ns, cmd);
  451. break;
  452. case REQ_OP_WRITE_ZEROES:
  453. /* currently only aliased to deallocate for a few ctrls: */
  454. case REQ_OP_DISCARD:
  455. ret = nvme_setup_discard(ns, req, cmd);
  456. break;
  457. case REQ_OP_READ:
  458. case REQ_OP_WRITE:
  459. ret = nvme_setup_rw(ns, req, cmd);
  460. break;
  461. default:
  462. WARN_ON_ONCE(1);
  463. return BLK_STS_IOERR;
  464. }
  465. cmd->common.command_id = req->tag;
  466. return ret;
  467. }
  468. EXPORT_SYMBOL_GPL(nvme_setup_cmd);
  469. /*
  470. * Returns 0 on success. If the result is negative, it's a Linux error code;
  471. * if the result is positive, it's an NVM Express status code
  472. */
  473. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  474. union nvme_result *result, void *buffer, unsigned bufflen,
  475. unsigned timeout, int qid, int at_head, int flags)
  476. {
  477. struct request *req;
  478. int ret;
  479. req = nvme_alloc_request(q, cmd, flags, qid);
  480. if (IS_ERR(req))
  481. return PTR_ERR(req);
  482. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  483. if (buffer && bufflen) {
  484. ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
  485. if (ret)
  486. goto out;
  487. }
  488. blk_execute_rq(req->q, NULL, req, at_head);
  489. if (result)
  490. *result = nvme_req(req)->result;
  491. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  492. ret = -EINTR;
  493. else
  494. ret = nvme_req(req)->status;
  495. out:
  496. blk_mq_free_request(req);
  497. return ret;
  498. }
  499. EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
  500. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  501. void *buffer, unsigned bufflen)
  502. {
  503. return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
  504. NVME_QID_ANY, 0, 0);
  505. }
  506. EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
  507. static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf,
  508. unsigned len, u32 seed, bool write)
  509. {
  510. struct bio_integrity_payload *bip;
  511. int ret = -ENOMEM;
  512. void *buf;
  513. buf = kmalloc(len, GFP_KERNEL);
  514. if (!buf)
  515. goto out;
  516. ret = -EFAULT;
  517. if (write && copy_from_user(buf, ubuf, len))
  518. goto out_free_meta;
  519. bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
  520. if (IS_ERR(bip)) {
  521. ret = PTR_ERR(bip);
  522. goto out_free_meta;
  523. }
  524. bip->bip_iter.bi_size = len;
  525. bip->bip_iter.bi_sector = seed;
  526. ret = bio_integrity_add_page(bio, virt_to_page(buf), len,
  527. offset_in_page(buf));
  528. if (ret == len)
  529. return buf;
  530. ret = -ENOMEM;
  531. out_free_meta:
  532. kfree(buf);
  533. out:
  534. return ERR_PTR(ret);
  535. }
  536. static int nvme_submit_user_cmd(struct request_queue *q,
  537. struct nvme_command *cmd, void __user *ubuffer,
  538. unsigned bufflen, void __user *meta_buffer, unsigned meta_len,
  539. u32 meta_seed, u32 *result, unsigned timeout)
  540. {
  541. bool write = nvme_is_write(cmd);
  542. struct nvme_ns *ns = q->queuedata;
  543. struct gendisk *disk = ns ? ns->disk : NULL;
  544. struct request *req;
  545. struct bio *bio = NULL;
  546. void *meta = NULL;
  547. int ret;
  548. req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
  549. if (IS_ERR(req))
  550. return PTR_ERR(req);
  551. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  552. if (ubuffer && bufflen) {
  553. ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
  554. GFP_KERNEL);
  555. if (ret)
  556. goto out;
  557. bio = req->bio;
  558. bio->bi_disk = disk;
  559. if (disk && meta_buffer && meta_len) {
  560. meta = nvme_add_user_metadata(bio, meta_buffer, meta_len,
  561. meta_seed, write);
  562. if (IS_ERR(meta)) {
  563. ret = PTR_ERR(meta);
  564. goto out_unmap;
  565. }
  566. req->cmd_flags |= REQ_INTEGRITY;
  567. }
  568. }
  569. blk_execute_rq(req->q, disk, req, 0);
  570. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  571. ret = -EINTR;
  572. else
  573. ret = nvme_req(req)->status;
  574. if (result)
  575. *result = le32_to_cpu(nvme_req(req)->result.u32);
  576. if (meta && !ret && !write) {
  577. if (copy_to_user(meta_buffer, meta, meta_len))
  578. ret = -EFAULT;
  579. }
  580. kfree(meta);
  581. out_unmap:
  582. if (bio)
  583. blk_rq_unmap_user(bio);
  584. out:
  585. blk_mq_free_request(req);
  586. return ret;
  587. }
  588. static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status)
  589. {
  590. struct nvme_ctrl *ctrl = rq->end_io_data;
  591. blk_mq_free_request(rq);
  592. if (status) {
  593. dev_err(ctrl->device,
  594. "failed nvme_keep_alive_end_io error=%d\n",
  595. status);
  596. return;
  597. }
  598. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  599. }
  600. static int nvme_keep_alive(struct nvme_ctrl *ctrl)
  601. {
  602. struct nvme_command c;
  603. struct request *rq;
  604. memset(&c, 0, sizeof(c));
  605. c.common.opcode = nvme_admin_keep_alive;
  606. rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
  607. NVME_QID_ANY);
  608. if (IS_ERR(rq))
  609. return PTR_ERR(rq);
  610. rq->timeout = ctrl->kato * HZ;
  611. rq->end_io_data = ctrl;
  612. blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
  613. return 0;
  614. }
  615. static void nvme_keep_alive_work(struct work_struct *work)
  616. {
  617. struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
  618. struct nvme_ctrl, ka_work);
  619. if (nvme_keep_alive(ctrl)) {
  620. /* allocation failure, reset the controller */
  621. dev_err(ctrl->device, "keep-alive failed\n");
  622. nvme_reset_ctrl(ctrl);
  623. return;
  624. }
  625. }
  626. void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
  627. {
  628. if (unlikely(ctrl->kato == 0))
  629. return;
  630. INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
  631. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  632. }
  633. EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
  634. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
  635. {
  636. if (unlikely(ctrl->kato == 0))
  637. return;
  638. cancel_delayed_work_sync(&ctrl->ka_work);
  639. }
  640. EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
  641. /*
  642. * In NVMe 1.0 the CNS field was just a binary controller or namespace
  643. * flag, thus sending any new CNS opcodes has a big chance of not working.
  644. * Qemu unfortunately had that bug after reporting a 1.1 version compliance
  645. * (but not for any later version).
  646. */
  647. static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
  648. {
  649. if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
  650. return ctrl->vs < NVME_VS(1, 2, 0);
  651. return ctrl->vs < NVME_VS(1, 1, 0);
  652. }
  653. static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
  654. {
  655. struct nvme_command c = { };
  656. int error;
  657. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  658. c.identify.opcode = nvme_admin_identify;
  659. c.identify.cns = NVME_ID_CNS_CTRL;
  660. *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
  661. if (!*id)
  662. return -ENOMEM;
  663. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  664. sizeof(struct nvme_id_ctrl));
  665. if (error)
  666. kfree(*id);
  667. return error;
  668. }
  669. static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid,
  670. u8 *eui64, u8 *nguid, uuid_t *uuid)
  671. {
  672. struct nvme_command c = { };
  673. int status;
  674. void *data;
  675. int pos;
  676. int len;
  677. c.identify.opcode = nvme_admin_identify;
  678. c.identify.nsid = cpu_to_le32(nsid);
  679. c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
  680. data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
  681. if (!data)
  682. return -ENOMEM;
  683. status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
  684. NVME_IDENTIFY_DATA_SIZE);
  685. if (status)
  686. goto free_data;
  687. for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
  688. struct nvme_ns_id_desc *cur = data + pos;
  689. if (cur->nidl == 0)
  690. break;
  691. switch (cur->nidt) {
  692. case NVME_NIDT_EUI64:
  693. if (cur->nidl != NVME_NIDT_EUI64_LEN) {
  694. dev_warn(ctrl->device,
  695. "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n",
  696. cur->nidl);
  697. goto free_data;
  698. }
  699. len = NVME_NIDT_EUI64_LEN;
  700. memcpy(eui64, data + pos + sizeof(*cur), len);
  701. break;
  702. case NVME_NIDT_NGUID:
  703. if (cur->nidl != NVME_NIDT_NGUID_LEN) {
  704. dev_warn(ctrl->device,
  705. "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n",
  706. cur->nidl);
  707. goto free_data;
  708. }
  709. len = NVME_NIDT_NGUID_LEN;
  710. memcpy(nguid, data + pos + sizeof(*cur), len);
  711. break;
  712. case NVME_NIDT_UUID:
  713. if (cur->nidl != NVME_NIDT_UUID_LEN) {
  714. dev_warn(ctrl->device,
  715. "ctrl returned bogus length: %d for NVME_NIDT_UUID\n",
  716. cur->nidl);
  717. goto free_data;
  718. }
  719. len = NVME_NIDT_UUID_LEN;
  720. uuid_copy(uuid, data + pos + sizeof(*cur));
  721. break;
  722. default:
  723. /* Skip unnkown types */
  724. len = cur->nidl;
  725. break;
  726. }
  727. len += sizeof(*cur);
  728. }
  729. free_data:
  730. kfree(data);
  731. return status;
  732. }
  733. static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
  734. {
  735. struct nvme_command c = { };
  736. c.identify.opcode = nvme_admin_identify;
  737. c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
  738. c.identify.nsid = cpu_to_le32(nsid);
  739. return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
  740. }
  741. static struct nvme_id_ns *nvme_identify_ns(struct nvme_ctrl *ctrl,
  742. unsigned nsid)
  743. {
  744. struct nvme_id_ns *id;
  745. struct nvme_command c = { };
  746. int error;
  747. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  748. c.identify.opcode = nvme_admin_identify;
  749. c.identify.nsid = cpu_to_le32(nsid);
  750. c.identify.cns = NVME_ID_CNS_NS;
  751. id = kmalloc(sizeof(*id), GFP_KERNEL);
  752. if (!id)
  753. return NULL;
  754. error = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
  755. if (error) {
  756. dev_warn(ctrl->device, "Identify namespace failed\n");
  757. kfree(id);
  758. return NULL;
  759. }
  760. return id;
  761. }
  762. static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  763. void *buffer, size_t buflen, u32 *result)
  764. {
  765. union nvme_result res = { 0 };
  766. struct nvme_command c;
  767. int ret;
  768. memset(&c, 0, sizeof(c));
  769. c.features.opcode = nvme_admin_set_features;
  770. c.features.fid = cpu_to_le32(fid);
  771. c.features.dword11 = cpu_to_le32(dword11);
  772. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
  773. buffer, buflen, 0, NVME_QID_ANY, 0, 0);
  774. if (ret >= 0 && result)
  775. *result = le32_to_cpu(res.u32);
  776. return ret;
  777. }
  778. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
  779. {
  780. u32 q_count = (*count - 1) | ((*count - 1) << 16);
  781. u32 result;
  782. int status, nr_io_queues;
  783. status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
  784. &result);
  785. if (status < 0)
  786. return status;
  787. /*
  788. * Degraded controllers might return an error when setting the queue
  789. * count. We still want to be able to bring them online and offer
  790. * access to the admin queue, as that might be only way to fix them up.
  791. */
  792. if (status > 0) {
  793. dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
  794. *count = 0;
  795. } else {
  796. nr_io_queues = min(result & 0xffff, result >> 16) + 1;
  797. *count = min(*count, nr_io_queues);
  798. }
  799. return 0;
  800. }
  801. EXPORT_SYMBOL_GPL(nvme_set_queue_count);
  802. static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
  803. {
  804. struct nvme_user_io io;
  805. struct nvme_command c;
  806. unsigned length, meta_len;
  807. void __user *metadata;
  808. if (copy_from_user(&io, uio, sizeof(io)))
  809. return -EFAULT;
  810. if (io.flags)
  811. return -EINVAL;
  812. switch (io.opcode) {
  813. case nvme_cmd_write:
  814. case nvme_cmd_read:
  815. case nvme_cmd_compare:
  816. break;
  817. default:
  818. return -EINVAL;
  819. }
  820. length = (io.nblocks + 1) << ns->lba_shift;
  821. meta_len = (io.nblocks + 1) * ns->ms;
  822. metadata = (void __user *)(uintptr_t)io.metadata;
  823. if (ns->ext) {
  824. length += meta_len;
  825. meta_len = 0;
  826. } else if (meta_len) {
  827. if ((io.metadata & 3) || !io.metadata)
  828. return -EINVAL;
  829. }
  830. memset(&c, 0, sizeof(c));
  831. c.rw.opcode = io.opcode;
  832. c.rw.flags = io.flags;
  833. c.rw.nsid = cpu_to_le32(ns->ns_id);
  834. c.rw.slba = cpu_to_le64(io.slba);
  835. c.rw.length = cpu_to_le16(io.nblocks);
  836. c.rw.control = cpu_to_le16(io.control);
  837. c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
  838. c.rw.reftag = cpu_to_le32(io.reftag);
  839. c.rw.apptag = cpu_to_le16(io.apptag);
  840. c.rw.appmask = cpu_to_le16(io.appmask);
  841. return nvme_submit_user_cmd(ns->queue, &c,
  842. (void __user *)(uintptr_t)io.addr, length,
  843. metadata, meta_len, io.slba, NULL, 0);
  844. }
  845. static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  846. struct nvme_passthru_cmd __user *ucmd)
  847. {
  848. struct nvme_passthru_cmd cmd;
  849. struct nvme_command c;
  850. unsigned timeout = 0;
  851. int status;
  852. if (!capable(CAP_SYS_ADMIN))
  853. return -EACCES;
  854. if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
  855. return -EFAULT;
  856. if (cmd.flags)
  857. return -EINVAL;
  858. memset(&c, 0, sizeof(c));
  859. c.common.opcode = cmd.opcode;
  860. c.common.flags = cmd.flags;
  861. c.common.nsid = cpu_to_le32(cmd.nsid);
  862. c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
  863. c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
  864. c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
  865. c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
  866. c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
  867. c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
  868. c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
  869. c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
  870. if (cmd.timeout_ms)
  871. timeout = msecs_to_jiffies(cmd.timeout_ms);
  872. status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
  873. (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
  874. (void __user *)(uintptr_t)cmd.metadata, cmd.metadata_len,
  875. 0, &cmd.result, timeout);
  876. if (status >= 0) {
  877. if (put_user(cmd.result, &ucmd->result))
  878. return -EFAULT;
  879. }
  880. return status;
  881. }
  882. static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  883. unsigned int cmd, unsigned long arg)
  884. {
  885. struct nvme_ns *ns = bdev->bd_disk->private_data;
  886. switch (cmd) {
  887. case NVME_IOCTL_ID:
  888. force_successful_syscall_return();
  889. return ns->ns_id;
  890. case NVME_IOCTL_ADMIN_CMD:
  891. return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
  892. case NVME_IOCTL_IO_CMD:
  893. return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
  894. case NVME_IOCTL_SUBMIT_IO:
  895. return nvme_submit_io(ns, (void __user *)arg);
  896. default:
  897. if (ns->ndev)
  898. return nvme_nvm_ioctl(ns, cmd, arg);
  899. if (is_sed_ioctl(cmd))
  900. return sed_ioctl(ns->ctrl->opal_dev, cmd,
  901. (void __user *) arg);
  902. return -ENOTTY;
  903. }
  904. }
  905. #ifdef CONFIG_COMPAT
  906. static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
  907. unsigned int cmd, unsigned long arg)
  908. {
  909. return nvme_ioctl(bdev, mode, cmd, arg);
  910. }
  911. #else
  912. #define nvme_compat_ioctl NULL
  913. #endif
  914. static int nvme_open(struct block_device *bdev, fmode_t mode)
  915. {
  916. return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
  917. }
  918. static void nvme_release(struct gendisk *disk, fmode_t mode)
  919. {
  920. struct nvme_ns *ns = disk->private_data;
  921. module_put(ns->ctrl->ops->module);
  922. nvme_put_ns(ns);
  923. }
  924. static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  925. {
  926. /* some standard values */
  927. geo->heads = 1 << 6;
  928. geo->sectors = 1 << 5;
  929. geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
  930. return 0;
  931. }
  932. #ifdef CONFIG_BLK_DEV_INTEGRITY
  933. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  934. u16 bs)
  935. {
  936. struct nvme_ns *ns = disk->private_data;
  937. u16 old_ms = ns->ms;
  938. u8 pi_type = 0;
  939. ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
  940. ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
  941. /* PI implementation requires metadata equal t10 pi tuple size */
  942. if (ns->ms == sizeof(struct t10_pi_tuple))
  943. pi_type = id->dps & NVME_NS_DPS_PI_MASK;
  944. if (blk_get_integrity(disk) &&
  945. (ns->pi_type != pi_type || ns->ms != old_ms ||
  946. bs != queue_logical_block_size(disk->queue) ||
  947. (ns->ms && ns->ext)))
  948. blk_integrity_unregister(disk);
  949. ns->pi_type = pi_type;
  950. }
  951. static void nvme_init_integrity(struct nvme_ns *ns)
  952. {
  953. struct blk_integrity integrity;
  954. memset(&integrity, 0, sizeof(integrity));
  955. switch (ns->pi_type) {
  956. case NVME_NS_DPS_PI_TYPE3:
  957. integrity.profile = &t10_pi_type3_crc;
  958. integrity.tag_size = sizeof(u16) + sizeof(u32);
  959. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  960. break;
  961. case NVME_NS_DPS_PI_TYPE1:
  962. case NVME_NS_DPS_PI_TYPE2:
  963. integrity.profile = &t10_pi_type1_crc;
  964. integrity.tag_size = sizeof(u16);
  965. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  966. break;
  967. default:
  968. integrity.profile = NULL;
  969. break;
  970. }
  971. integrity.tuple_size = ns->ms;
  972. blk_integrity_register(ns->disk, &integrity);
  973. blk_queue_max_integrity_segments(ns->queue, 1);
  974. }
  975. #else
  976. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  977. u16 bs)
  978. {
  979. }
  980. static void nvme_init_integrity(struct nvme_ns *ns)
  981. {
  982. }
  983. #endif /* CONFIG_BLK_DEV_INTEGRITY */
  984. static void nvme_set_chunk_size(struct nvme_ns *ns)
  985. {
  986. u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9));
  987. blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size));
  988. }
  989. static void nvme_config_discard(struct nvme_ns *ns)
  990. {
  991. struct nvme_ctrl *ctrl = ns->ctrl;
  992. u32 logical_block_size = queue_logical_block_size(ns->queue);
  993. BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
  994. NVME_DSM_MAX_RANGES);
  995. if (ctrl->nr_streams && ns->sws && ns->sgs) {
  996. unsigned int sz = logical_block_size * ns->sws * ns->sgs;
  997. ns->queue->limits.discard_alignment = sz;
  998. ns->queue->limits.discard_granularity = sz;
  999. } else {
  1000. ns->queue->limits.discard_alignment = logical_block_size;
  1001. ns->queue->limits.discard_granularity = logical_block_size;
  1002. }
  1003. blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
  1004. blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
  1005. queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
  1006. if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
  1007. blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX);
  1008. }
  1009. static void nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid,
  1010. struct nvme_id_ns *id, u8 *eui64, u8 *nguid, uuid_t *uuid)
  1011. {
  1012. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1013. memcpy(eui64, id->eui64, sizeof(id->eui64));
  1014. if (ctrl->vs >= NVME_VS(1, 2, 0))
  1015. memcpy(nguid, id->nguid, sizeof(id->nguid));
  1016. if (ctrl->vs >= NVME_VS(1, 3, 0)) {
  1017. /* Don't treat error as fatal we potentially
  1018. * already have a NGUID or EUI-64
  1019. */
  1020. if (nvme_identify_ns_descs(ctrl, nsid, eui64, nguid, uuid))
  1021. dev_warn(ctrl->device,
  1022. "%s: Identify Descriptors failed\n", __func__);
  1023. }
  1024. }
  1025. static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
  1026. {
  1027. struct nvme_ns *ns = disk->private_data;
  1028. struct nvme_ctrl *ctrl = ns->ctrl;
  1029. u16 bs;
  1030. /*
  1031. * If identify namespace failed, use default 512 byte block size so
  1032. * block layer can use before failing read/write for 0 capacity.
  1033. */
  1034. ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
  1035. if (ns->lba_shift == 0)
  1036. ns->lba_shift = 9;
  1037. bs = 1 << ns->lba_shift;
  1038. ns->noiob = le16_to_cpu(id->noiob);
  1039. blk_mq_freeze_queue(disk->queue);
  1040. if (ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)
  1041. nvme_prep_integrity(disk, id, bs);
  1042. blk_queue_logical_block_size(ns->queue, bs);
  1043. if (ns->noiob)
  1044. nvme_set_chunk_size(ns);
  1045. if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
  1046. nvme_init_integrity(ns);
  1047. if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
  1048. set_capacity(disk, 0);
  1049. else
  1050. set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
  1051. if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
  1052. nvme_config_discard(ns);
  1053. blk_mq_unfreeze_queue(disk->queue);
  1054. }
  1055. static int nvme_revalidate_disk(struct gendisk *disk)
  1056. {
  1057. struct nvme_ns *ns = disk->private_data;
  1058. struct nvme_ctrl *ctrl = ns->ctrl;
  1059. struct nvme_id_ns *id;
  1060. u8 eui64[8] = { 0 }, nguid[16] = { 0 };
  1061. uuid_t uuid = uuid_null;
  1062. int ret = 0;
  1063. if (test_bit(NVME_NS_DEAD, &ns->flags)) {
  1064. set_capacity(disk, 0);
  1065. return -ENODEV;
  1066. }
  1067. id = nvme_identify_ns(ctrl, ns->ns_id);
  1068. if (!id)
  1069. return -ENODEV;
  1070. if (id->ncap == 0) {
  1071. ret = -ENODEV;
  1072. goto out;
  1073. }
  1074. __nvme_revalidate_disk(disk, id);
  1075. nvme_report_ns_ids(ctrl, ns->ns_id, id, eui64, nguid, &uuid);
  1076. if (!uuid_equal(&ns->uuid, &uuid) ||
  1077. memcmp(&ns->nguid, &nguid, sizeof(ns->nguid)) ||
  1078. memcmp(&ns->eui, &eui64, sizeof(ns->eui))) {
  1079. dev_err(ctrl->device,
  1080. "identifiers changed for nsid %d\n", ns->ns_id);
  1081. ret = -ENODEV;
  1082. }
  1083. out:
  1084. kfree(id);
  1085. return ret;
  1086. }
  1087. static char nvme_pr_type(enum pr_type type)
  1088. {
  1089. switch (type) {
  1090. case PR_WRITE_EXCLUSIVE:
  1091. return 1;
  1092. case PR_EXCLUSIVE_ACCESS:
  1093. return 2;
  1094. case PR_WRITE_EXCLUSIVE_REG_ONLY:
  1095. return 3;
  1096. case PR_EXCLUSIVE_ACCESS_REG_ONLY:
  1097. return 4;
  1098. case PR_WRITE_EXCLUSIVE_ALL_REGS:
  1099. return 5;
  1100. case PR_EXCLUSIVE_ACCESS_ALL_REGS:
  1101. return 6;
  1102. default:
  1103. return 0;
  1104. }
  1105. };
  1106. static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
  1107. u64 key, u64 sa_key, u8 op)
  1108. {
  1109. struct nvme_ns *ns = bdev->bd_disk->private_data;
  1110. struct nvme_command c;
  1111. u8 data[16] = { 0, };
  1112. put_unaligned_le64(key, &data[0]);
  1113. put_unaligned_le64(sa_key, &data[8]);
  1114. memset(&c, 0, sizeof(c));
  1115. c.common.opcode = op;
  1116. c.common.nsid = cpu_to_le32(ns->ns_id);
  1117. c.common.cdw10[0] = cpu_to_le32(cdw10);
  1118. return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
  1119. }
  1120. static int nvme_pr_register(struct block_device *bdev, u64 old,
  1121. u64 new, unsigned flags)
  1122. {
  1123. u32 cdw10;
  1124. if (flags & ~PR_FL_IGNORE_KEY)
  1125. return -EOPNOTSUPP;
  1126. cdw10 = old ? 2 : 0;
  1127. cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
  1128. cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
  1129. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
  1130. }
  1131. static int nvme_pr_reserve(struct block_device *bdev, u64 key,
  1132. enum pr_type type, unsigned flags)
  1133. {
  1134. u32 cdw10;
  1135. if (flags & ~PR_FL_IGNORE_KEY)
  1136. return -EOPNOTSUPP;
  1137. cdw10 = nvme_pr_type(type) << 8;
  1138. cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
  1139. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
  1140. }
  1141. static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
  1142. enum pr_type type, bool abort)
  1143. {
  1144. u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1);
  1145. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
  1146. }
  1147. static int nvme_pr_clear(struct block_device *bdev, u64 key)
  1148. {
  1149. u32 cdw10 = 1 | (key ? 1 << 3 : 0);
  1150. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
  1151. }
  1152. static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
  1153. {
  1154. u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 1 << 3 : 0);
  1155. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
  1156. }
  1157. static const struct pr_ops nvme_pr_ops = {
  1158. .pr_register = nvme_pr_register,
  1159. .pr_reserve = nvme_pr_reserve,
  1160. .pr_release = nvme_pr_release,
  1161. .pr_preempt = nvme_pr_preempt,
  1162. .pr_clear = nvme_pr_clear,
  1163. };
  1164. #ifdef CONFIG_BLK_SED_OPAL
  1165. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  1166. bool send)
  1167. {
  1168. struct nvme_ctrl *ctrl = data;
  1169. struct nvme_command cmd;
  1170. memset(&cmd, 0, sizeof(cmd));
  1171. if (send)
  1172. cmd.common.opcode = nvme_admin_security_send;
  1173. else
  1174. cmd.common.opcode = nvme_admin_security_recv;
  1175. cmd.common.nsid = 0;
  1176. cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
  1177. cmd.common.cdw10[1] = cpu_to_le32(len);
  1178. return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
  1179. ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
  1180. }
  1181. EXPORT_SYMBOL_GPL(nvme_sec_submit);
  1182. #endif /* CONFIG_BLK_SED_OPAL */
  1183. static const struct block_device_operations nvme_fops = {
  1184. .owner = THIS_MODULE,
  1185. .ioctl = nvme_ioctl,
  1186. .compat_ioctl = nvme_compat_ioctl,
  1187. .open = nvme_open,
  1188. .release = nvme_release,
  1189. .getgeo = nvme_getgeo,
  1190. .revalidate_disk= nvme_revalidate_disk,
  1191. .pr_ops = &nvme_pr_ops,
  1192. };
  1193. static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
  1194. {
  1195. unsigned long timeout =
  1196. ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
  1197. u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
  1198. int ret;
  1199. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1200. if (csts == ~0)
  1201. return -ENODEV;
  1202. if ((csts & NVME_CSTS_RDY) == bit)
  1203. break;
  1204. msleep(100);
  1205. if (fatal_signal_pending(current))
  1206. return -EINTR;
  1207. if (time_after(jiffies, timeout)) {
  1208. dev_err(ctrl->device,
  1209. "Device not ready; aborting %s\n", enabled ?
  1210. "initialisation" : "reset");
  1211. return -ENODEV;
  1212. }
  1213. }
  1214. return ret;
  1215. }
  1216. /*
  1217. * If the device has been passed off to us in an enabled state, just clear
  1218. * the enabled bit. The spec says we should set the 'shutdown notification
  1219. * bits', but doing so may cause the device to complete commands to the
  1220. * admin queue ... and we don't know what memory that might be pointing at!
  1221. */
  1222. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1223. {
  1224. int ret;
  1225. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1226. ctrl->ctrl_config &= ~NVME_CC_ENABLE;
  1227. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1228. if (ret)
  1229. return ret;
  1230. if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
  1231. msleep(NVME_QUIRK_DELAY_AMOUNT);
  1232. return nvme_wait_ready(ctrl, cap, false);
  1233. }
  1234. EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
  1235. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1236. {
  1237. /*
  1238. * Default to a 4K page size, with the intention to update this
  1239. * path in the future to accomodate architectures with differing
  1240. * kernel and IO page sizes.
  1241. */
  1242. unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
  1243. int ret;
  1244. if (page_shift < dev_page_min) {
  1245. dev_err(ctrl->device,
  1246. "Minimum device page size %u too large for host (%u)\n",
  1247. 1 << dev_page_min, 1 << page_shift);
  1248. return -ENODEV;
  1249. }
  1250. ctrl->page_size = 1 << page_shift;
  1251. ctrl->ctrl_config = NVME_CC_CSS_NVM;
  1252. ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
  1253. ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
  1254. ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  1255. ctrl->ctrl_config |= NVME_CC_ENABLE;
  1256. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1257. if (ret)
  1258. return ret;
  1259. return nvme_wait_ready(ctrl, cap, true);
  1260. }
  1261. EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
  1262. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
  1263. {
  1264. unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ);
  1265. u32 csts;
  1266. int ret;
  1267. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1268. ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
  1269. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1270. if (ret)
  1271. return ret;
  1272. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1273. if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
  1274. break;
  1275. msleep(100);
  1276. if (fatal_signal_pending(current))
  1277. return -EINTR;
  1278. if (time_after(jiffies, timeout)) {
  1279. dev_err(ctrl->device,
  1280. "Device shutdown incomplete; abort shutdown\n");
  1281. return -ENODEV;
  1282. }
  1283. }
  1284. return ret;
  1285. }
  1286. EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
  1287. static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
  1288. struct request_queue *q)
  1289. {
  1290. bool vwc = false;
  1291. if (ctrl->max_hw_sectors) {
  1292. u32 max_segments =
  1293. (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
  1294. blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
  1295. blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
  1296. }
  1297. if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
  1298. is_power_of_2(ctrl->max_hw_sectors))
  1299. blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
  1300. blk_queue_virt_boundary(q, ctrl->page_size - 1);
  1301. if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
  1302. vwc = true;
  1303. blk_queue_write_cache(q, vwc, vwc);
  1304. }
  1305. static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
  1306. {
  1307. __le64 ts;
  1308. int ret;
  1309. if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
  1310. return 0;
  1311. ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
  1312. ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
  1313. NULL);
  1314. if (ret)
  1315. dev_warn_once(ctrl->device,
  1316. "could not set timestamp (%d)\n", ret);
  1317. return ret;
  1318. }
  1319. static int nvme_configure_apst(struct nvme_ctrl *ctrl)
  1320. {
  1321. /*
  1322. * APST (Autonomous Power State Transition) lets us program a
  1323. * table of power state transitions that the controller will
  1324. * perform automatically. We configure it with a simple
  1325. * heuristic: we are willing to spend at most 2% of the time
  1326. * transitioning between power states. Therefore, when running
  1327. * in any given state, we will enter the next lower-power
  1328. * non-operational state after waiting 50 * (enlat + exlat)
  1329. * microseconds, as long as that state's exit latency is under
  1330. * the requested maximum latency.
  1331. *
  1332. * We will not autonomously enter any non-operational state for
  1333. * which the total latency exceeds ps_max_latency_us. Users
  1334. * can set ps_max_latency_us to zero to turn off APST.
  1335. */
  1336. unsigned apste;
  1337. struct nvme_feat_auto_pst *table;
  1338. u64 max_lat_us = 0;
  1339. int max_ps = -1;
  1340. int ret;
  1341. /*
  1342. * If APST isn't supported or if we haven't been initialized yet,
  1343. * then don't do anything.
  1344. */
  1345. if (!ctrl->apsta)
  1346. return 0;
  1347. if (ctrl->npss > 31) {
  1348. dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
  1349. return 0;
  1350. }
  1351. table = kzalloc(sizeof(*table), GFP_KERNEL);
  1352. if (!table)
  1353. return 0;
  1354. if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
  1355. /* Turn off APST. */
  1356. apste = 0;
  1357. dev_dbg(ctrl->device, "APST disabled\n");
  1358. } else {
  1359. __le64 target = cpu_to_le64(0);
  1360. int state;
  1361. /*
  1362. * Walk through all states from lowest- to highest-power.
  1363. * According to the spec, lower-numbered states use more
  1364. * power. NPSS, despite the name, is the index of the
  1365. * lowest-power state, not the number of states.
  1366. */
  1367. for (state = (int)ctrl->npss; state >= 0; state--) {
  1368. u64 total_latency_us, exit_latency_us, transition_ms;
  1369. if (target)
  1370. table->entries[state] = target;
  1371. /*
  1372. * Don't allow transitions to the deepest state
  1373. * if it's quirked off.
  1374. */
  1375. if (state == ctrl->npss &&
  1376. (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
  1377. continue;
  1378. /*
  1379. * Is this state a useful non-operational state for
  1380. * higher-power states to autonomously transition to?
  1381. */
  1382. if (!(ctrl->psd[state].flags &
  1383. NVME_PS_FLAGS_NON_OP_STATE))
  1384. continue;
  1385. exit_latency_us =
  1386. (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
  1387. if (exit_latency_us > ctrl->ps_max_latency_us)
  1388. continue;
  1389. total_latency_us =
  1390. exit_latency_us +
  1391. le32_to_cpu(ctrl->psd[state].entry_lat);
  1392. /*
  1393. * This state is good. Use it as the APST idle
  1394. * target for higher power states.
  1395. */
  1396. transition_ms = total_latency_us + 19;
  1397. do_div(transition_ms, 20);
  1398. if (transition_ms > (1 << 24) - 1)
  1399. transition_ms = (1 << 24) - 1;
  1400. target = cpu_to_le64((state << 3) |
  1401. (transition_ms << 8));
  1402. if (max_ps == -1)
  1403. max_ps = state;
  1404. if (total_latency_us > max_lat_us)
  1405. max_lat_us = total_latency_us;
  1406. }
  1407. apste = 1;
  1408. if (max_ps == -1) {
  1409. dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
  1410. } else {
  1411. dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
  1412. max_ps, max_lat_us, (int)sizeof(*table), table);
  1413. }
  1414. }
  1415. ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
  1416. table, sizeof(*table), NULL);
  1417. if (ret)
  1418. dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
  1419. kfree(table);
  1420. return ret;
  1421. }
  1422. static void nvme_set_latency_tolerance(struct device *dev, s32 val)
  1423. {
  1424. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1425. u64 latency;
  1426. switch (val) {
  1427. case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
  1428. case PM_QOS_LATENCY_ANY:
  1429. latency = U64_MAX;
  1430. break;
  1431. default:
  1432. latency = val;
  1433. }
  1434. if (ctrl->ps_max_latency_us != latency) {
  1435. ctrl->ps_max_latency_us = latency;
  1436. nvme_configure_apst(ctrl);
  1437. }
  1438. }
  1439. struct nvme_core_quirk_entry {
  1440. /*
  1441. * NVMe model and firmware strings are padded with spaces. For
  1442. * simplicity, strings in the quirk table are padded with NULLs
  1443. * instead.
  1444. */
  1445. u16 vid;
  1446. const char *mn;
  1447. const char *fr;
  1448. unsigned long quirks;
  1449. };
  1450. static const struct nvme_core_quirk_entry core_quirks[] = {
  1451. {
  1452. /*
  1453. * This Toshiba device seems to die using any APST states. See:
  1454. * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
  1455. */
  1456. .vid = 0x1179,
  1457. .mn = "THNSF5256GPUK TOSHIBA",
  1458. .quirks = NVME_QUIRK_NO_APST,
  1459. }
  1460. };
  1461. /* match is null-terminated but idstr is space-padded. */
  1462. static bool string_matches(const char *idstr, const char *match, size_t len)
  1463. {
  1464. size_t matchlen;
  1465. if (!match)
  1466. return true;
  1467. matchlen = strlen(match);
  1468. WARN_ON_ONCE(matchlen > len);
  1469. if (memcmp(idstr, match, matchlen))
  1470. return false;
  1471. for (; matchlen < len; matchlen++)
  1472. if (idstr[matchlen] != ' ')
  1473. return false;
  1474. return true;
  1475. }
  1476. static bool quirk_matches(const struct nvme_id_ctrl *id,
  1477. const struct nvme_core_quirk_entry *q)
  1478. {
  1479. return q->vid == le16_to_cpu(id->vid) &&
  1480. string_matches(id->mn, q->mn, sizeof(id->mn)) &&
  1481. string_matches(id->fr, q->fr, sizeof(id->fr));
  1482. }
  1483. static void nvme_init_subnqn(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
  1484. {
  1485. size_t nqnlen;
  1486. int off;
  1487. nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
  1488. if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
  1489. strcpy(ctrl->subnqn, id->subnqn);
  1490. return;
  1491. }
  1492. if (ctrl->vs >= NVME_VS(1, 2, 1))
  1493. dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
  1494. /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */
  1495. off = snprintf(ctrl->subnqn, NVMF_NQN_SIZE,
  1496. "nqn.2014.08.org.nvmexpress:%4x%4x",
  1497. le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
  1498. memcpy(ctrl->subnqn + off, id->sn, sizeof(id->sn));
  1499. off += sizeof(id->sn);
  1500. memcpy(ctrl->subnqn + off, id->mn, sizeof(id->mn));
  1501. off += sizeof(id->mn);
  1502. memset(ctrl->subnqn + off, 0, sizeof(ctrl->subnqn) - off);
  1503. }
  1504. /*
  1505. * Initialize the cached copies of the Identify data and various controller
  1506. * register in our nvme_ctrl structure. This should be called as soon as
  1507. * the admin queue is fully up and running.
  1508. */
  1509. int nvme_init_identify(struct nvme_ctrl *ctrl)
  1510. {
  1511. struct nvme_id_ctrl *id;
  1512. u64 cap;
  1513. int ret, page_shift;
  1514. u32 max_hw_sectors;
  1515. bool prev_apst_enabled;
  1516. ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
  1517. if (ret) {
  1518. dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
  1519. return ret;
  1520. }
  1521. ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
  1522. if (ret) {
  1523. dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
  1524. return ret;
  1525. }
  1526. page_shift = NVME_CAP_MPSMIN(cap) + 12;
  1527. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1528. ctrl->subsystem = NVME_CAP_NSSRC(cap);
  1529. ret = nvme_identify_ctrl(ctrl, &id);
  1530. if (ret) {
  1531. dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
  1532. return -EIO;
  1533. }
  1534. nvme_init_subnqn(ctrl, id);
  1535. if (!ctrl->identified) {
  1536. /*
  1537. * Check for quirks. Quirk can depend on firmware version,
  1538. * so, in principle, the set of quirks present can change
  1539. * across a reset. As a possible future enhancement, we
  1540. * could re-scan for quirks every time we reinitialize
  1541. * the device, but we'd have to make sure that the driver
  1542. * behaves intelligently if the quirks change.
  1543. */
  1544. int i;
  1545. for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
  1546. if (quirk_matches(id, &core_quirks[i]))
  1547. ctrl->quirks |= core_quirks[i].quirks;
  1548. }
  1549. }
  1550. if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
  1551. dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
  1552. ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
  1553. }
  1554. ctrl->oacs = le16_to_cpu(id->oacs);
  1555. ctrl->vid = le16_to_cpu(id->vid);
  1556. ctrl->oncs = le16_to_cpup(&id->oncs);
  1557. atomic_set(&ctrl->abort_limit, id->acl + 1);
  1558. ctrl->vwc = id->vwc;
  1559. ctrl->cntlid = le16_to_cpup(&id->cntlid);
  1560. memcpy(ctrl->serial, id->sn, sizeof(id->sn));
  1561. memcpy(ctrl->model, id->mn, sizeof(id->mn));
  1562. memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
  1563. if (id->mdts)
  1564. max_hw_sectors = 1 << (id->mdts + page_shift - 9);
  1565. else
  1566. max_hw_sectors = UINT_MAX;
  1567. ctrl->max_hw_sectors =
  1568. min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
  1569. nvme_set_queue_limits(ctrl, ctrl->admin_q);
  1570. ctrl->sgls = le32_to_cpu(id->sgls);
  1571. ctrl->kas = le16_to_cpu(id->kas);
  1572. if (id->rtd3e) {
  1573. /* us -> s */
  1574. u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000;
  1575. ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
  1576. shutdown_timeout, 60);
  1577. if (ctrl->shutdown_timeout != shutdown_timeout)
  1578. dev_warn(ctrl->device,
  1579. "Shutdown timeout set to %u seconds\n",
  1580. ctrl->shutdown_timeout);
  1581. } else
  1582. ctrl->shutdown_timeout = shutdown_timeout;
  1583. ctrl->npss = id->npss;
  1584. ctrl->apsta = id->apsta;
  1585. prev_apst_enabled = ctrl->apst_enabled;
  1586. if (ctrl->quirks & NVME_QUIRK_NO_APST) {
  1587. if (force_apst && id->apsta) {
  1588. dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
  1589. ctrl->apst_enabled = true;
  1590. } else {
  1591. ctrl->apst_enabled = false;
  1592. }
  1593. } else {
  1594. ctrl->apst_enabled = id->apsta;
  1595. }
  1596. memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
  1597. if (ctrl->ops->flags & NVME_F_FABRICS) {
  1598. ctrl->icdoff = le16_to_cpu(id->icdoff);
  1599. ctrl->ioccsz = le32_to_cpu(id->ioccsz);
  1600. ctrl->iorcsz = le32_to_cpu(id->iorcsz);
  1601. ctrl->maxcmd = le16_to_cpu(id->maxcmd);
  1602. /*
  1603. * In fabrics we need to verify the cntlid matches the
  1604. * admin connect
  1605. */
  1606. if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
  1607. ret = -EINVAL;
  1608. goto out_free;
  1609. }
  1610. if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
  1611. dev_err(ctrl->device,
  1612. "keep-alive support is mandatory for fabrics\n");
  1613. ret = -EINVAL;
  1614. goto out_free;
  1615. }
  1616. } else {
  1617. ctrl->cntlid = le16_to_cpu(id->cntlid);
  1618. ctrl->hmpre = le32_to_cpu(id->hmpre);
  1619. ctrl->hmmin = le32_to_cpu(id->hmmin);
  1620. ctrl->hmminds = le32_to_cpu(id->hmminds);
  1621. ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
  1622. }
  1623. kfree(id);
  1624. if (ctrl->apst_enabled && !prev_apst_enabled)
  1625. dev_pm_qos_expose_latency_tolerance(ctrl->device);
  1626. else if (!ctrl->apst_enabled && prev_apst_enabled)
  1627. dev_pm_qos_hide_latency_tolerance(ctrl->device);
  1628. ret = nvme_configure_apst(ctrl);
  1629. if (ret < 0)
  1630. return ret;
  1631. ret = nvme_configure_timestamp(ctrl);
  1632. if (ret < 0)
  1633. return ret;
  1634. ret = nvme_configure_directives(ctrl);
  1635. if (ret < 0)
  1636. return ret;
  1637. ctrl->identified = true;
  1638. return 0;
  1639. out_free:
  1640. kfree(id);
  1641. return ret;
  1642. }
  1643. EXPORT_SYMBOL_GPL(nvme_init_identify);
  1644. static int nvme_dev_open(struct inode *inode, struct file *file)
  1645. {
  1646. struct nvme_ctrl *ctrl;
  1647. int instance = iminor(inode);
  1648. int ret = -ENODEV;
  1649. spin_lock(&dev_list_lock);
  1650. list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
  1651. if (ctrl->instance != instance)
  1652. continue;
  1653. if (!ctrl->admin_q) {
  1654. ret = -EWOULDBLOCK;
  1655. break;
  1656. }
  1657. if (!kref_get_unless_zero(&ctrl->kref))
  1658. break;
  1659. file->private_data = ctrl;
  1660. ret = 0;
  1661. break;
  1662. }
  1663. spin_unlock(&dev_list_lock);
  1664. return ret;
  1665. }
  1666. static int nvme_dev_release(struct inode *inode, struct file *file)
  1667. {
  1668. nvme_put_ctrl(file->private_data);
  1669. return 0;
  1670. }
  1671. static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
  1672. {
  1673. struct nvme_ns *ns;
  1674. int ret;
  1675. mutex_lock(&ctrl->namespaces_mutex);
  1676. if (list_empty(&ctrl->namespaces)) {
  1677. ret = -ENOTTY;
  1678. goto out_unlock;
  1679. }
  1680. ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
  1681. if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
  1682. dev_warn(ctrl->device,
  1683. "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
  1684. ret = -EINVAL;
  1685. goto out_unlock;
  1686. }
  1687. dev_warn(ctrl->device,
  1688. "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
  1689. kref_get(&ns->kref);
  1690. mutex_unlock(&ctrl->namespaces_mutex);
  1691. ret = nvme_user_cmd(ctrl, ns, argp);
  1692. nvme_put_ns(ns);
  1693. return ret;
  1694. out_unlock:
  1695. mutex_unlock(&ctrl->namespaces_mutex);
  1696. return ret;
  1697. }
  1698. static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  1699. unsigned long arg)
  1700. {
  1701. struct nvme_ctrl *ctrl = file->private_data;
  1702. void __user *argp = (void __user *)arg;
  1703. switch (cmd) {
  1704. case NVME_IOCTL_ADMIN_CMD:
  1705. return nvme_user_cmd(ctrl, NULL, argp);
  1706. case NVME_IOCTL_IO_CMD:
  1707. return nvme_dev_user_cmd(ctrl, argp);
  1708. case NVME_IOCTL_RESET:
  1709. dev_warn(ctrl->device, "resetting controller\n");
  1710. return nvme_reset_ctrl_sync(ctrl);
  1711. case NVME_IOCTL_SUBSYS_RESET:
  1712. return nvme_reset_subsystem(ctrl);
  1713. case NVME_IOCTL_RESCAN:
  1714. nvme_queue_scan(ctrl);
  1715. return 0;
  1716. default:
  1717. return -ENOTTY;
  1718. }
  1719. }
  1720. static const struct file_operations nvme_dev_fops = {
  1721. .owner = THIS_MODULE,
  1722. .open = nvme_dev_open,
  1723. .release = nvme_dev_release,
  1724. .unlocked_ioctl = nvme_dev_ioctl,
  1725. .compat_ioctl = nvme_dev_ioctl,
  1726. };
  1727. static ssize_t nvme_sysfs_reset(struct device *dev,
  1728. struct device_attribute *attr, const char *buf,
  1729. size_t count)
  1730. {
  1731. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1732. int ret;
  1733. ret = nvme_reset_ctrl_sync(ctrl);
  1734. if (ret < 0)
  1735. return ret;
  1736. return count;
  1737. }
  1738. static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
  1739. static ssize_t nvme_sysfs_rescan(struct device *dev,
  1740. struct device_attribute *attr, const char *buf,
  1741. size_t count)
  1742. {
  1743. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1744. nvme_queue_scan(ctrl);
  1745. return count;
  1746. }
  1747. static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
  1748. static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
  1749. char *buf)
  1750. {
  1751. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1752. struct nvme_ctrl *ctrl = ns->ctrl;
  1753. int serial_len = sizeof(ctrl->serial);
  1754. int model_len = sizeof(ctrl->model);
  1755. if (!uuid_is_null(&ns->uuid))
  1756. return sprintf(buf, "uuid.%pU\n", &ns->uuid);
  1757. if (memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1758. return sprintf(buf, "eui.%16phN\n", ns->nguid);
  1759. if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1760. return sprintf(buf, "eui.%8phN\n", ns->eui);
  1761. while (serial_len > 0 && (ctrl->serial[serial_len - 1] == ' ' ||
  1762. ctrl->serial[serial_len - 1] == '\0'))
  1763. serial_len--;
  1764. while (model_len > 0 && (ctrl->model[model_len - 1] == ' ' ||
  1765. ctrl->model[model_len - 1] == '\0'))
  1766. model_len--;
  1767. return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
  1768. serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
  1769. }
  1770. static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
  1771. static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
  1772. char *buf)
  1773. {
  1774. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1775. return sprintf(buf, "%pU\n", ns->nguid);
  1776. }
  1777. static DEVICE_ATTR(nguid, S_IRUGO, nguid_show, NULL);
  1778. static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
  1779. char *buf)
  1780. {
  1781. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1782. /* For backward compatibility expose the NGUID to userspace if
  1783. * we have no UUID set
  1784. */
  1785. if (uuid_is_null(&ns->uuid)) {
  1786. printk_ratelimited(KERN_WARNING
  1787. "No UUID available providing old NGUID\n");
  1788. return sprintf(buf, "%pU\n", ns->nguid);
  1789. }
  1790. return sprintf(buf, "%pU\n", &ns->uuid);
  1791. }
  1792. static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
  1793. static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
  1794. char *buf)
  1795. {
  1796. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1797. return sprintf(buf, "%8phd\n", ns->eui);
  1798. }
  1799. static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
  1800. static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
  1801. char *buf)
  1802. {
  1803. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1804. return sprintf(buf, "%d\n", ns->ns_id);
  1805. }
  1806. static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
  1807. static struct attribute *nvme_ns_attrs[] = {
  1808. &dev_attr_wwid.attr,
  1809. &dev_attr_uuid.attr,
  1810. &dev_attr_nguid.attr,
  1811. &dev_attr_eui.attr,
  1812. &dev_attr_nsid.attr,
  1813. NULL,
  1814. };
  1815. static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
  1816. struct attribute *a, int n)
  1817. {
  1818. struct device *dev = container_of(kobj, struct device, kobj);
  1819. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1820. if (a == &dev_attr_uuid.attr) {
  1821. if (uuid_is_null(&ns->uuid) &&
  1822. !memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1823. return 0;
  1824. }
  1825. if (a == &dev_attr_nguid.attr) {
  1826. if (!memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1827. return 0;
  1828. }
  1829. if (a == &dev_attr_eui.attr) {
  1830. if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1831. return 0;
  1832. }
  1833. return a->mode;
  1834. }
  1835. static const struct attribute_group nvme_ns_attr_group = {
  1836. .attrs = nvme_ns_attrs,
  1837. .is_visible = nvme_ns_attrs_are_visible,
  1838. };
  1839. #define nvme_show_str_function(field) \
  1840. static ssize_t field##_show(struct device *dev, \
  1841. struct device_attribute *attr, char *buf) \
  1842. { \
  1843. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1844. return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
  1845. } \
  1846. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1847. #define nvme_show_int_function(field) \
  1848. static ssize_t field##_show(struct device *dev, \
  1849. struct device_attribute *attr, char *buf) \
  1850. { \
  1851. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1852. return sprintf(buf, "%d\n", ctrl->field); \
  1853. } \
  1854. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1855. nvme_show_str_function(model);
  1856. nvme_show_str_function(serial);
  1857. nvme_show_str_function(firmware_rev);
  1858. nvme_show_int_function(cntlid);
  1859. static ssize_t nvme_sysfs_delete(struct device *dev,
  1860. struct device_attribute *attr, const char *buf,
  1861. size_t count)
  1862. {
  1863. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1864. if (device_remove_file_self(dev, attr))
  1865. ctrl->ops->delete_ctrl(ctrl);
  1866. return count;
  1867. }
  1868. static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
  1869. static ssize_t nvme_sysfs_show_transport(struct device *dev,
  1870. struct device_attribute *attr,
  1871. char *buf)
  1872. {
  1873. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1874. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
  1875. }
  1876. static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
  1877. static ssize_t nvme_sysfs_show_state(struct device *dev,
  1878. struct device_attribute *attr,
  1879. char *buf)
  1880. {
  1881. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1882. static const char *const state_name[] = {
  1883. [NVME_CTRL_NEW] = "new",
  1884. [NVME_CTRL_LIVE] = "live",
  1885. [NVME_CTRL_RESETTING] = "resetting",
  1886. [NVME_CTRL_RECONNECTING]= "reconnecting",
  1887. [NVME_CTRL_DELETING] = "deleting",
  1888. [NVME_CTRL_DEAD] = "dead",
  1889. };
  1890. if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
  1891. state_name[ctrl->state])
  1892. return sprintf(buf, "%s\n", state_name[ctrl->state]);
  1893. return sprintf(buf, "unknown state\n");
  1894. }
  1895. static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
  1896. static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
  1897. struct device_attribute *attr,
  1898. char *buf)
  1899. {
  1900. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1901. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subnqn);
  1902. }
  1903. static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
  1904. static ssize_t nvme_sysfs_show_address(struct device *dev,
  1905. struct device_attribute *attr,
  1906. char *buf)
  1907. {
  1908. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1909. return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
  1910. }
  1911. static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
  1912. static struct attribute *nvme_dev_attrs[] = {
  1913. &dev_attr_reset_controller.attr,
  1914. &dev_attr_rescan_controller.attr,
  1915. &dev_attr_model.attr,
  1916. &dev_attr_serial.attr,
  1917. &dev_attr_firmware_rev.attr,
  1918. &dev_attr_cntlid.attr,
  1919. &dev_attr_delete_controller.attr,
  1920. &dev_attr_transport.attr,
  1921. &dev_attr_subsysnqn.attr,
  1922. &dev_attr_address.attr,
  1923. &dev_attr_state.attr,
  1924. NULL
  1925. };
  1926. static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
  1927. struct attribute *a, int n)
  1928. {
  1929. struct device *dev = container_of(kobj, struct device, kobj);
  1930. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1931. if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
  1932. return 0;
  1933. if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
  1934. return 0;
  1935. return a->mode;
  1936. }
  1937. static struct attribute_group nvme_dev_attrs_group = {
  1938. .attrs = nvme_dev_attrs,
  1939. .is_visible = nvme_dev_attrs_are_visible,
  1940. };
  1941. static const struct attribute_group *nvme_dev_attr_groups[] = {
  1942. &nvme_dev_attrs_group,
  1943. NULL,
  1944. };
  1945. static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
  1946. {
  1947. struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
  1948. struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
  1949. return nsa->ns_id - nsb->ns_id;
  1950. }
  1951. static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1952. {
  1953. struct nvme_ns *ns, *ret = NULL;
  1954. mutex_lock(&ctrl->namespaces_mutex);
  1955. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1956. if (ns->ns_id == nsid) {
  1957. if (!kref_get_unless_zero(&ns->kref))
  1958. continue;
  1959. ret = ns;
  1960. break;
  1961. }
  1962. if (ns->ns_id > nsid)
  1963. break;
  1964. }
  1965. mutex_unlock(&ctrl->namespaces_mutex);
  1966. return ret;
  1967. }
  1968. static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns)
  1969. {
  1970. struct streams_directive_params s;
  1971. int ret;
  1972. if (!ctrl->nr_streams)
  1973. return 0;
  1974. ret = nvme_get_stream_params(ctrl, &s, ns->ns_id);
  1975. if (ret)
  1976. return ret;
  1977. ns->sws = le32_to_cpu(s.sws);
  1978. ns->sgs = le16_to_cpu(s.sgs);
  1979. if (ns->sws) {
  1980. unsigned int bs = 1 << ns->lba_shift;
  1981. blk_queue_io_min(ns->queue, bs * ns->sws);
  1982. if (ns->sgs)
  1983. blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs);
  1984. }
  1985. return 0;
  1986. }
  1987. static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1988. {
  1989. struct nvme_ns *ns;
  1990. struct gendisk *disk;
  1991. struct nvme_id_ns *id;
  1992. char disk_name[DISK_NAME_LEN];
  1993. int node = dev_to_node(ctrl->dev);
  1994. ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
  1995. if (!ns)
  1996. return;
  1997. ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
  1998. if (ns->instance < 0)
  1999. goto out_free_ns;
  2000. ns->queue = blk_mq_init_queue(ctrl->tagset);
  2001. if (IS_ERR(ns->queue))
  2002. goto out_release_instance;
  2003. queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
  2004. ns->queue->queuedata = ns;
  2005. ns->ctrl = ctrl;
  2006. kref_init(&ns->kref);
  2007. ns->ns_id = nsid;
  2008. ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
  2009. blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
  2010. nvme_set_queue_limits(ctrl, ns->queue);
  2011. nvme_setup_streams_ns(ctrl, ns);
  2012. sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
  2013. id = nvme_identify_ns(ctrl, nsid);
  2014. if (!id)
  2015. goto out_free_queue;
  2016. if (id->ncap == 0)
  2017. goto out_free_id;
  2018. nvme_report_ns_ids(ctrl, ns->ns_id, id, ns->eui, ns->nguid, &ns->uuid);
  2019. if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) {
  2020. if (nvme_nvm_register(ns, disk_name, node)) {
  2021. dev_warn(ctrl->device, "LightNVM init failure\n");
  2022. goto out_free_id;
  2023. }
  2024. }
  2025. disk = alloc_disk_node(0, node);
  2026. if (!disk)
  2027. goto out_free_id;
  2028. disk->fops = &nvme_fops;
  2029. disk->private_data = ns;
  2030. disk->queue = ns->queue;
  2031. disk->flags = GENHD_FL_EXT_DEVT;
  2032. memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
  2033. ns->disk = disk;
  2034. __nvme_revalidate_disk(disk, id);
  2035. mutex_lock(&ctrl->namespaces_mutex);
  2036. list_add_tail(&ns->list, &ctrl->namespaces);
  2037. mutex_unlock(&ctrl->namespaces_mutex);
  2038. kref_get(&ctrl->kref);
  2039. kfree(id);
  2040. device_add_disk(ctrl->device, ns->disk);
  2041. if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
  2042. &nvme_ns_attr_group))
  2043. pr_warn("%s: failed to create sysfs group for identification\n",
  2044. ns->disk->disk_name);
  2045. if (ns->ndev && nvme_nvm_register_sysfs(ns))
  2046. pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
  2047. ns->disk->disk_name);
  2048. return;
  2049. out_free_id:
  2050. kfree(id);
  2051. out_free_queue:
  2052. blk_cleanup_queue(ns->queue);
  2053. out_release_instance:
  2054. ida_simple_remove(&ctrl->ns_ida, ns->instance);
  2055. out_free_ns:
  2056. kfree(ns);
  2057. }
  2058. static void nvme_ns_remove(struct nvme_ns *ns)
  2059. {
  2060. if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
  2061. return;
  2062. if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
  2063. if (blk_get_integrity(ns->disk))
  2064. blk_integrity_unregister(ns->disk);
  2065. sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
  2066. &nvme_ns_attr_group);
  2067. if (ns->ndev)
  2068. nvme_nvm_unregister_sysfs(ns);
  2069. del_gendisk(ns->disk);
  2070. blk_cleanup_queue(ns->queue);
  2071. }
  2072. mutex_lock(&ns->ctrl->namespaces_mutex);
  2073. list_del_init(&ns->list);
  2074. mutex_unlock(&ns->ctrl->namespaces_mutex);
  2075. nvme_put_ns(ns);
  2076. }
  2077. static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  2078. {
  2079. struct nvme_ns *ns;
  2080. ns = nvme_find_get_ns(ctrl, nsid);
  2081. if (ns) {
  2082. if (ns->disk && revalidate_disk(ns->disk))
  2083. nvme_ns_remove(ns);
  2084. nvme_put_ns(ns);
  2085. } else
  2086. nvme_alloc_ns(ctrl, nsid);
  2087. }
  2088. static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
  2089. unsigned nsid)
  2090. {
  2091. struct nvme_ns *ns, *next;
  2092. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
  2093. if (ns->ns_id > nsid)
  2094. nvme_ns_remove(ns);
  2095. }
  2096. }
  2097. static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
  2098. {
  2099. struct nvme_ns *ns;
  2100. __le32 *ns_list;
  2101. unsigned i, j, nsid, prev = 0;
  2102. unsigned num_lists = DIV_ROUND_UP_ULL((u64)nn, 1024);
  2103. int ret = 0;
  2104. ns_list = kzalloc(0x1000, GFP_KERNEL);
  2105. if (!ns_list)
  2106. return -ENOMEM;
  2107. for (i = 0; i < num_lists; i++) {
  2108. ret = nvme_identify_ns_list(ctrl, prev, ns_list);
  2109. if (ret)
  2110. goto free;
  2111. for (j = 0; j < min(nn, 1024U); j++) {
  2112. nsid = le32_to_cpu(ns_list[j]);
  2113. if (!nsid)
  2114. goto out;
  2115. nvme_validate_ns(ctrl, nsid);
  2116. while (++prev < nsid) {
  2117. ns = nvme_find_get_ns(ctrl, prev);
  2118. if (ns) {
  2119. nvme_ns_remove(ns);
  2120. nvme_put_ns(ns);
  2121. }
  2122. }
  2123. }
  2124. nn -= j;
  2125. }
  2126. out:
  2127. nvme_remove_invalid_namespaces(ctrl, prev);
  2128. free:
  2129. kfree(ns_list);
  2130. return ret;
  2131. }
  2132. static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
  2133. {
  2134. unsigned i;
  2135. for (i = 1; i <= nn; i++)
  2136. nvme_validate_ns(ctrl, i);
  2137. nvme_remove_invalid_namespaces(ctrl, nn);
  2138. }
  2139. static void nvme_scan_work(struct work_struct *work)
  2140. {
  2141. struct nvme_ctrl *ctrl =
  2142. container_of(work, struct nvme_ctrl, scan_work);
  2143. struct nvme_id_ctrl *id;
  2144. unsigned nn;
  2145. if (ctrl->state != NVME_CTRL_LIVE)
  2146. return;
  2147. if (nvme_identify_ctrl(ctrl, &id))
  2148. return;
  2149. nn = le32_to_cpu(id->nn);
  2150. if (!nvme_ctrl_limited_cns(ctrl)) {
  2151. if (!nvme_scan_ns_list(ctrl, nn))
  2152. goto done;
  2153. }
  2154. nvme_scan_ns_sequential(ctrl, nn);
  2155. done:
  2156. mutex_lock(&ctrl->namespaces_mutex);
  2157. list_sort(NULL, &ctrl->namespaces, ns_cmp);
  2158. mutex_unlock(&ctrl->namespaces_mutex);
  2159. kfree(id);
  2160. }
  2161. void nvme_queue_scan(struct nvme_ctrl *ctrl)
  2162. {
  2163. /*
  2164. * Do not queue new scan work when a controller is reset during
  2165. * removal.
  2166. */
  2167. if (ctrl->state == NVME_CTRL_LIVE)
  2168. queue_work(nvme_wq, &ctrl->scan_work);
  2169. }
  2170. EXPORT_SYMBOL_GPL(nvme_queue_scan);
  2171. /*
  2172. * This function iterates the namespace list unlocked to allow recovery from
  2173. * controller failure. It is up to the caller to ensure the namespace list is
  2174. * not modified by scan work while this function is executing.
  2175. */
  2176. void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
  2177. {
  2178. struct nvme_ns *ns, *next;
  2179. /* prevent racing with ns scanning */
  2180. flush_work(&ctrl->scan_work);
  2181. /*
  2182. * The dead states indicates the controller was not gracefully
  2183. * disconnected. In that case, we won't be able to flush any data while
  2184. * removing the namespaces' disks; fail all the queues now to avoid
  2185. * potentially having to clean up the failed sync later.
  2186. */
  2187. if (ctrl->state == NVME_CTRL_DEAD)
  2188. nvme_kill_queues(ctrl);
  2189. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
  2190. nvme_ns_remove(ns);
  2191. }
  2192. EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
  2193. static void nvme_async_event_work(struct work_struct *work)
  2194. {
  2195. struct nvme_ctrl *ctrl =
  2196. container_of(work, struct nvme_ctrl, async_event_work);
  2197. spin_lock_irq(&ctrl->lock);
  2198. while (ctrl->state == NVME_CTRL_LIVE && ctrl->event_limit > 0) {
  2199. int aer_idx = --ctrl->event_limit;
  2200. spin_unlock_irq(&ctrl->lock);
  2201. ctrl->ops->submit_async_event(ctrl, aer_idx);
  2202. spin_lock_irq(&ctrl->lock);
  2203. }
  2204. spin_unlock_irq(&ctrl->lock);
  2205. }
  2206. static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
  2207. {
  2208. u32 csts;
  2209. if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
  2210. return false;
  2211. if (csts == ~0)
  2212. return false;
  2213. return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
  2214. }
  2215. static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
  2216. {
  2217. struct nvme_command c = { };
  2218. struct nvme_fw_slot_info_log *log;
  2219. log = kmalloc(sizeof(*log), GFP_KERNEL);
  2220. if (!log)
  2221. return;
  2222. c.common.opcode = nvme_admin_get_log_page;
  2223. c.common.nsid = cpu_to_le32(NVME_NSID_ALL);
  2224. c.common.cdw10[0] = nvme_get_log_dw10(NVME_LOG_FW_SLOT, sizeof(*log));
  2225. if (!nvme_submit_sync_cmd(ctrl->admin_q, &c, log, sizeof(*log)))
  2226. dev_warn(ctrl->device,
  2227. "Get FW SLOT INFO log error\n");
  2228. kfree(log);
  2229. }
  2230. static void nvme_fw_act_work(struct work_struct *work)
  2231. {
  2232. struct nvme_ctrl *ctrl = container_of(work,
  2233. struct nvme_ctrl, fw_act_work);
  2234. unsigned long fw_act_timeout;
  2235. if (ctrl->mtfa)
  2236. fw_act_timeout = jiffies +
  2237. msecs_to_jiffies(ctrl->mtfa * 100);
  2238. else
  2239. fw_act_timeout = jiffies +
  2240. msecs_to_jiffies(admin_timeout * 1000);
  2241. nvme_stop_queues(ctrl);
  2242. while (nvme_ctrl_pp_status(ctrl)) {
  2243. if (time_after(jiffies, fw_act_timeout)) {
  2244. dev_warn(ctrl->device,
  2245. "Fw activation timeout, reset controller\n");
  2246. nvme_reset_ctrl(ctrl);
  2247. break;
  2248. }
  2249. msleep(100);
  2250. }
  2251. if (ctrl->state != NVME_CTRL_LIVE)
  2252. return;
  2253. nvme_start_queues(ctrl);
  2254. /* read FW slot informationi to clear the AER*/
  2255. nvme_get_fw_slot_info(ctrl);
  2256. }
  2257. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  2258. union nvme_result *res)
  2259. {
  2260. u32 result = le32_to_cpu(res->u32);
  2261. bool done = true;
  2262. switch (le16_to_cpu(status) >> 1) {
  2263. case NVME_SC_SUCCESS:
  2264. done = false;
  2265. /*FALLTHRU*/
  2266. case NVME_SC_ABORT_REQ:
  2267. ++ctrl->event_limit;
  2268. if (ctrl->state == NVME_CTRL_LIVE)
  2269. queue_work(nvme_wq, &ctrl->async_event_work);
  2270. break;
  2271. default:
  2272. break;
  2273. }
  2274. if (done)
  2275. return;
  2276. switch (result & 0xff07) {
  2277. case NVME_AER_NOTICE_NS_CHANGED:
  2278. dev_info(ctrl->device, "rescanning\n");
  2279. nvme_queue_scan(ctrl);
  2280. break;
  2281. case NVME_AER_NOTICE_FW_ACT_STARTING:
  2282. queue_work(nvme_wq, &ctrl->fw_act_work);
  2283. break;
  2284. default:
  2285. dev_warn(ctrl->device, "async event result %08x\n", result);
  2286. }
  2287. }
  2288. EXPORT_SYMBOL_GPL(nvme_complete_async_event);
  2289. void nvme_queue_async_events(struct nvme_ctrl *ctrl)
  2290. {
  2291. ctrl->event_limit = NVME_NR_AERS;
  2292. queue_work(nvme_wq, &ctrl->async_event_work);
  2293. }
  2294. EXPORT_SYMBOL_GPL(nvme_queue_async_events);
  2295. static DEFINE_IDA(nvme_instance_ida);
  2296. static int nvme_set_instance(struct nvme_ctrl *ctrl)
  2297. {
  2298. int instance, error;
  2299. do {
  2300. if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
  2301. return -ENODEV;
  2302. spin_lock(&dev_list_lock);
  2303. error = ida_get_new(&nvme_instance_ida, &instance);
  2304. spin_unlock(&dev_list_lock);
  2305. } while (error == -EAGAIN);
  2306. if (error)
  2307. return -ENODEV;
  2308. ctrl->instance = instance;
  2309. return 0;
  2310. }
  2311. static void nvme_release_instance(struct nvme_ctrl *ctrl)
  2312. {
  2313. spin_lock(&dev_list_lock);
  2314. ida_remove(&nvme_instance_ida, ctrl->instance);
  2315. spin_unlock(&dev_list_lock);
  2316. }
  2317. void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
  2318. {
  2319. nvme_stop_keep_alive(ctrl);
  2320. flush_work(&ctrl->async_event_work);
  2321. cancel_work_sync(&ctrl->fw_act_work);
  2322. }
  2323. EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
  2324. void nvme_start_ctrl(struct nvme_ctrl *ctrl)
  2325. {
  2326. if (ctrl->kato)
  2327. nvme_start_keep_alive(ctrl);
  2328. if (ctrl->queue_count > 1) {
  2329. nvme_queue_scan(ctrl);
  2330. nvme_queue_async_events(ctrl);
  2331. nvme_start_queues(ctrl);
  2332. }
  2333. }
  2334. EXPORT_SYMBOL_GPL(nvme_start_ctrl);
  2335. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
  2336. {
  2337. device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
  2338. spin_lock(&dev_list_lock);
  2339. list_del(&ctrl->node);
  2340. spin_unlock(&dev_list_lock);
  2341. }
  2342. EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
  2343. static void nvme_free_ctrl(struct kref *kref)
  2344. {
  2345. struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
  2346. put_device(ctrl->device);
  2347. nvme_release_instance(ctrl);
  2348. ida_destroy(&ctrl->ns_ida);
  2349. ctrl->ops->free_ctrl(ctrl);
  2350. }
  2351. void nvme_put_ctrl(struct nvme_ctrl *ctrl)
  2352. {
  2353. kref_put(&ctrl->kref, nvme_free_ctrl);
  2354. }
  2355. EXPORT_SYMBOL_GPL(nvme_put_ctrl);
  2356. /*
  2357. * Initialize a NVMe controller structures. This needs to be called during
  2358. * earliest initialization so that we have the initialized structured around
  2359. * during probing.
  2360. */
  2361. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  2362. const struct nvme_ctrl_ops *ops, unsigned long quirks)
  2363. {
  2364. int ret;
  2365. ctrl->state = NVME_CTRL_NEW;
  2366. spin_lock_init(&ctrl->lock);
  2367. INIT_LIST_HEAD(&ctrl->namespaces);
  2368. mutex_init(&ctrl->namespaces_mutex);
  2369. kref_init(&ctrl->kref);
  2370. ctrl->dev = dev;
  2371. ctrl->ops = ops;
  2372. ctrl->quirks = quirks;
  2373. INIT_WORK(&ctrl->scan_work, nvme_scan_work);
  2374. INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
  2375. INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
  2376. ret = nvme_set_instance(ctrl);
  2377. if (ret)
  2378. goto out;
  2379. ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
  2380. MKDEV(nvme_char_major, ctrl->instance),
  2381. ctrl, nvme_dev_attr_groups,
  2382. "nvme%d", ctrl->instance);
  2383. if (IS_ERR(ctrl->device)) {
  2384. ret = PTR_ERR(ctrl->device);
  2385. goto out_release_instance;
  2386. }
  2387. get_device(ctrl->device);
  2388. ida_init(&ctrl->ns_ida);
  2389. spin_lock(&dev_list_lock);
  2390. list_add_tail(&ctrl->node, &nvme_ctrl_list);
  2391. spin_unlock(&dev_list_lock);
  2392. /*
  2393. * Initialize latency tolerance controls. The sysfs files won't
  2394. * be visible to userspace unless the device actually supports APST.
  2395. */
  2396. ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
  2397. dev_pm_qos_update_user_latency_tolerance(ctrl->device,
  2398. min(default_ps_max_latency_us, (unsigned long)S32_MAX));
  2399. return 0;
  2400. out_release_instance:
  2401. nvme_release_instance(ctrl);
  2402. out:
  2403. return ret;
  2404. }
  2405. EXPORT_SYMBOL_GPL(nvme_init_ctrl);
  2406. /**
  2407. * nvme_kill_queues(): Ends all namespace queues
  2408. * @ctrl: the dead controller that needs to end
  2409. *
  2410. * Call this function when the driver determines it is unable to get the
  2411. * controller in a state capable of servicing IO.
  2412. */
  2413. void nvme_kill_queues(struct nvme_ctrl *ctrl)
  2414. {
  2415. struct nvme_ns *ns;
  2416. mutex_lock(&ctrl->namespaces_mutex);
  2417. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2418. if (ctrl->admin_q)
  2419. blk_mq_unquiesce_queue(ctrl->admin_q);
  2420. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2421. /*
  2422. * Revalidating a dead namespace sets capacity to 0. This will
  2423. * end buffered writers dirtying pages that can't be synced.
  2424. */
  2425. if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
  2426. continue;
  2427. revalidate_disk(ns->disk);
  2428. blk_set_queue_dying(ns->queue);
  2429. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2430. blk_mq_unquiesce_queue(ns->queue);
  2431. }
  2432. mutex_unlock(&ctrl->namespaces_mutex);
  2433. }
  2434. EXPORT_SYMBOL_GPL(nvme_kill_queues);
  2435. void nvme_unfreeze(struct nvme_ctrl *ctrl)
  2436. {
  2437. struct nvme_ns *ns;
  2438. mutex_lock(&ctrl->namespaces_mutex);
  2439. list_for_each_entry(ns, &ctrl->namespaces, list)
  2440. blk_mq_unfreeze_queue(ns->queue);
  2441. mutex_unlock(&ctrl->namespaces_mutex);
  2442. }
  2443. EXPORT_SYMBOL_GPL(nvme_unfreeze);
  2444. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
  2445. {
  2446. struct nvme_ns *ns;
  2447. mutex_lock(&ctrl->namespaces_mutex);
  2448. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2449. timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
  2450. if (timeout <= 0)
  2451. break;
  2452. }
  2453. mutex_unlock(&ctrl->namespaces_mutex);
  2454. }
  2455. EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
  2456. void nvme_wait_freeze(struct nvme_ctrl *ctrl)
  2457. {
  2458. struct nvme_ns *ns;
  2459. mutex_lock(&ctrl->namespaces_mutex);
  2460. list_for_each_entry(ns, &ctrl->namespaces, list)
  2461. blk_mq_freeze_queue_wait(ns->queue);
  2462. mutex_unlock(&ctrl->namespaces_mutex);
  2463. }
  2464. EXPORT_SYMBOL_GPL(nvme_wait_freeze);
  2465. void nvme_start_freeze(struct nvme_ctrl *ctrl)
  2466. {
  2467. struct nvme_ns *ns;
  2468. mutex_lock(&ctrl->namespaces_mutex);
  2469. list_for_each_entry(ns, &ctrl->namespaces, list)
  2470. blk_freeze_queue_start(ns->queue);
  2471. mutex_unlock(&ctrl->namespaces_mutex);
  2472. }
  2473. EXPORT_SYMBOL_GPL(nvme_start_freeze);
  2474. void nvme_stop_queues(struct nvme_ctrl *ctrl)
  2475. {
  2476. struct nvme_ns *ns;
  2477. mutex_lock(&ctrl->namespaces_mutex);
  2478. list_for_each_entry(ns, &ctrl->namespaces, list)
  2479. blk_mq_quiesce_queue(ns->queue);
  2480. mutex_unlock(&ctrl->namespaces_mutex);
  2481. }
  2482. EXPORT_SYMBOL_GPL(nvme_stop_queues);
  2483. void nvme_start_queues(struct nvme_ctrl *ctrl)
  2484. {
  2485. struct nvme_ns *ns;
  2486. mutex_lock(&ctrl->namespaces_mutex);
  2487. list_for_each_entry(ns, &ctrl->namespaces, list)
  2488. blk_mq_unquiesce_queue(ns->queue);
  2489. mutex_unlock(&ctrl->namespaces_mutex);
  2490. }
  2491. EXPORT_SYMBOL_GPL(nvme_start_queues);
  2492. int __init nvme_core_init(void)
  2493. {
  2494. int result;
  2495. nvme_wq = alloc_workqueue("nvme-wq",
  2496. WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
  2497. if (!nvme_wq)
  2498. return -ENOMEM;
  2499. result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
  2500. &nvme_dev_fops);
  2501. if (result < 0)
  2502. goto destroy_wq;
  2503. else if (result > 0)
  2504. nvme_char_major = result;
  2505. nvme_class = class_create(THIS_MODULE, "nvme");
  2506. if (IS_ERR(nvme_class)) {
  2507. result = PTR_ERR(nvme_class);
  2508. goto unregister_chrdev;
  2509. }
  2510. return 0;
  2511. unregister_chrdev:
  2512. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2513. destroy_wq:
  2514. destroy_workqueue(nvme_wq);
  2515. return result;
  2516. }
  2517. void nvme_core_exit(void)
  2518. {
  2519. class_destroy(nvme_class);
  2520. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2521. destroy_workqueue(nvme_wq);
  2522. }
  2523. MODULE_LICENSE("GPL");
  2524. MODULE_VERSION("1.0");
  2525. module_init(nvme_core_init);
  2526. module_exit(nvme_core_exit);