region_devs.c 30 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/scatterlist.h>
  14. #include <linux/highmem.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/hash.h>
  18. #include <linux/sort.h>
  19. #include <linux/io.h>
  20. #include <linux/nd.h>
  21. #include "nd-core.h"
  22. #include "nd.h"
  23. /*
  24. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  25. * irrelevant.
  26. */
  27. #include <linux/io-64-nonatomic-hi-lo.h>
  28. static DEFINE_IDA(region_ida);
  29. static DEFINE_PER_CPU(int, flush_idx);
  30. static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
  31. struct nd_region_data *ndrd)
  32. {
  33. int i, j;
  34. dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
  35. nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
  36. for (i = 0; i < (1 << ndrd->hints_shift); i++) {
  37. struct resource *res = &nvdimm->flush_wpq[i];
  38. unsigned long pfn = PHYS_PFN(res->start);
  39. void __iomem *flush_page;
  40. /* check if flush hints share a page */
  41. for (j = 0; j < i; j++) {
  42. struct resource *res_j = &nvdimm->flush_wpq[j];
  43. unsigned long pfn_j = PHYS_PFN(res_j->start);
  44. if (pfn == pfn_j)
  45. break;
  46. }
  47. if (j < i)
  48. flush_page = (void __iomem *) ((unsigned long)
  49. ndrd_get_flush_wpq(ndrd, dimm, j)
  50. & PAGE_MASK);
  51. else
  52. flush_page = devm_nvdimm_ioremap(dev,
  53. PFN_PHYS(pfn), PAGE_SIZE);
  54. if (!flush_page)
  55. return -ENXIO;
  56. ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
  57. + (res->start & ~PAGE_MASK));
  58. }
  59. return 0;
  60. }
  61. int nd_region_activate(struct nd_region *nd_region)
  62. {
  63. int i, j, num_flush = 0;
  64. struct nd_region_data *ndrd;
  65. struct device *dev = &nd_region->dev;
  66. size_t flush_data_size = sizeof(void *);
  67. nvdimm_bus_lock(&nd_region->dev);
  68. for (i = 0; i < nd_region->ndr_mappings; i++) {
  69. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  70. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  71. /* at least one null hint slot per-dimm for the "no-hint" case */
  72. flush_data_size += sizeof(void *);
  73. num_flush = min_not_zero(num_flush, nvdimm->num_flush);
  74. if (!nvdimm->num_flush)
  75. continue;
  76. flush_data_size += nvdimm->num_flush * sizeof(void *);
  77. }
  78. nvdimm_bus_unlock(&nd_region->dev);
  79. ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
  80. if (!ndrd)
  81. return -ENOMEM;
  82. dev_set_drvdata(dev, ndrd);
  83. if (!num_flush)
  84. return 0;
  85. ndrd->hints_shift = ilog2(num_flush);
  86. for (i = 0; i < nd_region->ndr_mappings; i++) {
  87. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  88. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  89. int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
  90. if (rc)
  91. return rc;
  92. }
  93. /*
  94. * Clear out entries that are duplicates. This should prevent the
  95. * extra flushings.
  96. */
  97. for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
  98. /* ignore if NULL already */
  99. if (!ndrd_get_flush_wpq(ndrd, i, 0))
  100. continue;
  101. for (j = i + 1; j < nd_region->ndr_mappings; j++)
  102. if (ndrd_get_flush_wpq(ndrd, i, 0) ==
  103. ndrd_get_flush_wpq(ndrd, j, 0))
  104. ndrd_set_flush_wpq(ndrd, j, 0, NULL);
  105. }
  106. return 0;
  107. }
  108. static void nd_region_release(struct device *dev)
  109. {
  110. struct nd_region *nd_region = to_nd_region(dev);
  111. u16 i;
  112. for (i = 0; i < nd_region->ndr_mappings; i++) {
  113. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  114. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  115. put_device(&nvdimm->dev);
  116. }
  117. free_percpu(nd_region->lane);
  118. ida_simple_remove(&region_ida, nd_region->id);
  119. if (is_nd_blk(dev))
  120. kfree(to_nd_blk_region(dev));
  121. else
  122. kfree(nd_region);
  123. }
  124. static struct device_type nd_blk_device_type = {
  125. .name = "nd_blk",
  126. .release = nd_region_release,
  127. };
  128. static struct device_type nd_pmem_device_type = {
  129. .name = "nd_pmem",
  130. .release = nd_region_release,
  131. };
  132. static struct device_type nd_volatile_device_type = {
  133. .name = "nd_volatile",
  134. .release = nd_region_release,
  135. };
  136. bool is_nd_pmem(struct device *dev)
  137. {
  138. return dev ? dev->type == &nd_pmem_device_type : false;
  139. }
  140. bool is_nd_blk(struct device *dev)
  141. {
  142. return dev ? dev->type == &nd_blk_device_type : false;
  143. }
  144. bool is_nd_volatile(struct device *dev)
  145. {
  146. return dev ? dev->type == &nd_volatile_device_type : false;
  147. }
  148. struct nd_region *to_nd_region(struct device *dev)
  149. {
  150. struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
  151. WARN_ON(dev->type->release != nd_region_release);
  152. return nd_region;
  153. }
  154. EXPORT_SYMBOL_GPL(to_nd_region);
  155. struct nd_blk_region *to_nd_blk_region(struct device *dev)
  156. {
  157. struct nd_region *nd_region = to_nd_region(dev);
  158. WARN_ON(!is_nd_blk(dev));
  159. return container_of(nd_region, struct nd_blk_region, nd_region);
  160. }
  161. EXPORT_SYMBOL_GPL(to_nd_blk_region);
  162. void *nd_region_provider_data(struct nd_region *nd_region)
  163. {
  164. return nd_region->provider_data;
  165. }
  166. EXPORT_SYMBOL_GPL(nd_region_provider_data);
  167. void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
  168. {
  169. return ndbr->blk_provider_data;
  170. }
  171. EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
  172. void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
  173. {
  174. ndbr->blk_provider_data = data;
  175. }
  176. EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
  177. /**
  178. * nd_region_to_nstype() - region to an integer namespace type
  179. * @nd_region: region-device to interrogate
  180. *
  181. * This is the 'nstype' attribute of a region as well, an input to the
  182. * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
  183. * namespace devices with namespace drivers.
  184. */
  185. int nd_region_to_nstype(struct nd_region *nd_region)
  186. {
  187. if (is_memory(&nd_region->dev)) {
  188. u16 i, alias;
  189. for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
  190. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  191. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  192. if (test_bit(NDD_ALIASING, &nvdimm->flags))
  193. alias++;
  194. }
  195. if (alias)
  196. return ND_DEVICE_NAMESPACE_PMEM;
  197. else
  198. return ND_DEVICE_NAMESPACE_IO;
  199. } else if (is_nd_blk(&nd_region->dev)) {
  200. return ND_DEVICE_NAMESPACE_BLK;
  201. }
  202. return 0;
  203. }
  204. EXPORT_SYMBOL(nd_region_to_nstype);
  205. static ssize_t size_show(struct device *dev,
  206. struct device_attribute *attr, char *buf)
  207. {
  208. struct nd_region *nd_region = to_nd_region(dev);
  209. unsigned long long size = 0;
  210. if (is_memory(dev)) {
  211. size = nd_region->ndr_size;
  212. } else if (nd_region->ndr_mappings == 1) {
  213. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  214. size = nd_mapping->size;
  215. }
  216. return sprintf(buf, "%llu\n", size);
  217. }
  218. static DEVICE_ATTR_RO(size);
  219. static ssize_t deep_flush_show(struct device *dev,
  220. struct device_attribute *attr, char *buf)
  221. {
  222. struct nd_region *nd_region = to_nd_region(dev);
  223. /*
  224. * NOTE: in the nvdimm_has_flush() error case this attribute is
  225. * not visible.
  226. */
  227. return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
  228. }
  229. static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
  230. const char *buf, size_t len)
  231. {
  232. bool flush;
  233. int rc = strtobool(buf, &flush);
  234. struct nd_region *nd_region = to_nd_region(dev);
  235. if (rc)
  236. return rc;
  237. if (!flush)
  238. return -EINVAL;
  239. rc = nvdimm_flush(nd_region, NULL);
  240. if (rc)
  241. return rc;
  242. return len;
  243. }
  244. static DEVICE_ATTR_RW(deep_flush);
  245. static ssize_t mappings_show(struct device *dev,
  246. struct device_attribute *attr, char *buf)
  247. {
  248. struct nd_region *nd_region = to_nd_region(dev);
  249. return sprintf(buf, "%d\n", nd_region->ndr_mappings);
  250. }
  251. static DEVICE_ATTR_RO(mappings);
  252. static ssize_t nstype_show(struct device *dev,
  253. struct device_attribute *attr, char *buf)
  254. {
  255. struct nd_region *nd_region = to_nd_region(dev);
  256. return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
  257. }
  258. static DEVICE_ATTR_RO(nstype);
  259. static ssize_t set_cookie_show(struct device *dev,
  260. struct device_attribute *attr, char *buf)
  261. {
  262. struct nd_region *nd_region = to_nd_region(dev);
  263. struct nd_interleave_set *nd_set = nd_region->nd_set;
  264. ssize_t rc = 0;
  265. if (is_memory(dev) && nd_set)
  266. /* pass, should be precluded by region_visible */;
  267. else
  268. return -ENXIO;
  269. /*
  270. * The cookie to show depends on which specification of the
  271. * labels we are using. If there are not labels then default to
  272. * the v1.1 namespace label cookie definition. To read all this
  273. * data we need to wait for probing to settle.
  274. */
  275. device_lock(dev);
  276. nvdimm_bus_lock(dev);
  277. wait_nvdimm_bus_probe_idle(dev);
  278. if (nd_region->ndr_mappings) {
  279. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  280. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  281. if (ndd) {
  282. struct nd_namespace_index *nsindex;
  283. nsindex = to_namespace_index(ndd, ndd->ns_current);
  284. rc = sprintf(buf, "%#llx\n",
  285. nd_region_interleave_set_cookie(nd_region,
  286. nsindex));
  287. }
  288. }
  289. nvdimm_bus_unlock(dev);
  290. device_unlock(dev);
  291. if (rc)
  292. return rc;
  293. return sprintf(buf, "%#llx\n", nd_set->cookie1);
  294. }
  295. static DEVICE_ATTR_RO(set_cookie);
  296. resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
  297. {
  298. resource_size_t blk_max_overlap = 0, available, overlap;
  299. int i;
  300. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  301. retry:
  302. available = 0;
  303. overlap = blk_max_overlap;
  304. for (i = 0; i < nd_region->ndr_mappings; i++) {
  305. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  306. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  307. /* if a dimm is disabled the available capacity is zero */
  308. if (!ndd)
  309. return 0;
  310. if (is_memory(&nd_region->dev)) {
  311. available += nd_pmem_available_dpa(nd_region,
  312. nd_mapping, &overlap);
  313. if (overlap > blk_max_overlap) {
  314. blk_max_overlap = overlap;
  315. goto retry;
  316. }
  317. } else if (is_nd_blk(&nd_region->dev))
  318. available += nd_blk_available_dpa(nd_region);
  319. }
  320. return available;
  321. }
  322. static ssize_t available_size_show(struct device *dev,
  323. struct device_attribute *attr, char *buf)
  324. {
  325. struct nd_region *nd_region = to_nd_region(dev);
  326. unsigned long long available = 0;
  327. /*
  328. * Flush in-flight updates and grab a snapshot of the available
  329. * size. Of course, this value is potentially invalidated the
  330. * memory nvdimm_bus_lock() is dropped, but that's userspace's
  331. * problem to not race itself.
  332. */
  333. nvdimm_bus_lock(dev);
  334. wait_nvdimm_bus_probe_idle(dev);
  335. available = nd_region_available_dpa(nd_region);
  336. nvdimm_bus_unlock(dev);
  337. return sprintf(buf, "%llu\n", available);
  338. }
  339. static DEVICE_ATTR_RO(available_size);
  340. static ssize_t init_namespaces_show(struct device *dev,
  341. struct device_attribute *attr, char *buf)
  342. {
  343. struct nd_region_data *ndrd = dev_get_drvdata(dev);
  344. ssize_t rc;
  345. nvdimm_bus_lock(dev);
  346. if (ndrd)
  347. rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
  348. else
  349. rc = -ENXIO;
  350. nvdimm_bus_unlock(dev);
  351. return rc;
  352. }
  353. static DEVICE_ATTR_RO(init_namespaces);
  354. static ssize_t namespace_seed_show(struct device *dev,
  355. struct device_attribute *attr, char *buf)
  356. {
  357. struct nd_region *nd_region = to_nd_region(dev);
  358. ssize_t rc;
  359. nvdimm_bus_lock(dev);
  360. if (nd_region->ns_seed)
  361. rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
  362. else
  363. rc = sprintf(buf, "\n");
  364. nvdimm_bus_unlock(dev);
  365. return rc;
  366. }
  367. static DEVICE_ATTR_RO(namespace_seed);
  368. static ssize_t btt_seed_show(struct device *dev,
  369. struct device_attribute *attr, char *buf)
  370. {
  371. struct nd_region *nd_region = to_nd_region(dev);
  372. ssize_t rc;
  373. nvdimm_bus_lock(dev);
  374. if (nd_region->btt_seed)
  375. rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
  376. else
  377. rc = sprintf(buf, "\n");
  378. nvdimm_bus_unlock(dev);
  379. return rc;
  380. }
  381. static DEVICE_ATTR_RO(btt_seed);
  382. static ssize_t pfn_seed_show(struct device *dev,
  383. struct device_attribute *attr, char *buf)
  384. {
  385. struct nd_region *nd_region = to_nd_region(dev);
  386. ssize_t rc;
  387. nvdimm_bus_lock(dev);
  388. if (nd_region->pfn_seed)
  389. rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
  390. else
  391. rc = sprintf(buf, "\n");
  392. nvdimm_bus_unlock(dev);
  393. return rc;
  394. }
  395. static DEVICE_ATTR_RO(pfn_seed);
  396. static ssize_t dax_seed_show(struct device *dev,
  397. struct device_attribute *attr, char *buf)
  398. {
  399. struct nd_region *nd_region = to_nd_region(dev);
  400. ssize_t rc;
  401. nvdimm_bus_lock(dev);
  402. if (nd_region->dax_seed)
  403. rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
  404. else
  405. rc = sprintf(buf, "\n");
  406. nvdimm_bus_unlock(dev);
  407. return rc;
  408. }
  409. static DEVICE_ATTR_RO(dax_seed);
  410. static ssize_t read_only_show(struct device *dev,
  411. struct device_attribute *attr, char *buf)
  412. {
  413. struct nd_region *nd_region = to_nd_region(dev);
  414. return sprintf(buf, "%d\n", nd_region->ro);
  415. }
  416. static ssize_t read_only_store(struct device *dev,
  417. struct device_attribute *attr, const char *buf, size_t len)
  418. {
  419. bool ro;
  420. int rc = strtobool(buf, &ro);
  421. struct nd_region *nd_region = to_nd_region(dev);
  422. if (rc)
  423. return rc;
  424. nd_region->ro = ro;
  425. return len;
  426. }
  427. static DEVICE_ATTR_RW(read_only);
  428. static ssize_t region_badblocks_show(struct device *dev,
  429. struct device_attribute *attr, char *buf)
  430. {
  431. struct nd_region *nd_region = to_nd_region(dev);
  432. ssize_t rc;
  433. device_lock(dev);
  434. if (dev->driver)
  435. rc = badblocks_show(&nd_region->bb, buf, 0);
  436. else
  437. rc = -ENXIO;
  438. device_unlock(dev);
  439. return rc;
  440. }
  441. static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
  442. static ssize_t resource_show(struct device *dev,
  443. struct device_attribute *attr, char *buf)
  444. {
  445. struct nd_region *nd_region = to_nd_region(dev);
  446. return sprintf(buf, "%#llx\n", nd_region->ndr_start);
  447. }
  448. static DEVICE_ATTR_RO(resource);
  449. static struct attribute *nd_region_attributes[] = {
  450. &dev_attr_size.attr,
  451. &dev_attr_nstype.attr,
  452. &dev_attr_mappings.attr,
  453. &dev_attr_btt_seed.attr,
  454. &dev_attr_pfn_seed.attr,
  455. &dev_attr_dax_seed.attr,
  456. &dev_attr_deep_flush.attr,
  457. &dev_attr_read_only.attr,
  458. &dev_attr_set_cookie.attr,
  459. &dev_attr_available_size.attr,
  460. &dev_attr_namespace_seed.attr,
  461. &dev_attr_init_namespaces.attr,
  462. &dev_attr_badblocks.attr,
  463. &dev_attr_resource.attr,
  464. NULL,
  465. };
  466. static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
  467. {
  468. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  469. struct nd_region *nd_region = to_nd_region(dev);
  470. struct nd_interleave_set *nd_set = nd_region->nd_set;
  471. int type = nd_region_to_nstype(nd_region);
  472. if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
  473. return 0;
  474. if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
  475. return 0;
  476. if (!is_nd_pmem(dev) && a == &dev_attr_badblocks.attr)
  477. return 0;
  478. if (a == &dev_attr_resource.attr) {
  479. if (is_nd_pmem(dev))
  480. return 0400;
  481. else
  482. return 0;
  483. }
  484. if (a == &dev_attr_deep_flush.attr) {
  485. int has_flush = nvdimm_has_flush(nd_region);
  486. if (has_flush == 1)
  487. return a->mode;
  488. else if (has_flush == 0)
  489. return 0444;
  490. else
  491. return 0;
  492. }
  493. if (a != &dev_attr_set_cookie.attr
  494. && a != &dev_attr_available_size.attr)
  495. return a->mode;
  496. if ((type == ND_DEVICE_NAMESPACE_PMEM
  497. || type == ND_DEVICE_NAMESPACE_BLK)
  498. && a == &dev_attr_available_size.attr)
  499. return a->mode;
  500. else if (is_memory(dev) && nd_set)
  501. return a->mode;
  502. return 0;
  503. }
  504. struct attribute_group nd_region_attribute_group = {
  505. .attrs = nd_region_attributes,
  506. .is_visible = region_visible,
  507. };
  508. EXPORT_SYMBOL_GPL(nd_region_attribute_group);
  509. u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
  510. struct nd_namespace_index *nsindex)
  511. {
  512. struct nd_interleave_set *nd_set = nd_region->nd_set;
  513. if (!nd_set)
  514. return 0;
  515. if (nsindex && __le16_to_cpu(nsindex->major) == 1
  516. && __le16_to_cpu(nsindex->minor) == 1)
  517. return nd_set->cookie1;
  518. return nd_set->cookie2;
  519. }
  520. u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
  521. {
  522. struct nd_interleave_set *nd_set = nd_region->nd_set;
  523. if (nd_set)
  524. return nd_set->altcookie;
  525. return 0;
  526. }
  527. void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
  528. {
  529. struct nd_label_ent *label_ent, *e;
  530. lockdep_assert_held(&nd_mapping->lock);
  531. list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
  532. list_del(&label_ent->list);
  533. kfree(label_ent);
  534. }
  535. }
  536. /*
  537. * Upon successful probe/remove, take/release a reference on the
  538. * associated interleave set (if present), and plant new btt + namespace
  539. * seeds. Also, on the removal of a BLK region, notify the provider to
  540. * disable the region.
  541. */
  542. static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
  543. struct device *dev, bool probe)
  544. {
  545. struct nd_region *nd_region;
  546. if (!probe && is_nd_region(dev)) {
  547. int i;
  548. nd_region = to_nd_region(dev);
  549. for (i = 0; i < nd_region->ndr_mappings; i++) {
  550. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  551. struct nvdimm_drvdata *ndd = nd_mapping->ndd;
  552. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  553. mutex_lock(&nd_mapping->lock);
  554. nd_mapping_free_labels(nd_mapping);
  555. mutex_unlock(&nd_mapping->lock);
  556. put_ndd(ndd);
  557. nd_mapping->ndd = NULL;
  558. if (ndd)
  559. atomic_dec(&nvdimm->busy);
  560. }
  561. }
  562. if (dev->parent && is_nd_region(dev->parent) && probe) {
  563. nd_region = to_nd_region(dev->parent);
  564. nvdimm_bus_lock(dev);
  565. if (nd_region->ns_seed == dev)
  566. nd_region_create_ns_seed(nd_region);
  567. nvdimm_bus_unlock(dev);
  568. }
  569. if (is_nd_btt(dev) && probe) {
  570. struct nd_btt *nd_btt = to_nd_btt(dev);
  571. nd_region = to_nd_region(dev->parent);
  572. nvdimm_bus_lock(dev);
  573. if (nd_region->btt_seed == dev)
  574. nd_region_create_btt_seed(nd_region);
  575. if (nd_region->ns_seed == &nd_btt->ndns->dev)
  576. nd_region_create_ns_seed(nd_region);
  577. nvdimm_bus_unlock(dev);
  578. }
  579. if (is_nd_pfn(dev) && probe) {
  580. struct nd_pfn *nd_pfn = to_nd_pfn(dev);
  581. nd_region = to_nd_region(dev->parent);
  582. nvdimm_bus_lock(dev);
  583. if (nd_region->pfn_seed == dev)
  584. nd_region_create_pfn_seed(nd_region);
  585. if (nd_region->ns_seed == &nd_pfn->ndns->dev)
  586. nd_region_create_ns_seed(nd_region);
  587. nvdimm_bus_unlock(dev);
  588. }
  589. if (is_nd_dax(dev) && probe) {
  590. struct nd_dax *nd_dax = to_nd_dax(dev);
  591. nd_region = to_nd_region(dev->parent);
  592. nvdimm_bus_lock(dev);
  593. if (nd_region->dax_seed == dev)
  594. nd_region_create_dax_seed(nd_region);
  595. if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
  596. nd_region_create_ns_seed(nd_region);
  597. nvdimm_bus_unlock(dev);
  598. }
  599. }
  600. void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  601. {
  602. nd_region_notify_driver_action(nvdimm_bus, dev, true);
  603. }
  604. void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  605. {
  606. nd_region_notify_driver_action(nvdimm_bus, dev, false);
  607. }
  608. static ssize_t mappingN(struct device *dev, char *buf, int n)
  609. {
  610. struct nd_region *nd_region = to_nd_region(dev);
  611. struct nd_mapping *nd_mapping;
  612. struct nvdimm *nvdimm;
  613. if (n >= nd_region->ndr_mappings)
  614. return -ENXIO;
  615. nd_mapping = &nd_region->mapping[n];
  616. nvdimm = nd_mapping->nvdimm;
  617. return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
  618. nd_mapping->start, nd_mapping->size,
  619. nd_mapping->position);
  620. }
  621. #define REGION_MAPPING(idx) \
  622. static ssize_t mapping##idx##_show(struct device *dev, \
  623. struct device_attribute *attr, char *buf) \
  624. { \
  625. return mappingN(dev, buf, idx); \
  626. } \
  627. static DEVICE_ATTR_RO(mapping##idx)
  628. /*
  629. * 32 should be enough for a while, even in the presence of socket
  630. * interleave a 32-way interleave set is a degenerate case.
  631. */
  632. REGION_MAPPING(0);
  633. REGION_MAPPING(1);
  634. REGION_MAPPING(2);
  635. REGION_MAPPING(3);
  636. REGION_MAPPING(4);
  637. REGION_MAPPING(5);
  638. REGION_MAPPING(6);
  639. REGION_MAPPING(7);
  640. REGION_MAPPING(8);
  641. REGION_MAPPING(9);
  642. REGION_MAPPING(10);
  643. REGION_MAPPING(11);
  644. REGION_MAPPING(12);
  645. REGION_MAPPING(13);
  646. REGION_MAPPING(14);
  647. REGION_MAPPING(15);
  648. REGION_MAPPING(16);
  649. REGION_MAPPING(17);
  650. REGION_MAPPING(18);
  651. REGION_MAPPING(19);
  652. REGION_MAPPING(20);
  653. REGION_MAPPING(21);
  654. REGION_MAPPING(22);
  655. REGION_MAPPING(23);
  656. REGION_MAPPING(24);
  657. REGION_MAPPING(25);
  658. REGION_MAPPING(26);
  659. REGION_MAPPING(27);
  660. REGION_MAPPING(28);
  661. REGION_MAPPING(29);
  662. REGION_MAPPING(30);
  663. REGION_MAPPING(31);
  664. static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
  665. {
  666. struct device *dev = container_of(kobj, struct device, kobj);
  667. struct nd_region *nd_region = to_nd_region(dev);
  668. if (n < nd_region->ndr_mappings)
  669. return a->mode;
  670. return 0;
  671. }
  672. static struct attribute *mapping_attributes[] = {
  673. &dev_attr_mapping0.attr,
  674. &dev_attr_mapping1.attr,
  675. &dev_attr_mapping2.attr,
  676. &dev_attr_mapping3.attr,
  677. &dev_attr_mapping4.attr,
  678. &dev_attr_mapping5.attr,
  679. &dev_attr_mapping6.attr,
  680. &dev_attr_mapping7.attr,
  681. &dev_attr_mapping8.attr,
  682. &dev_attr_mapping9.attr,
  683. &dev_attr_mapping10.attr,
  684. &dev_attr_mapping11.attr,
  685. &dev_attr_mapping12.attr,
  686. &dev_attr_mapping13.attr,
  687. &dev_attr_mapping14.attr,
  688. &dev_attr_mapping15.attr,
  689. &dev_attr_mapping16.attr,
  690. &dev_attr_mapping17.attr,
  691. &dev_attr_mapping18.attr,
  692. &dev_attr_mapping19.attr,
  693. &dev_attr_mapping20.attr,
  694. &dev_attr_mapping21.attr,
  695. &dev_attr_mapping22.attr,
  696. &dev_attr_mapping23.attr,
  697. &dev_attr_mapping24.attr,
  698. &dev_attr_mapping25.attr,
  699. &dev_attr_mapping26.attr,
  700. &dev_attr_mapping27.attr,
  701. &dev_attr_mapping28.attr,
  702. &dev_attr_mapping29.attr,
  703. &dev_attr_mapping30.attr,
  704. &dev_attr_mapping31.attr,
  705. NULL,
  706. };
  707. struct attribute_group nd_mapping_attribute_group = {
  708. .is_visible = mapping_visible,
  709. .attrs = mapping_attributes,
  710. };
  711. EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
  712. int nd_blk_region_init(struct nd_region *nd_region)
  713. {
  714. struct device *dev = &nd_region->dev;
  715. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  716. if (!is_nd_blk(dev))
  717. return 0;
  718. if (nd_region->ndr_mappings < 1) {
  719. dev_dbg(dev, "invalid BLK region\n");
  720. return -ENXIO;
  721. }
  722. return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
  723. }
  724. /**
  725. * nd_region_acquire_lane - allocate and lock a lane
  726. * @nd_region: region id and number of lanes possible
  727. *
  728. * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
  729. * We optimize for the common case where there are 256 lanes, one
  730. * per-cpu. For larger systems we need to lock to share lanes. For now
  731. * this implementation assumes the cost of maintaining an allocator for
  732. * free lanes is on the order of the lock hold time, so it implements a
  733. * static lane = cpu % num_lanes mapping.
  734. *
  735. * In the case of a BTT instance on top of a BLK namespace a lane may be
  736. * acquired recursively. We lock on the first instance.
  737. *
  738. * In the case of a BTT instance on top of PMEM, we only acquire a lane
  739. * for the BTT metadata updates.
  740. */
  741. unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
  742. {
  743. unsigned int cpu, lane;
  744. cpu = get_cpu();
  745. if (nd_region->num_lanes < nr_cpu_ids) {
  746. struct nd_percpu_lane *ndl_lock, *ndl_count;
  747. lane = cpu % nd_region->num_lanes;
  748. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  749. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  750. if (ndl_count->count++ == 0)
  751. spin_lock(&ndl_lock->lock);
  752. } else
  753. lane = cpu;
  754. return lane;
  755. }
  756. EXPORT_SYMBOL(nd_region_acquire_lane);
  757. void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
  758. {
  759. if (nd_region->num_lanes < nr_cpu_ids) {
  760. unsigned int cpu = get_cpu();
  761. struct nd_percpu_lane *ndl_lock, *ndl_count;
  762. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  763. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  764. if (--ndl_count->count == 0)
  765. spin_unlock(&ndl_lock->lock);
  766. put_cpu();
  767. }
  768. put_cpu();
  769. }
  770. EXPORT_SYMBOL(nd_region_release_lane);
  771. static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
  772. struct nd_region_desc *ndr_desc, struct device_type *dev_type,
  773. const char *caller)
  774. {
  775. struct nd_region *nd_region;
  776. struct device *dev;
  777. void *region_buf;
  778. unsigned int i;
  779. int ro = 0;
  780. for (i = 0; i < ndr_desc->num_mappings; i++) {
  781. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  782. struct nvdimm *nvdimm = mapping->nvdimm;
  783. if ((mapping->start | mapping->size) % SZ_4K) {
  784. dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
  785. caller, dev_name(&nvdimm->dev), i);
  786. return NULL;
  787. }
  788. if (test_bit(NDD_UNARMED, &nvdimm->flags))
  789. ro = 1;
  790. }
  791. if (dev_type == &nd_blk_device_type) {
  792. struct nd_blk_region_desc *ndbr_desc;
  793. struct nd_blk_region *ndbr;
  794. ndbr_desc = to_blk_region_desc(ndr_desc);
  795. ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
  796. * ndr_desc->num_mappings,
  797. GFP_KERNEL);
  798. if (ndbr) {
  799. nd_region = &ndbr->nd_region;
  800. ndbr->enable = ndbr_desc->enable;
  801. ndbr->do_io = ndbr_desc->do_io;
  802. }
  803. region_buf = ndbr;
  804. } else {
  805. nd_region = kzalloc(sizeof(struct nd_region)
  806. + sizeof(struct nd_mapping)
  807. * ndr_desc->num_mappings,
  808. GFP_KERNEL);
  809. region_buf = nd_region;
  810. }
  811. if (!region_buf)
  812. return NULL;
  813. nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
  814. if (nd_region->id < 0)
  815. goto err_id;
  816. nd_region->lane = alloc_percpu(struct nd_percpu_lane);
  817. if (!nd_region->lane)
  818. goto err_percpu;
  819. for (i = 0; i < nr_cpu_ids; i++) {
  820. struct nd_percpu_lane *ndl;
  821. ndl = per_cpu_ptr(nd_region->lane, i);
  822. spin_lock_init(&ndl->lock);
  823. ndl->count = 0;
  824. }
  825. for (i = 0; i < ndr_desc->num_mappings; i++) {
  826. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  827. struct nvdimm *nvdimm = mapping->nvdimm;
  828. nd_region->mapping[i].nvdimm = nvdimm;
  829. nd_region->mapping[i].start = mapping->start;
  830. nd_region->mapping[i].size = mapping->size;
  831. nd_region->mapping[i].position = mapping->position;
  832. INIT_LIST_HEAD(&nd_region->mapping[i].labels);
  833. mutex_init(&nd_region->mapping[i].lock);
  834. get_device(&nvdimm->dev);
  835. }
  836. nd_region->ndr_mappings = ndr_desc->num_mappings;
  837. nd_region->provider_data = ndr_desc->provider_data;
  838. nd_region->nd_set = ndr_desc->nd_set;
  839. nd_region->num_lanes = ndr_desc->num_lanes;
  840. nd_region->flags = ndr_desc->flags;
  841. nd_region->ro = ro;
  842. nd_region->numa_node = ndr_desc->numa_node;
  843. ida_init(&nd_region->ns_ida);
  844. ida_init(&nd_region->btt_ida);
  845. ida_init(&nd_region->pfn_ida);
  846. ida_init(&nd_region->dax_ida);
  847. dev = &nd_region->dev;
  848. dev_set_name(dev, "region%d", nd_region->id);
  849. dev->parent = &nvdimm_bus->dev;
  850. dev->type = dev_type;
  851. dev->groups = ndr_desc->attr_groups;
  852. dev->of_node = ndr_desc->of_node;
  853. nd_region->ndr_size = resource_size(ndr_desc->res);
  854. nd_region->ndr_start = ndr_desc->res->start;
  855. if (ndr_desc->flush)
  856. nd_region->flush = ndr_desc->flush;
  857. else
  858. nd_region->flush = NULL;
  859. nd_device_register(dev);
  860. return nd_region;
  861. err_percpu:
  862. ida_simple_remove(&region_ida, nd_region->id);
  863. err_id:
  864. kfree(region_buf);
  865. return NULL;
  866. }
  867. struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
  868. struct nd_region_desc *ndr_desc)
  869. {
  870. ndr_desc->num_lanes = ND_MAX_LANES;
  871. return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
  872. __func__);
  873. }
  874. EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
  875. struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
  876. struct nd_region_desc *ndr_desc)
  877. {
  878. if (ndr_desc->num_mappings > 1)
  879. return NULL;
  880. ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
  881. return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
  882. __func__);
  883. }
  884. EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
  885. struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
  886. struct nd_region_desc *ndr_desc)
  887. {
  888. ndr_desc->num_lanes = ND_MAX_LANES;
  889. return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
  890. __func__);
  891. }
  892. EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
  893. int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
  894. {
  895. int rc = 0;
  896. if (!nd_region->flush)
  897. rc = generic_nvdimm_flush(nd_region);
  898. else {
  899. if (nd_region->flush(nd_region, bio))
  900. rc = -EIO;
  901. }
  902. return rc;
  903. }
  904. /**
  905. * nvdimm_flush - flush any posted write queues between the cpu and pmem media
  906. * @nd_region: blk or interleaved pmem region
  907. */
  908. int generic_nvdimm_flush(struct nd_region *nd_region)
  909. {
  910. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  911. int i, idx;
  912. /*
  913. * Try to encourage some diversity in flush hint addresses
  914. * across cpus assuming a limited number of flush hints.
  915. */
  916. idx = this_cpu_read(flush_idx);
  917. idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
  918. /*
  919. * The first wmb() is needed to 'sfence' all previous writes
  920. * such that they are architecturally visible for the platform
  921. * buffer flush. Note that we've already arranged for pmem
  922. * writes to avoid the cache via memcpy_flushcache(). The final
  923. * wmb() ensures ordering for the NVDIMM flush write.
  924. */
  925. wmb();
  926. for (i = 0; i < nd_region->ndr_mappings; i++)
  927. if (ndrd_get_flush_wpq(ndrd, i, 0))
  928. writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
  929. wmb();
  930. return 0;
  931. }
  932. EXPORT_SYMBOL_GPL(nvdimm_flush);
  933. /**
  934. * nvdimm_has_flush - determine write flushing requirements
  935. * @nd_region: blk or interleaved pmem region
  936. *
  937. * Returns 1 if writes require flushing
  938. * Returns 0 if writes do not require flushing
  939. * Returns -ENXIO if flushing capability can not be determined
  940. */
  941. int nvdimm_has_flush(struct nd_region *nd_region)
  942. {
  943. int i;
  944. /* no nvdimm or pmem api == flushing capability unknown */
  945. if (nd_region->ndr_mappings == 0
  946. || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
  947. return -ENXIO;
  948. for (i = 0; i < nd_region->ndr_mappings; i++) {
  949. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  950. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  951. /* flush hints present / available */
  952. if (nvdimm->num_flush)
  953. return 1;
  954. }
  955. /*
  956. * The platform defines dimm devices without hints, assume
  957. * platform persistence mechanism like ADR
  958. */
  959. return 0;
  960. }
  961. EXPORT_SYMBOL_GPL(nvdimm_has_flush);
  962. int nvdimm_has_cache(struct nd_region *nd_region)
  963. {
  964. return is_nd_pmem(&nd_region->dev);
  965. }
  966. EXPORT_SYMBOL_GPL(nvdimm_has_cache);
  967. struct conflict_context {
  968. struct nd_region *nd_region;
  969. resource_size_t start, size;
  970. };
  971. static int region_conflict(struct device *dev, void *data)
  972. {
  973. struct nd_region *nd_region;
  974. struct conflict_context *ctx = data;
  975. resource_size_t res_end, region_end, region_start;
  976. if (!is_memory(dev))
  977. return 0;
  978. nd_region = to_nd_region(dev);
  979. if (nd_region == ctx->nd_region)
  980. return 0;
  981. res_end = ctx->start + ctx->size;
  982. region_start = nd_region->ndr_start;
  983. region_end = region_start + nd_region->ndr_size;
  984. if (ctx->start >= region_start && ctx->start < region_end)
  985. return -EBUSY;
  986. if (res_end > region_start && res_end <= region_end)
  987. return -EBUSY;
  988. return 0;
  989. }
  990. int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
  991. resource_size_t size)
  992. {
  993. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
  994. struct conflict_context ctx = {
  995. .nd_region = nd_region,
  996. .start = start,
  997. .size = size,
  998. };
  999. return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);
  1000. }
  1001. void __exit nd_region_devs_exit(void)
  1002. {
  1003. ida_destroy(&region_ida);
  1004. }