tx.c 37 KB

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  1. /*
  2. * Intel Wireless WiMAX Connection 2400m
  3. * Generic (non-bus specific) TX handling
  4. *
  5. *
  6. * Copyright (C) 2007-2008 Intel Corporation. All rights reserved.
  7. *
  8. * Redistribution and use in source and binary forms, with or without
  9. * modification, are permitted provided that the following conditions
  10. * are met:
  11. *
  12. * * Redistributions of source code must retain the above copyright
  13. * notice, this list of conditions and the following disclaimer.
  14. * * Redistributions in binary form must reproduce the above copyright
  15. * notice, this list of conditions and the following disclaimer in
  16. * the documentation and/or other materials provided with the
  17. * distribution.
  18. * * Neither the name of Intel Corporation nor the names of its
  19. * contributors may be used to endorse or promote products derived
  20. * from this software without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  23. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  24. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  25. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  26. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  28. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  29. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  30. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  32. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. *
  34. *
  35. * Intel Corporation <linux-wimax@intel.com>
  36. * Yanir Lubetkin <yanirx.lubetkin@intel.com>
  37. * - Initial implementation
  38. *
  39. * Intel Corporation <linux-wimax@intel.com>
  40. * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
  41. * - Rewritten to use a single FIFO to lower the memory allocation
  42. * pressure and optimize cache hits when copying to the queue, as
  43. * well as splitting out bus-specific code.
  44. *
  45. *
  46. * Implements data transmission to the device; this is done through a
  47. * software FIFO, as data/control frames can be coalesced (while the
  48. * device is reading the previous tx transaction, others accumulate).
  49. *
  50. * A FIFO is used because at the end it is resource-cheaper that trying
  51. * to implement scatter/gather over USB. As well, most traffic is going
  52. * to be download (vs upload).
  53. *
  54. * The format for sending/receiving data to/from the i2400m is
  55. * described in detail in rx.c:PROTOCOL FORMAT. In here we implement
  56. * the transmission of that. This is split between a bus-independent
  57. * part that just prepares everything and a bus-specific part that
  58. * does the actual transmission over the bus to the device (in the
  59. * bus-specific driver).
  60. *
  61. *
  62. * The general format of a device-host transaction is MSG-HDR, PLD1,
  63. * PLD2...PLDN, PL1, PL2,...PLN, PADDING.
  64. *
  65. * Because we need the send payload descriptors and then payloads and
  66. * because it is kind of expensive to do scatterlists in USB (one URB
  67. * per node), it becomes cheaper to append all the data to a FIFO
  68. * (copying to a FIFO potentially in cache is cheaper).
  69. *
  70. * Then the bus-specific code takes the parts of that FIFO that are
  71. * written and passes them to the device.
  72. *
  73. * So the concepts to keep in mind there are:
  74. *
  75. * We use a FIFO to queue the data in a linear buffer. We first append
  76. * a MSG-HDR, space for I2400M_TX_PLD_MAX payload descriptors and then
  77. * go appending payloads until we run out of space or of payload
  78. * descriptors. Then we append padding to make the whole transaction a
  79. * multiple of i2400m->bus_tx_block_size (as defined by the bus layer).
  80. *
  81. * - A TX message: a combination of a message header, payload
  82. * descriptors and payloads.
  83. *
  84. * Open: it is marked as active (i2400m->tx_msg is valid) and we
  85. * can keep adding payloads to it.
  86. *
  87. * Closed: we are not appending more payloads to this TX message
  88. * (exahusted space in the queue, too many payloads or
  89. * whichever). We have appended padding so the whole message
  90. * length is aligned to i2400m->bus_tx_block_size (as set by the
  91. * bus/transport layer).
  92. *
  93. * - Most of the time we keep a TX message open to which we append
  94. * payloads.
  95. *
  96. * - If we are going to append and there is no more space (we are at
  97. * the end of the FIFO), we close the message, mark the rest of the
  98. * FIFO space unusable (skip_tail), create a new message at the
  99. * beginning of the FIFO (if there is space) and append the message
  100. * there.
  101. *
  102. * This is because we need to give linear TX messages to the bus
  103. * engine. So we don't write a message to the remaining FIFO space
  104. * until the tail and continue at the head of it.
  105. *
  106. * - We overload one of the fields in the message header to use it as
  107. * 'size' of the TX message, so we can iterate over them. It also
  108. * contains a flag that indicates if we have to skip it or not.
  109. * When we send the buffer, we update that to its real on-the-wire
  110. * value.
  111. *
  112. * - The MSG-HDR PLD1...PLD2 stuff has to be a size multiple of 16.
  113. *
  114. * It follows that if MSG-HDR says we have N messages, the whole
  115. * header + descriptors is 16 + 4*N; for those to be a multiple of
  116. * 16, it follows that N can be 4, 8, 12, ... (32, 48, 64, 80...
  117. * bytes).
  118. *
  119. * So if we have only 1 payload, we have to submit a header that in
  120. * all truth has space for 4.
  121. *
  122. * The implication is that we reserve space for 12 (64 bytes); but
  123. * if we fill up only (eg) 2, our header becomes 32 bytes only. So
  124. * the TX engine has to shift those 32 bytes of msg header and 2
  125. * payloads and padding so that right after it the payloads start
  126. * and the TX engine has to know about that.
  127. *
  128. * It is cheaper to move the header up than the whole payloads down.
  129. *
  130. * We do this in i2400m_tx_close(). See 'i2400m_msg_hdr->offset'.
  131. *
  132. * - Each payload has to be size-padded to 16 bytes; before appending
  133. * it, we just do it.
  134. *
  135. * - The whole message has to be padded to i2400m->bus_tx_block_size;
  136. * we do this at close time. Thus, when reserving space for the
  137. * payload, we always make sure there is also free space for this
  138. * padding that sooner or later will happen.
  139. *
  140. * When we append a message, we tell the bus specific code to kick in
  141. * TXs. It will TX (in parallel) until the buffer is exhausted--hence
  142. * the lockin we do. The TX code will only send a TX message at the
  143. * time (which remember, might contain more than one payload). Of
  144. * course, when the bus-specific driver attempts to TX a message that
  145. * is still open, it gets closed first.
  146. *
  147. * Gee, this is messy; well a picture. In the example below we have a
  148. * partially full FIFO, with a closed message ready to be delivered
  149. * (with a moved message header to make sure it is size-aligned to
  150. * 16), TAIL room that was unusable (and thus is marked with a message
  151. * header that says 'skip this') and at the head of the buffer, an
  152. * incomplete message with a couple of payloads.
  153. *
  154. * N ___________________________________________________
  155. * | |
  156. * | TAIL room |
  157. * | |
  158. * | msg_hdr to skip (size |= 0x80000) |
  159. * |---------------------------------------------------|-------
  160. * | | /|\
  161. * | | |
  162. * | TX message padding | |
  163. * | | |
  164. * | | |
  165. * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
  166. * | | |
  167. * | payload 1 | |
  168. * | | N * tx_block_size
  169. * | | |
  170. * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
  171. * | | |
  172. * | payload 1 | |
  173. * | | |
  174. * | | |
  175. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- -|- - - -
  176. * | padding 3 /|\ | | /|\
  177. * | padding 2 | | | |
  178. * | pld 1 32 bytes (2 * 16) | | |
  179. * | pld 0 | | | |
  180. * | moved msg_hdr \|/ | \|/ |
  181. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|- - - |
  182. * | | _PLD_SIZE
  183. * | unused | |
  184. * | | |
  185. * |- - - - - - - - - - - - - - - - - - - - - - - - - -| |
  186. * | msg_hdr (size X) [this message is closed] | \|/
  187. * |===================================================|========== <=== OUT
  188. * | |
  189. * | |
  190. * | |
  191. * | Free rooom |
  192. * | |
  193. * | |
  194. * | |
  195. * | |
  196. * | |
  197. * | |
  198. * | |
  199. * | |
  200. * | |
  201. * |===================================================|========== <=== IN
  202. * | |
  203. * | |
  204. * | |
  205. * | |
  206. * | payload 1 |
  207. * | |
  208. * | |
  209. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
  210. * | |
  211. * | payload 0 |
  212. * | |
  213. * | |
  214. * |- - - - - - - - - - - - - - - - - - - - - - - - - -|
  215. * | pld 11 /|\ |
  216. * | ... | |
  217. * | pld 1 64 bytes (2 * 16) |
  218. * | pld 0 | |
  219. * | msg_hdr (size X) \|/ [message is open] |
  220. * 0 ---------------------------------------------------
  221. *
  222. *
  223. * ROADMAP
  224. *
  225. * i2400m_tx_setup() Called by i2400m_setup
  226. * i2400m_tx_release() Called by i2400m_release()
  227. *
  228. * i2400m_tx() Called to send data or control frames
  229. * i2400m_tx_fifo_push() Allocates append-space in the FIFO
  230. * i2400m_tx_new() Opens a new message in the FIFO
  231. * i2400m_tx_fits() Checks if a new payload fits in the message
  232. * i2400m_tx_close() Closes an open message in the FIFO
  233. * i2400m_tx_skip_tail() Marks unusable FIFO tail space
  234. * i2400m->bus_tx_kick()
  235. *
  236. * Now i2400m->bus_tx_kick() is the the bus-specific driver backend
  237. * implementation; that would do:
  238. *
  239. * i2400m->bus_tx_kick()
  240. * i2400m_tx_msg_get() Gets first message ready to go
  241. * ...sends it...
  242. * i2400m_tx_msg_sent() Ack the message is sent; repeat from
  243. * _tx_msg_get() until it returns NULL
  244. * (FIFO empty).
  245. */
  246. #include <linux/netdevice.h>
  247. #include <linux/slab.h>
  248. #include <linux/export.h>
  249. #include "i2400m.h"
  250. #define D_SUBMODULE tx
  251. #include "debug-levels.h"
  252. enum {
  253. /**
  254. * TX Buffer size
  255. *
  256. * Doc says maximum transaction is 16KiB. If we had 16KiB en
  257. * route and 16KiB being queued, it boils down to needing
  258. * 32KiB.
  259. * 32KiB is insufficient for 1400 MTU, hence increasing
  260. * tx buffer size to 64KiB.
  261. */
  262. I2400M_TX_BUF_SIZE = 65536,
  263. /**
  264. * Message header and payload descriptors have to be 16
  265. * aligned (16 + 4 * N = 16 * M). If we take that average sent
  266. * packets are MTU size (~1400-~1500) it follows that we could
  267. * fit at most 10-11 payloads in one transaction. To meet the
  268. * alignment requirement, that means we need to leave space
  269. * for 12 (64 bytes). To simplify, we leave space for that. If
  270. * at the end there are less, we pad up to the nearest
  271. * multiple of 16.
  272. */
  273. /*
  274. * According to Intel Wimax i3200, i5x50 and i6x50 specification
  275. * documents, the maximum number of payloads per message can be
  276. * up to 60. Increasing the number of payloads to 60 per message
  277. * helps to accommodate smaller payloads in a single transaction.
  278. */
  279. I2400M_TX_PLD_MAX = 60,
  280. I2400M_TX_PLD_SIZE = sizeof(struct i2400m_msg_hdr)
  281. + I2400M_TX_PLD_MAX * sizeof(struct i2400m_pld),
  282. I2400M_TX_SKIP = 0x80000000,
  283. /*
  284. * According to Intel Wimax i3200, i5x50 and i6x50 specification
  285. * documents, the maximum size of each message can be up to 16KiB.
  286. */
  287. I2400M_TX_MSG_SIZE = 16384,
  288. };
  289. #define TAIL_FULL ((void *)~(unsigned long)NULL)
  290. /*
  291. * Calculate how much tail room is available
  292. *
  293. * Note the trick here. This path is ONLY caleed for Case A (see
  294. * i2400m_tx_fifo_push() below), where we have:
  295. *
  296. * Case A
  297. * N ___________
  298. * | tail room |
  299. * | |
  300. * |<- IN ->|
  301. * | |
  302. * | data |
  303. * | |
  304. * |<- OUT ->|
  305. * | |
  306. * | head room |
  307. * 0 -----------
  308. *
  309. * When calculating the tail_room, tx_in might get to be zero if
  310. * i2400m->tx_in is right at the end of the buffer (really full
  311. * buffer) if there is no head room. In this case, tail_room would be
  312. * I2400M_TX_BUF_SIZE, although it is actually zero. Hence the final
  313. * mod (%) operation. However, when doing this kind of optimization,
  314. * i2400m->tx_in being zero would fail, so we treat is an a special
  315. * case.
  316. */
  317. static inline
  318. size_t __i2400m_tx_tail_room(struct i2400m *i2400m)
  319. {
  320. size_t tail_room;
  321. size_t tx_in;
  322. if (unlikely(i2400m->tx_in == 0))
  323. return I2400M_TX_BUF_SIZE;
  324. tx_in = i2400m->tx_in % I2400M_TX_BUF_SIZE;
  325. tail_room = I2400M_TX_BUF_SIZE - tx_in;
  326. tail_room %= I2400M_TX_BUF_SIZE;
  327. return tail_room;
  328. }
  329. /*
  330. * Allocate @size bytes in the TX fifo, return a pointer to it
  331. *
  332. * @i2400m: device descriptor
  333. * @size: size of the buffer we need to allocate
  334. * @padding: ensure that there is at least this many bytes of free
  335. * contiguous space in the fifo. This is needed because later on
  336. * we might need to add padding.
  337. * @try_head: specify either to allocate head room or tail room space
  338. * in the TX FIFO. This boolean is required to avoids a system hang
  339. * due to an infinite loop caused by i2400m_tx_fifo_push().
  340. * The caller must always try to allocate tail room space first by
  341. * calling this routine with try_head = 0. In case if there
  342. * is not enough tail room space but there is enough head room space,
  343. * (i2400m_tx_fifo_push() returns TAIL_FULL) try to allocate head
  344. * room space, by calling this routine again with try_head = 1.
  345. *
  346. * Returns:
  347. *
  348. * Pointer to the allocated space. NULL if there is no
  349. * space. TAIL_FULL if there is no space at the tail but there is at
  350. * the head (Case B below).
  351. *
  352. * These are the two basic cases we need to keep an eye for -- it is
  353. * much better explained in linux/kernel/kfifo.c, but this code
  354. * basically does the same. No rocket science here.
  355. *
  356. * Case A Case B
  357. * N ___________ ___________
  358. * | tail room | | data |
  359. * | | | |
  360. * |<- IN ->| |<- OUT ->|
  361. * | | | |
  362. * | data | | room |
  363. * | | | |
  364. * |<- OUT ->| |<- IN ->|
  365. * | | | |
  366. * | head room | | data |
  367. * 0 ----------- -----------
  368. *
  369. * We allocate only *contiguous* space.
  370. *
  371. * We can allocate only from 'room'. In Case B, it is simple; in case
  372. * A, we only try from the tail room; if it is not enough, we just
  373. * fail and return TAIL_FULL and let the caller figure out if we wants to
  374. * skip the tail room and try to allocate from the head.
  375. *
  376. * There is a corner case, wherein i2400m_tx_new() can get into
  377. * an infinite loop calling i2400m_tx_fifo_push().
  378. * In certain situations, tx_in would have reached on the top of TX FIFO
  379. * and i2400m_tx_tail_room() returns 0, as described below:
  380. *
  381. * N ___________ tail room is zero
  382. * |<- IN ->|
  383. * | |
  384. * | |
  385. * | |
  386. * | data |
  387. * |<- OUT ->|
  388. * | |
  389. * | |
  390. * | head room |
  391. * 0 -----------
  392. * During such a time, where tail room is zero in the TX FIFO and if there
  393. * is a request to add a payload to TX FIFO, which calls:
  394. * i2400m_tx()
  395. * ->calls i2400m_tx_close()
  396. * ->calls i2400m_tx_skip_tail()
  397. * goto try_new;
  398. * ->calls i2400m_tx_new()
  399. * |----> [try_head:]
  400. * infinite loop | ->calls i2400m_tx_fifo_push()
  401. * | if (tail_room < needed)
  402. * | if (head_room => needed)
  403. * | return TAIL_FULL;
  404. * |<---- goto try_head;
  405. *
  406. * i2400m_tx() calls i2400m_tx_close() to close the message, since there
  407. * is no tail room to accommodate the payload and calls
  408. * i2400m_tx_skip_tail() to skip the tail space. Now i2400m_tx() calls
  409. * i2400m_tx_new() to allocate space for new message header calling
  410. * i2400m_tx_fifo_push() that returns TAIL_FULL, since there is no tail space
  411. * to accommodate the message header, but there is enough head space.
  412. * The i2400m_tx_new() keeps re-retrying by calling i2400m_tx_fifo_push()
  413. * ending up in a loop causing system freeze.
  414. *
  415. * This corner case is avoided by using a try_head boolean,
  416. * as an argument to i2400m_tx_fifo_push().
  417. *
  418. * Note:
  419. *
  420. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  421. *
  422. * The indexes keep increasing and we reset them to zero when we
  423. * pop data off the queue
  424. */
  425. static
  426. void *i2400m_tx_fifo_push(struct i2400m *i2400m, size_t size,
  427. size_t padding, bool try_head)
  428. {
  429. struct device *dev = i2400m_dev(i2400m);
  430. size_t room, tail_room, needed_size;
  431. void *ptr;
  432. needed_size = size + padding;
  433. room = I2400M_TX_BUF_SIZE - (i2400m->tx_in - i2400m->tx_out);
  434. if (room < needed_size) { /* this takes care of Case B */
  435. d_printf(2, dev, "fifo push %zu/%zu: no space\n",
  436. size, padding);
  437. return NULL;
  438. }
  439. /* Is there space at the tail? */
  440. tail_room = __i2400m_tx_tail_room(i2400m);
  441. if (!try_head && tail_room < needed_size) {
  442. /*
  443. * If the tail room space is not enough to push the message
  444. * in the TX FIFO, then there are two possibilities:
  445. * 1. There is enough head room space to accommodate
  446. * this message in the TX FIFO.
  447. * 2. There is not enough space in the head room and
  448. * in tail room of the TX FIFO to accommodate the message.
  449. * In the case (1), return TAIL_FULL so that the caller
  450. * can figure out, if the caller wants to push the message
  451. * into the head room space.
  452. * In the case (2), return NULL, indicating that the TX FIFO
  453. * cannot accommodate the message.
  454. */
  455. if (room - tail_room >= needed_size) {
  456. d_printf(2, dev, "fifo push %zu/%zu: tail full\n",
  457. size, padding);
  458. return TAIL_FULL; /* There might be head space */
  459. } else {
  460. d_printf(2, dev, "fifo push %zu/%zu: no head space\n",
  461. size, padding);
  462. return NULL; /* There is no space */
  463. }
  464. }
  465. ptr = i2400m->tx_buf + i2400m->tx_in % I2400M_TX_BUF_SIZE;
  466. d_printf(2, dev, "fifo push %zu/%zu: at @%zu\n", size, padding,
  467. i2400m->tx_in % I2400M_TX_BUF_SIZE);
  468. i2400m->tx_in += size;
  469. return ptr;
  470. }
  471. /*
  472. * Mark the tail of the FIFO buffer as 'to-skip'
  473. *
  474. * We should never hit the BUG_ON() because all the sizes we push to
  475. * the FIFO are padded to be a multiple of 16 -- the size of *msg
  476. * (I2400M_PL_PAD for the payloads, I2400M_TX_PLD_SIZE for the
  477. * header).
  478. *
  479. * Tail room can get to be zero if a message was opened when there was
  480. * space only for a header. _tx_close() will mark it as to-skip (as it
  481. * will have no payloads) and there will be no more space to flush, so
  482. * nothing has to be done here. This is probably cheaper than ensuring
  483. * in _tx_new() that there is some space for payloads...as we could
  484. * always possibly hit the same problem if the payload wouldn't fit.
  485. *
  486. * Note:
  487. *
  488. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  489. *
  490. * This path is only taken for Case A FIFO situations [see
  491. * i2400m_tx_fifo_push()]
  492. */
  493. static
  494. void i2400m_tx_skip_tail(struct i2400m *i2400m)
  495. {
  496. struct device *dev = i2400m_dev(i2400m);
  497. size_t tx_in = i2400m->tx_in % I2400M_TX_BUF_SIZE;
  498. size_t tail_room = __i2400m_tx_tail_room(i2400m);
  499. struct i2400m_msg_hdr *msg = i2400m->tx_buf + tx_in;
  500. if (unlikely(tail_room == 0))
  501. return;
  502. BUG_ON(tail_room < sizeof(*msg));
  503. msg->size = tail_room | I2400M_TX_SKIP;
  504. d_printf(2, dev, "skip tail: skipping %zu bytes @%zu\n",
  505. tail_room, tx_in);
  506. i2400m->tx_in += tail_room;
  507. }
  508. /*
  509. * Check if a skb will fit in the TX queue's current active TX
  510. * message (if there are still descriptors left unused).
  511. *
  512. * Returns:
  513. * 0 if the message won't fit, 1 if it will.
  514. *
  515. * Note:
  516. *
  517. * Assumes a TX message is active (i2400m->tx_msg).
  518. *
  519. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  520. */
  521. static
  522. unsigned i2400m_tx_fits(struct i2400m *i2400m)
  523. {
  524. struct i2400m_msg_hdr *msg_hdr = i2400m->tx_msg;
  525. return le16_to_cpu(msg_hdr->num_pls) < I2400M_TX_PLD_MAX;
  526. }
  527. /*
  528. * Start a new TX message header in the queue.
  529. *
  530. * Reserve memory from the base FIFO engine and then just initialize
  531. * the message header.
  532. *
  533. * We allocate the biggest TX message header we might need (one that'd
  534. * fit I2400M_TX_PLD_MAX payloads) -- when it is closed it will be
  535. * 'ironed it out' and the unneeded parts removed.
  536. *
  537. * NOTE:
  538. *
  539. * Assumes that the previous message is CLOSED (eg: either
  540. * there was none or 'i2400m_tx_close()' was called on it).
  541. *
  542. * Assumes i2400m->tx_lock is taken, and we use that as a barrier
  543. */
  544. static
  545. void i2400m_tx_new(struct i2400m *i2400m)
  546. {
  547. struct device *dev = i2400m_dev(i2400m);
  548. struct i2400m_msg_hdr *tx_msg;
  549. bool try_head = false;
  550. BUG_ON(i2400m->tx_msg != NULL);
  551. /*
  552. * In certain situations, TX queue might have enough space to
  553. * accommodate the new message header I2400M_TX_PLD_SIZE, but
  554. * might not have enough space to accommodate the payloads.
  555. * Adding bus_tx_room_min padding while allocating a new TX message
  556. * increases the possibilities of including at least one payload of the
  557. * size <= bus_tx_room_min.
  558. */
  559. try_head:
  560. tx_msg = i2400m_tx_fifo_push(i2400m, I2400M_TX_PLD_SIZE,
  561. i2400m->bus_tx_room_min, try_head);
  562. if (tx_msg == NULL)
  563. goto out;
  564. else if (tx_msg == TAIL_FULL) {
  565. i2400m_tx_skip_tail(i2400m);
  566. d_printf(2, dev, "new TX message: tail full, trying head\n");
  567. try_head = true;
  568. goto try_head;
  569. }
  570. memset(tx_msg, 0, I2400M_TX_PLD_SIZE);
  571. tx_msg->size = I2400M_TX_PLD_SIZE;
  572. out:
  573. i2400m->tx_msg = tx_msg;
  574. d_printf(2, dev, "new TX message: %p @%zu\n",
  575. tx_msg, (void *) tx_msg - i2400m->tx_buf);
  576. }
  577. /*
  578. * Finalize the current TX message header
  579. *
  580. * Sets the message header to be at the proper location depending on
  581. * how many descriptors we have (check documentation at the file's
  582. * header for more info on that).
  583. *
  584. * Appends padding bytes to make sure the whole TX message (counting
  585. * from the 'relocated' message header) is aligned to
  586. * tx_block_size. We assume the _append() code has left enough space
  587. * in the FIFO for that. If there are no payloads, just pass, as it
  588. * won't be transferred.
  589. *
  590. * The amount of padding bytes depends on how many payloads are in the
  591. * TX message, as the "msg header and payload descriptors" will be
  592. * shifted up in the buffer.
  593. */
  594. static
  595. void i2400m_tx_close(struct i2400m *i2400m)
  596. {
  597. struct device *dev = i2400m_dev(i2400m);
  598. struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
  599. struct i2400m_msg_hdr *tx_msg_moved;
  600. size_t aligned_size, padding, hdr_size;
  601. void *pad_buf;
  602. unsigned num_pls;
  603. if (tx_msg->size & I2400M_TX_SKIP) /* a skipper? nothing to do */
  604. goto out;
  605. num_pls = le16_to_cpu(tx_msg->num_pls);
  606. /* We can get this situation when a new message was started
  607. * and there was no space to add payloads before hitting the
  608. tail (and taking padding into consideration). */
  609. if (num_pls == 0) {
  610. tx_msg->size |= I2400M_TX_SKIP;
  611. goto out;
  612. }
  613. /* Relocate the message header
  614. *
  615. * Find the current header size, align it to 16 and if we need
  616. * to move it so the tail is next to the payloads, move it and
  617. * set the offset.
  618. *
  619. * If it moved, this header is good only for transmission; the
  620. * original one (it is kept if we moved) is still used to
  621. * figure out where the next TX message starts (and where the
  622. * offset to the moved header is).
  623. */
  624. hdr_size = sizeof(*tx_msg)
  625. + le16_to_cpu(tx_msg->num_pls) * sizeof(tx_msg->pld[0]);
  626. hdr_size = ALIGN(hdr_size, I2400M_PL_ALIGN);
  627. tx_msg->offset = I2400M_TX_PLD_SIZE - hdr_size;
  628. tx_msg_moved = (void *) tx_msg + tx_msg->offset;
  629. memmove(tx_msg_moved, tx_msg, hdr_size);
  630. tx_msg_moved->size -= tx_msg->offset;
  631. /*
  632. * Now figure out how much we have to add to the (moved!)
  633. * message so the size is a multiple of i2400m->bus_tx_block_size.
  634. */
  635. aligned_size = ALIGN(tx_msg_moved->size, i2400m->bus_tx_block_size);
  636. padding = aligned_size - tx_msg_moved->size;
  637. if (padding > 0) {
  638. pad_buf = i2400m_tx_fifo_push(i2400m, padding, 0, 0);
  639. if (unlikely(WARN_ON(pad_buf == NULL
  640. || pad_buf == TAIL_FULL))) {
  641. /* This should not happen -- append should verify
  642. * there is always space left at least to append
  643. * tx_block_size */
  644. dev_err(dev,
  645. "SW BUG! Possible data leakage from memory the "
  646. "device should not read for padding - "
  647. "size %lu aligned_size %zu tx_buf %p in "
  648. "%zu out %zu\n",
  649. (unsigned long) tx_msg_moved->size,
  650. aligned_size, i2400m->tx_buf, i2400m->tx_in,
  651. i2400m->tx_out);
  652. } else
  653. memset(pad_buf, 0xad, padding);
  654. }
  655. tx_msg_moved->padding = cpu_to_le16(padding);
  656. tx_msg_moved->size += padding;
  657. if (tx_msg != tx_msg_moved)
  658. tx_msg->size += padding;
  659. out:
  660. i2400m->tx_msg = NULL;
  661. }
  662. /**
  663. * i2400m_tx - send the data in a buffer to the device
  664. *
  665. * @buf: pointer to the buffer to transmit
  666. *
  667. * @buf_len: buffer size
  668. *
  669. * @pl_type: type of the payload we are sending.
  670. *
  671. * Returns:
  672. * 0 if ok, < 0 errno code on error (-ENOSPC, if there is no more
  673. * room for the message in the queue).
  674. *
  675. * Appends the buffer to the TX FIFO and notifies the bus-specific
  676. * part of the driver that there is new data ready to transmit.
  677. * Once this function returns, the buffer has been copied, so it can
  678. * be reused.
  679. *
  680. * The steps followed to append are explained in detail in the file
  681. * header.
  682. *
  683. * Whenever we write to a message, we increase msg->size, so it
  684. * reflects exactly how big the message is. This is needed so that if
  685. * we concatenate two messages before they can be sent, the code that
  686. * sends the messages can find the boundaries (and it will replace the
  687. * size with the real barker before sending).
  688. *
  689. * Note:
  690. *
  691. * Cold and warm reset payloads need to be sent as a single
  692. * payload, so we handle that.
  693. */
  694. int i2400m_tx(struct i2400m *i2400m, const void *buf, size_t buf_len,
  695. enum i2400m_pt pl_type)
  696. {
  697. int result = -ENOSPC;
  698. struct device *dev = i2400m_dev(i2400m);
  699. unsigned long flags;
  700. size_t padded_len;
  701. void *ptr;
  702. bool try_head = false;
  703. unsigned is_singleton = pl_type == I2400M_PT_RESET_WARM
  704. || pl_type == I2400M_PT_RESET_COLD;
  705. d_fnstart(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u)\n",
  706. i2400m, buf, buf_len, pl_type);
  707. padded_len = ALIGN(buf_len, I2400M_PL_ALIGN);
  708. d_printf(5, dev, "padded_len %zd buf_len %zd\n", padded_len, buf_len);
  709. /* If there is no current TX message, create one; if the
  710. * current one is out of payload slots or we have a singleton,
  711. * close it and start a new one */
  712. spin_lock_irqsave(&i2400m->tx_lock, flags);
  713. /* If tx_buf is NULL, device is shutdown */
  714. if (i2400m->tx_buf == NULL) {
  715. result = -ESHUTDOWN;
  716. goto error_tx_new;
  717. }
  718. try_new:
  719. if (unlikely(i2400m->tx_msg == NULL))
  720. i2400m_tx_new(i2400m);
  721. else if (unlikely(!i2400m_tx_fits(i2400m)
  722. || (is_singleton && i2400m->tx_msg->num_pls != 0))) {
  723. d_printf(2, dev, "closing TX message (fits %u singleton "
  724. "%u num_pls %u)\n", i2400m_tx_fits(i2400m),
  725. is_singleton, i2400m->tx_msg->num_pls);
  726. i2400m_tx_close(i2400m);
  727. i2400m_tx_new(i2400m);
  728. }
  729. if (i2400m->tx_msg == NULL)
  730. goto error_tx_new;
  731. /*
  732. * Check if this skb will fit in the TX queue's current active
  733. * TX message. The total message size must not exceed the maximum
  734. * size of each message I2400M_TX_MSG_SIZE. If it exceeds,
  735. * close the current message and push this skb into the new message.
  736. */
  737. if (i2400m->tx_msg->size + padded_len > I2400M_TX_MSG_SIZE) {
  738. d_printf(2, dev, "TX: message too big, going new\n");
  739. i2400m_tx_close(i2400m);
  740. i2400m_tx_new(i2400m);
  741. }
  742. if (i2400m->tx_msg == NULL)
  743. goto error_tx_new;
  744. /* So we have a current message header; now append space for
  745. * the message -- if there is not enough, try the head */
  746. ptr = i2400m_tx_fifo_push(i2400m, padded_len,
  747. i2400m->bus_tx_block_size, try_head);
  748. if (ptr == TAIL_FULL) { /* Tail is full, try head */
  749. d_printf(2, dev, "pl append: tail full\n");
  750. i2400m_tx_close(i2400m);
  751. i2400m_tx_skip_tail(i2400m);
  752. try_head = true;
  753. goto try_new;
  754. } else if (ptr == NULL) { /* All full */
  755. result = -ENOSPC;
  756. d_printf(2, dev, "pl append: all full\n");
  757. } else { /* Got space, copy it, set padding */
  758. struct i2400m_msg_hdr *tx_msg = i2400m->tx_msg;
  759. unsigned num_pls = le16_to_cpu(tx_msg->num_pls);
  760. memcpy(ptr, buf, buf_len);
  761. memset(ptr + buf_len, 0xad, padded_len - buf_len);
  762. i2400m_pld_set(&tx_msg->pld[num_pls], buf_len, pl_type);
  763. d_printf(3, dev, "pld 0x%08x (type 0x%1x len 0x%04zx\n",
  764. le32_to_cpu(tx_msg->pld[num_pls].val),
  765. pl_type, buf_len);
  766. tx_msg->num_pls = le16_to_cpu(num_pls+1);
  767. tx_msg->size += padded_len;
  768. d_printf(2, dev, "TX: appended %zu b (up to %u b) pl #%u\n",
  769. padded_len, tx_msg->size, num_pls+1);
  770. d_printf(2, dev,
  771. "TX: appended hdr @%zu %zu b pl #%u @%zu %zu/%zu b\n",
  772. (void *)tx_msg - i2400m->tx_buf, (size_t)tx_msg->size,
  773. num_pls+1, ptr - i2400m->tx_buf, buf_len, padded_len);
  774. result = 0;
  775. if (is_singleton)
  776. i2400m_tx_close(i2400m);
  777. }
  778. error_tx_new:
  779. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  780. /* kick in most cases, except when the TX subsys is down, as
  781. * it might free space */
  782. if (likely(result != -ESHUTDOWN))
  783. i2400m->bus_tx_kick(i2400m);
  784. d_fnend(3, dev, "(i2400m %p skb %p [%zu bytes] pt %u) = %d\n",
  785. i2400m, buf, buf_len, pl_type, result);
  786. return result;
  787. }
  788. EXPORT_SYMBOL_GPL(i2400m_tx);
  789. /**
  790. * i2400m_tx_msg_get - Get the first TX message in the FIFO to start sending it
  791. *
  792. * @i2400m: device descriptors
  793. * @bus_size: where to place the size of the TX message
  794. *
  795. * Called by the bus-specific driver to get the first TX message at
  796. * the FIF that is ready for transmission.
  797. *
  798. * It sets the state in @i2400m to indicate the bus-specific driver is
  799. * transferring that message (i2400m->tx_msg_size).
  800. *
  801. * Once the transfer is completed, call i2400m_tx_msg_sent().
  802. *
  803. * Notes:
  804. *
  805. * The size of the TX message to be transmitted might be smaller than
  806. * that of the TX message in the FIFO (in case the header was
  807. * shorter). Hence, we copy it in @bus_size, for the bus layer to
  808. * use. We keep the message's size in i2400m->tx_msg_size so that
  809. * when the bus later is done transferring we know how much to
  810. * advance the fifo.
  811. *
  812. * We collect statistics here as all the data is available and we
  813. * assume it is going to work [see i2400m_tx_msg_sent()].
  814. */
  815. struct i2400m_msg_hdr *i2400m_tx_msg_get(struct i2400m *i2400m,
  816. size_t *bus_size)
  817. {
  818. struct device *dev = i2400m_dev(i2400m);
  819. struct i2400m_msg_hdr *tx_msg, *tx_msg_moved;
  820. unsigned long flags, pls;
  821. d_fnstart(3, dev, "(i2400m %p bus_size %p)\n", i2400m, bus_size);
  822. spin_lock_irqsave(&i2400m->tx_lock, flags);
  823. tx_msg_moved = NULL;
  824. if (i2400m->tx_buf == NULL)
  825. goto out_unlock;
  826. skip:
  827. tx_msg_moved = NULL;
  828. if (i2400m->tx_in == i2400m->tx_out) { /* Empty FIFO? */
  829. i2400m->tx_in = 0;
  830. i2400m->tx_out = 0;
  831. d_printf(2, dev, "TX: FIFO empty: resetting\n");
  832. goto out_unlock;
  833. }
  834. tx_msg = i2400m->tx_buf + i2400m->tx_out % I2400M_TX_BUF_SIZE;
  835. if (tx_msg->size & I2400M_TX_SKIP) { /* skip? */
  836. d_printf(2, dev, "TX: skip: msg @%zu (%zu b)\n",
  837. i2400m->tx_out % I2400M_TX_BUF_SIZE,
  838. (size_t) tx_msg->size & ~I2400M_TX_SKIP);
  839. i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
  840. goto skip;
  841. }
  842. if (tx_msg->num_pls == 0) { /* No payloads? */
  843. if (tx_msg == i2400m->tx_msg) { /* open, we are done */
  844. d_printf(2, dev,
  845. "TX: FIFO empty: open msg w/o payloads @%zu\n",
  846. (void *) tx_msg - i2400m->tx_buf);
  847. tx_msg = NULL;
  848. goto out_unlock;
  849. } else { /* closed, skip it */
  850. d_printf(2, dev,
  851. "TX: skip msg w/o payloads @%zu (%zu b)\n",
  852. (void *) tx_msg - i2400m->tx_buf,
  853. (size_t) tx_msg->size);
  854. i2400m->tx_out += tx_msg->size & ~I2400M_TX_SKIP;
  855. goto skip;
  856. }
  857. }
  858. if (tx_msg == i2400m->tx_msg) /* open msg? */
  859. i2400m_tx_close(i2400m);
  860. /* Now we have a valid TX message (with payloads) to TX */
  861. tx_msg_moved = (void *) tx_msg + tx_msg->offset;
  862. i2400m->tx_msg_size = tx_msg->size;
  863. *bus_size = tx_msg_moved->size;
  864. d_printf(2, dev, "TX: pid %d msg hdr at @%zu offset +@%zu "
  865. "size %zu bus_size %zu\n",
  866. current->pid, (void *) tx_msg - i2400m->tx_buf,
  867. (size_t) tx_msg->offset, (size_t) tx_msg->size,
  868. (size_t) tx_msg_moved->size);
  869. tx_msg_moved->barker = le32_to_cpu(I2400M_H2D_PREVIEW_BARKER);
  870. tx_msg_moved->sequence = le32_to_cpu(i2400m->tx_sequence++);
  871. pls = le32_to_cpu(tx_msg_moved->num_pls);
  872. i2400m->tx_pl_num += pls; /* Update stats */
  873. if (pls > i2400m->tx_pl_max)
  874. i2400m->tx_pl_max = pls;
  875. if (pls < i2400m->tx_pl_min)
  876. i2400m->tx_pl_min = pls;
  877. i2400m->tx_num++;
  878. i2400m->tx_size_acc += *bus_size;
  879. if (*bus_size < i2400m->tx_size_min)
  880. i2400m->tx_size_min = *bus_size;
  881. if (*bus_size > i2400m->tx_size_max)
  882. i2400m->tx_size_max = *bus_size;
  883. out_unlock:
  884. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  885. d_fnstart(3, dev, "(i2400m %p bus_size %p [%zu]) = %p\n",
  886. i2400m, bus_size, *bus_size, tx_msg_moved);
  887. return tx_msg_moved;
  888. }
  889. EXPORT_SYMBOL_GPL(i2400m_tx_msg_get);
  890. /**
  891. * i2400m_tx_msg_sent - indicate the transmission of a TX message
  892. *
  893. * @i2400m: device descriptor
  894. *
  895. * Called by the bus-specific driver when a message has been sent;
  896. * this pops it from the FIFO; and as there is space, start the queue
  897. * in case it was stopped.
  898. *
  899. * Should be called even if the message send failed and we are
  900. * dropping this TX message.
  901. */
  902. void i2400m_tx_msg_sent(struct i2400m *i2400m)
  903. {
  904. unsigned n;
  905. unsigned long flags;
  906. struct device *dev = i2400m_dev(i2400m);
  907. d_fnstart(3, dev, "(i2400m %p)\n", i2400m);
  908. spin_lock_irqsave(&i2400m->tx_lock, flags);
  909. if (i2400m->tx_buf == NULL)
  910. goto out_unlock;
  911. i2400m->tx_out += i2400m->tx_msg_size;
  912. d_printf(2, dev, "TX: sent %zu b\n", (size_t) i2400m->tx_msg_size);
  913. i2400m->tx_msg_size = 0;
  914. BUG_ON(i2400m->tx_out > i2400m->tx_in);
  915. /* level them FIFO markers off */
  916. n = i2400m->tx_out / I2400M_TX_BUF_SIZE;
  917. i2400m->tx_out %= I2400M_TX_BUF_SIZE;
  918. i2400m->tx_in -= n * I2400M_TX_BUF_SIZE;
  919. out_unlock:
  920. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  921. d_fnend(3, dev, "(i2400m %p) = void\n", i2400m);
  922. }
  923. EXPORT_SYMBOL_GPL(i2400m_tx_msg_sent);
  924. /**
  925. * i2400m_tx_setup - Initialize the TX queue and infrastructure
  926. *
  927. * Make sure we reset the TX sequence to zero, as when this function
  928. * is called, the firmware has been just restarted. Same rational
  929. * for tx_in, tx_out, tx_msg_size and tx_msg. We reset them since
  930. * the memory for TX queue is reallocated.
  931. */
  932. int i2400m_tx_setup(struct i2400m *i2400m)
  933. {
  934. int result = 0;
  935. void *tx_buf;
  936. unsigned long flags;
  937. /* Do this here only once -- can't do on
  938. * i2400m_hard_start_xmit() as we'll cause race conditions if
  939. * the WS was scheduled on another CPU */
  940. INIT_WORK(&i2400m->wake_tx_ws, i2400m_wake_tx_work);
  941. tx_buf = kmalloc(I2400M_TX_BUF_SIZE, GFP_ATOMIC);
  942. if (tx_buf == NULL) {
  943. result = -ENOMEM;
  944. goto error_kmalloc;
  945. }
  946. /*
  947. * Fail the build if we can't fit at least two maximum size messages
  948. * on the TX FIFO [one being delivered while one is constructed].
  949. */
  950. BUILD_BUG_ON(2 * I2400M_TX_MSG_SIZE > I2400M_TX_BUF_SIZE);
  951. spin_lock_irqsave(&i2400m->tx_lock, flags);
  952. i2400m->tx_sequence = 0;
  953. i2400m->tx_in = 0;
  954. i2400m->tx_out = 0;
  955. i2400m->tx_msg_size = 0;
  956. i2400m->tx_msg = NULL;
  957. i2400m->tx_buf = tx_buf;
  958. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  959. /* Huh? the bus layer has to define this... */
  960. BUG_ON(i2400m->bus_tx_block_size == 0);
  961. error_kmalloc:
  962. return result;
  963. }
  964. /**
  965. * i2400m_tx_release - Tear down the TX queue and infrastructure
  966. */
  967. void i2400m_tx_release(struct i2400m *i2400m)
  968. {
  969. unsigned long flags;
  970. spin_lock_irqsave(&i2400m->tx_lock, flags);
  971. kfree(i2400m->tx_buf);
  972. i2400m->tx_buf = NULL;
  973. spin_unlock_irqrestore(&i2400m->tx_lock, flags);
  974. }