Kconfig 4.9 KB

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  1. #
  2. # Memory devices
  3. #
  4. menuconfig MEMORY
  5. bool "Memory Controller drivers"
  6. if MEMORY
  7. config ARM_PL172_MPMC
  8. tristate "ARM PL172 MPMC driver"
  9. depends on ARM_AMBA && OF
  10. help
  11. This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
  12. If you have an embedded system with an AMBA bus and a PL172
  13. controller, say Y or M here.
  14. config ATMEL_SDRAMC
  15. bool "Atmel (Multi-port DDR-)SDRAM Controller"
  16. default y
  17. depends on ARCH_AT91 && OF
  18. help
  19. This driver is for Atmel SDRAM Controller or Atmel Multi-port
  20. DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
  21. Starting with the at91sam9g45, this controller supports SDR, DDR and
  22. LP-DDR memories.
  23. config ATMEL_EBI
  24. bool "Atmel EBI driver"
  25. default y
  26. depends on ARCH_AT91 && OF
  27. select MFD_SYSCON
  28. select MFD_ATMEL_SMC
  29. help
  30. Driver for Atmel EBI controller.
  31. Used to configure the EBI (external bus interface) when the device-
  32. tree is used. This bus supports NANDs, external ethernet controller,
  33. SRAMs, ATA devices, etc.
  34. config TI_AEMIF
  35. tristate "Texas Instruments AEMIF driver"
  36. depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
  37. help
  38. This driver is for the AEMIF module available in Texas Instruments
  39. SoCs. AEMIF stands for Asynchronous External Memory Interface and
  40. is intended to provide a glue-less interface to a variety of
  41. asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
  42. of 256M bytes of any of these memories can be accessed at a given
  43. time via four chip selects with 64M byte access per chip select.
  44. config TI_EMIF
  45. tristate "Texas Instruments EMIF driver"
  46. depends on ARCH_OMAP2PLUS
  47. select DDR
  48. help
  49. This driver is for the EMIF module available in Texas Instruments
  50. SoCs. EMIF is an SDRAM controller that, based on its revision,
  51. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  52. This driver takes care of only LPDDR2 memories presently. The
  53. functions of the driver includes re-configuring AC timing
  54. parameters and other settings during frequency, voltage and
  55. temperature changes
  56. config OMAP_GPMC
  57. bool
  58. select GPIOLIB
  59. help
  60. This driver is for the General Purpose Memory Controller (GPMC)
  61. present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
  62. interfacing to a variety of asynchronous as well as synchronous
  63. memory drives like NOR, NAND, OneNAND, SRAM.
  64. config OMAP_GPMC_DEBUG
  65. bool "Enable GPMC debug output and skip reset of GPMC during init"
  66. depends on OMAP_GPMC
  67. help
  68. Enables verbose debugging mostly to decode the bootloader provided
  69. timings. To preserve the bootloader provided timings, the reset
  70. of GPMC is skipped during init. Enable this during development to
  71. configure devices connected to the GPMC bus.
  72. NOTE: In addition to matching the register setup with the bootloader
  73. you also need to match the GPMC FCLK frequency used by the
  74. bootloader or else the GPMC timings won't be identical with the
  75. bootloader timings.
  76. config MVEBU_DEVBUS
  77. bool "Marvell EBU Device Bus Controller"
  78. default y
  79. depends on PLAT_ORION && OF
  80. help
  81. This driver is for the Device Bus controller available in some
  82. Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
  83. Armada 370 and Armada XP. This controller allows to handle flash
  84. devices such as NOR, NAND, SRAM, and FPGA.
  85. config TEGRA20_MC
  86. bool "Tegra20 Memory Controller(MC) driver"
  87. default y
  88. depends on ARCH_TEGRA_2x_SOC
  89. help
  90. This driver is for the Memory Controller(MC) module available
  91. in Tegra20 SoCs, mainly for a address translation fault
  92. analysis, especially for IOMMU/GART(Graphics Address
  93. Relocation Table) module.
  94. config FSL_CORENET_CF
  95. tristate "Freescale CoreNet Error Reporting"
  96. depends on FSL_SOC_BOOKE
  97. help
  98. Say Y for reporting of errors from the Freescale CoreNet
  99. Coherency Fabric. Errors reported include accesses to
  100. physical addresses that mapped by no local access window
  101. (LAW) or an invalid LAW, as well as bad cache state that
  102. represents a coherency violation.
  103. config FSL_IFC
  104. bool
  105. depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A
  106. config JZ4780_NEMC
  107. bool "Ingenic JZ4780 SoC NEMC driver"
  108. default y
  109. depends on MACH_JZ4780
  110. help
  111. This driver is for the NAND/External Memory Controller (NEMC) in
  112. the Ingenic JZ4780. This controller is used to handle external
  113. memory devices such as NAND and SRAM.
  114. config MTK_SMI
  115. bool
  116. #depends on ARCH_MEDIATEK || COMPILE_TEST
  117. help
  118. This driver is for the Memory Controller module in MediaTek SoCs,
  119. mainly help enable/disable iommu and control the power domain and
  120. clocks for each local arbiter.
  121. config DA8XX_DDRCTL
  122. bool "Texas Instruments da8xx DDR2/mDDR driver"
  123. depends on ARCH_DAVINCI_DA8XX
  124. help
  125. This driver is for the DDR2/mDDR Memory Controller present on
  126. Texas Instruments da8xx SoCs. It's used to tweak various memory
  127. controller configuration options.
  128. source "drivers/memory/samsung/Kconfig"
  129. source "drivers/memory/tegra/Kconfig"
  130. source "drivers/memory/mediatek/Kconfig"
  131. endif