tm6000-core.c 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933
  1. /*
  2. * tm6000-core.c - driver for TM5600/TM6000/TM6010 USB video capture devices
  3. *
  4. * Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
  5. *
  6. * Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
  7. * - DVB-T support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation version 2
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/usb.h>
  22. #include <linux/i2c.h>
  23. #include "tm6000.h"
  24. #include "tm6000-regs.h"
  25. #include <media/v4l2-common.h>
  26. #include <media/tuner.h>
  27. #define USB_TIMEOUT (5 * HZ) /* ms */
  28. int tm6000_read_write_usb(struct tm6000_core *dev, u8 req_type, u8 req,
  29. u16 value, u16 index, u8 *buf, u16 len)
  30. {
  31. int ret, i;
  32. unsigned int pipe;
  33. u8 *data = NULL;
  34. int delay = 5000;
  35. if (len) {
  36. data = kzalloc(len, GFP_KERNEL);
  37. if (!data)
  38. return -ENOMEM;
  39. }
  40. mutex_lock(&dev->usb_lock);
  41. if (req_type & USB_DIR_IN)
  42. pipe = usb_rcvctrlpipe(dev->udev, 0);
  43. else {
  44. pipe = usb_sndctrlpipe(dev->udev, 0);
  45. memcpy(data, buf, len);
  46. }
  47. if (tm6000_debug & V4L2_DEBUG_I2C) {
  48. printk(KERN_DEBUG "(dev %p, pipe %08x): ", dev->udev, pipe);
  49. printk(KERN_CONT "%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
  50. (req_type & USB_DIR_IN) ? " IN" : "OUT",
  51. req_type, req, value&0xff, value>>8, index&0xff,
  52. index>>8, len&0xff, len>>8);
  53. if (!(req_type & USB_DIR_IN)) {
  54. printk(KERN_CONT ">>> ");
  55. for (i = 0; i < len; i++)
  56. printk(KERN_CONT " %02x", buf[i]);
  57. printk(KERN_CONT "\n");
  58. }
  59. }
  60. ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index,
  61. data, len, USB_TIMEOUT);
  62. if (req_type & USB_DIR_IN)
  63. memcpy(buf, data, len);
  64. if (tm6000_debug & V4L2_DEBUG_I2C) {
  65. if (ret < 0) {
  66. if (req_type & USB_DIR_IN)
  67. printk(KERN_DEBUG "<<< (len=%d)\n", len);
  68. printk(KERN_CONT "%s: Error #%d\n", __func__, ret);
  69. } else if (req_type & USB_DIR_IN) {
  70. printk(KERN_CONT "<<< ");
  71. for (i = 0; i < len; i++)
  72. printk(KERN_CONT " %02x", buf[i]);
  73. printk(KERN_CONT "\n");
  74. }
  75. }
  76. kfree(data);
  77. if (dev->quirks & TM6000_QUIRK_NO_USB_DELAY)
  78. delay = 0;
  79. if (req == REQ_16_SET_GET_I2C_WR1_RDN && !(req_type & USB_DIR_IN)) {
  80. unsigned int tsleep;
  81. /* Calculate delay time, 14000us for 64 bytes */
  82. tsleep = (len * 200) + 200;
  83. if (tsleep < delay)
  84. tsleep = delay;
  85. usleep_range(tsleep, tsleep + 1000);
  86. }
  87. else if (delay)
  88. usleep_range(delay, delay + 1000);
  89. mutex_unlock(&dev->usb_lock);
  90. return ret;
  91. }
  92. int tm6000_set_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  93. {
  94. return
  95. tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
  96. req, value, index, NULL, 0);
  97. }
  98. EXPORT_SYMBOL_GPL(tm6000_set_reg);
  99. int tm6000_get_reg(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  100. {
  101. int rc;
  102. u8 buf[1];
  103. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  104. value, index, buf, 1);
  105. if (rc < 0)
  106. return rc;
  107. return *buf;
  108. }
  109. EXPORT_SYMBOL_GPL(tm6000_get_reg);
  110. int tm6000_set_reg_mask(struct tm6000_core *dev, u8 req, u16 value,
  111. u16 index, u16 mask)
  112. {
  113. int rc;
  114. u8 buf[1];
  115. u8 new_index;
  116. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  117. value, 0, buf, 1);
  118. if (rc < 0)
  119. return rc;
  120. new_index = (buf[0] & ~mask) | (index & mask);
  121. if (new_index == buf[0])
  122. return 0;
  123. return tm6000_read_write_usb(dev, USB_DIR_OUT | USB_TYPE_VENDOR,
  124. req, value, new_index, NULL, 0);
  125. }
  126. EXPORT_SYMBOL_GPL(tm6000_set_reg_mask);
  127. int tm6000_get_reg16(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  128. {
  129. int rc;
  130. u8 buf[2];
  131. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  132. value, index, buf, 2);
  133. if (rc < 0)
  134. return rc;
  135. return buf[1]|buf[0]<<8;
  136. }
  137. int tm6000_get_reg32(struct tm6000_core *dev, u8 req, u16 value, u16 index)
  138. {
  139. int rc;
  140. u8 buf[4];
  141. rc = tm6000_read_write_usb(dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
  142. value, index, buf, 4);
  143. if (rc < 0)
  144. return rc;
  145. return buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24;
  146. }
  147. int tm6000_i2c_reset(struct tm6000_core *dev, u16 tsleep)
  148. {
  149. int rc;
  150. rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0);
  151. if (rc < 0)
  152. return rc;
  153. msleep(tsleep);
  154. rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1);
  155. msleep(tsleep);
  156. return rc;
  157. }
  158. void tm6000_set_fourcc_format(struct tm6000_core *dev)
  159. {
  160. if (dev->dev_type == TM6010) {
  161. int val;
  162. val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, 0) & 0xfc;
  163. if (dev->fourcc == V4L2_PIX_FMT_UYVY)
  164. tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val);
  165. else
  166. tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val | 1);
  167. } else {
  168. if (dev->fourcc == V4L2_PIX_FMT_UYVY)
  169. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
  170. else
  171. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90);
  172. }
  173. }
  174. static void tm6000_set_vbi(struct tm6000_core *dev)
  175. {
  176. /*
  177. * FIXME:
  178. * VBI lines and start/end are different between 60Hz and 50Hz
  179. * So, it is very likely that we need to change the config to
  180. * something that takes it into account, doing something different
  181. * if (dev->norm & V4L2_STD_525_60)
  182. */
  183. if (dev->dev_type == TM6010) {
  184. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  185. tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27);
  186. tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55);
  187. tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66);
  188. tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66);
  189. tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66);
  190. tm6000_set_reg(dev,
  191. TM6010_REQ07_R46_VBI_DATA_TYPE_LINE10, 0x66);
  192. tm6000_set_reg(dev,
  193. TM6010_REQ07_R47_VBI_DATA_TYPE_LINE11, 0x66);
  194. tm6000_set_reg(dev,
  195. TM6010_REQ07_R48_VBI_DATA_TYPE_LINE12, 0x66);
  196. tm6000_set_reg(dev,
  197. TM6010_REQ07_R49_VBI_DATA_TYPE_LINE13, 0x66);
  198. tm6000_set_reg(dev,
  199. TM6010_REQ07_R4A_VBI_DATA_TYPE_LINE14, 0x66);
  200. tm6000_set_reg(dev,
  201. TM6010_REQ07_R4B_VBI_DATA_TYPE_LINE15, 0x66);
  202. tm6000_set_reg(dev,
  203. TM6010_REQ07_R4C_VBI_DATA_TYPE_LINE16, 0x66);
  204. tm6000_set_reg(dev,
  205. TM6010_REQ07_R4D_VBI_DATA_TYPE_LINE17, 0x66);
  206. tm6000_set_reg(dev,
  207. TM6010_REQ07_R4E_VBI_DATA_TYPE_LINE18, 0x66);
  208. tm6000_set_reg(dev,
  209. TM6010_REQ07_R4F_VBI_DATA_TYPE_LINE19, 0x66);
  210. tm6000_set_reg(dev,
  211. TM6010_REQ07_R50_VBI_DATA_TYPE_LINE20, 0x66);
  212. tm6000_set_reg(dev,
  213. TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x66);
  214. tm6000_set_reg(dev,
  215. TM6010_REQ07_R52_VBI_DATA_TYPE_LINE22, 0x66);
  216. tm6000_set_reg(dev,
  217. TM6010_REQ07_R53_VBI_DATA_TYPE_LINE23, 0x00);
  218. tm6000_set_reg(dev,
  219. TM6010_REQ07_R54_VBI_DATA_TYPE_RLINES, 0x00);
  220. tm6000_set_reg(dev,
  221. TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01);
  222. tm6000_set_reg(dev,
  223. TM6010_REQ07_R56_VBI_LOOP_FILTER_I_GAIN, 0x00);
  224. tm6000_set_reg(dev,
  225. TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02);
  226. tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35);
  227. tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0);
  228. tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11);
  229. tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c);
  230. tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01);
  231. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
  232. }
  233. }
  234. int tm6000_init_analog_mode(struct tm6000_core *dev)
  235. {
  236. struct v4l2_frequency f;
  237. if (dev->dev_type == TM6010) {
  238. u8 active = TM6010_REQ07_RCC_ACTIVE_IF_AUDIO_ENABLE;
  239. if (!dev->radio)
  240. active |= TM6010_REQ07_RCC_ACTIVE_IF_VIDEO_ENABLE;
  241. /* Enable video and audio */
  242. tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
  243. active, 0x60);
  244. /* Disable TS input */
  245. tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
  246. 0x00, 0x40);
  247. } else {
  248. /* Enables soft reset */
  249. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  250. if (dev->scaler)
  251. /* Disable Hfilter and Enable TS Drop err */
  252. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20);
  253. else /* Enable Hfilter and disable TS Drop err */
  254. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80);
  255. tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88);
  256. tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23);
  257. tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0);
  258. tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8);
  259. tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06);
  260. tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f);
  261. /* AP Software reset */
  262. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
  263. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
  264. tm6000_set_fourcc_format(dev);
  265. /* Disables soft reset */
  266. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00);
  267. }
  268. msleep(20);
  269. /* Tuner firmware can now be loaded */
  270. /*
  271. * FIXME: This is a hack! xc3028 "sleeps" when no channel is detected
  272. * for more than a few seconds. Not sure why, as this behavior does
  273. * not happen on other devices with xc3028. So, I suspect that it
  274. * is yet another bug at tm6000. After start sleeping, decoding
  275. * doesn't start automatically. Instead, it requires some
  276. * I2C commands to wake it up. As we want to have image at the
  277. * beginning, we needed to add this hack. The better would be to
  278. * discover some way to make tm6000 to wake up without this hack.
  279. */
  280. f.frequency = dev->freq;
  281. v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
  282. msleep(100);
  283. tm6000_set_standard(dev);
  284. tm6000_set_vbi(dev);
  285. tm6000_set_audio_bitrate(dev, 48000);
  286. /* switch dvb led off */
  287. if (dev->gpio.dvb_led) {
  288. tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
  289. dev->gpio.dvb_led, 0x01);
  290. }
  291. return 0;
  292. }
  293. int tm6000_init_digital_mode(struct tm6000_core *dev)
  294. {
  295. if (dev->dev_type == TM6010) {
  296. /* Disable video and audio */
  297. tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF,
  298. 0x00, 0x60);
  299. /* Enable TS input */
  300. tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE,
  301. 0x40, 0x40);
  302. /* all power down, but not the digital data port */
  303. tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28);
  304. tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc);
  305. tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff);
  306. } else {
  307. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08);
  308. tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00);
  309. tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01);
  310. tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08);
  311. tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
  312. tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
  313. tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8);
  314. tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40);
  315. tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0);
  316. tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09);
  317. tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37);
  318. tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8);
  319. tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0);
  320. tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60);
  321. tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c);
  322. tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff);
  323. tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08);
  324. msleep(50);
  325. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
  326. msleep(50);
  327. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
  328. msleep(50);
  329. tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
  330. msleep(100);
  331. }
  332. /* switch dvb led on */
  333. if (dev->gpio.dvb_led) {
  334. tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
  335. dev->gpio.dvb_led, 0x00);
  336. }
  337. return 0;
  338. }
  339. EXPORT_SYMBOL(tm6000_init_digital_mode);
  340. struct reg_init {
  341. u8 req;
  342. u8 reg;
  343. u8 val;
  344. };
  345. /* The meaning of those initializations are unknown */
  346. static struct reg_init tm6000_init_tab[] = {
  347. /* REG VALUE */
  348. { TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f },
  349. { TM6010_REQ07_RFF_SOFT_RESET, 0x08 },
  350. { TM6010_REQ07_RFF_SOFT_RESET, 0x00 },
  351. { TM6010_REQ07_RD5_POWERSAVE, 0x4f },
  352. { TM6000_REQ07_RDA_CLK_SEL, 0x23 },
  353. { TM6000_REQ07_RDB_OUT_SEL, 0x08 },
  354. { TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x00 },
  355. { TM6000_REQ07_RE3_VADC_INP_LPF_SEL1, 0x10 },
  356. { TM6000_REQ07_RE5_VADC_INP_LPF_SEL2, 0x00 },
  357. { TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0x00 },
  358. { TM6000_REQ07_REB_VADC_AADC_MODE, 0x64 }, /* 48000 bits/sample, external input */
  359. { TM6000_REQ07_REE_VADC_CTRL_SEL_CONTROL, 0xc2 },
  360. { TM6010_REQ07_R3F_RESET, 0x01 }, /* Start of soft reset */
  361. { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
  362. { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
  363. { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
  364. { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
  365. { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
  366. { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
  367. { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
  368. { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
  369. { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
  370. { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
  371. { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
  372. { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
  373. { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
  374. { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
  375. { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
  376. { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
  377. { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
  378. { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
  379. { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
  380. { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
  381. { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
  382. { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
  383. { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
  384. { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
  385. { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
  386. { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
  387. { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
  388. { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
  389. { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
  390. { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
  391. { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
  392. { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
  393. { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
  394. { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
  395. { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
  396. { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
  397. { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
  398. { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
  399. { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
  400. { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
  401. { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
  402. { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
  403. { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
  404. { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
  405. { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
  406. { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
  407. { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
  408. { TM6010_REQ07_RC3_HSTART1, 0x88 },
  409. { TM6010_REQ07_R3F_RESET, 0x00 }, /* End of the soft reset */
  410. { TM6010_REQ05_R18_IMASK7, 0x00 },
  411. };
  412. static struct reg_init tm6010_init_tab[] = {
  413. { TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x00 },
  414. { TM6010_REQ07_RC4_HSTART0, 0xa0 },
  415. { TM6010_REQ07_RC6_HEND0, 0x40 },
  416. { TM6010_REQ07_RCA_VEND0, 0x31 },
  417. { TM6010_REQ07_RCC_ACTIVE_IF, 0xe1 },
  418. { TM6010_REQ07_RE0_DVIDEO_SOURCE, 0x03 },
  419. { TM6010_REQ07_RFE_POWER_DOWN, 0x7f },
  420. { TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xf0 },
  421. { TM6010_REQ08_RE3_ADC_IN1_SEL, 0xf4 },
  422. { TM6010_REQ08_RE4_ADC_IN2_SEL, 0xf8 },
  423. { TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0x00 },
  424. { TM6010_REQ08_REA_BUFF_DRV_CTRL, 0xf2 },
  425. { TM6010_REQ08_REB_SIF_GAIN_CTRL, 0xf0 },
  426. { TM6010_REQ08_REC_REVERSE_YC_CTRL, 0xc2 },
  427. { TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, 0x60 },
  428. { TM6010_REQ08_RF1_AADC_POWER_DOWN, 0xfc },
  429. { TM6010_REQ07_R3F_RESET, 0x01 },
  430. { TM6010_REQ07_R00_VIDEO_CONTROL0, 0x00 },
  431. { TM6010_REQ07_R01_VIDEO_CONTROL1, 0x07 },
  432. { TM6010_REQ07_R02_VIDEO_CONTROL2, 0x5f },
  433. { TM6010_REQ07_R03_YC_SEP_CONTROL, 0x00 },
  434. { TM6010_REQ07_R05_NOISE_THRESHOLD, 0x64 },
  435. { TM6010_REQ07_R07_OUTPUT_CONTROL, 0x01 },
  436. { TM6010_REQ07_R08_LUMA_CONTRAST_ADJ, 0x82 },
  437. { TM6010_REQ07_R09_LUMA_BRIGHTNESS_ADJ, 0x36 },
  438. { TM6010_REQ07_R0A_CHROMA_SATURATION_ADJ, 0x50 },
  439. { TM6010_REQ07_R0C_CHROMA_AGC_CONTROL, 0x6a },
  440. { TM6010_REQ07_R11_AGC_PEAK_CONTROL, 0xc9 },
  441. { TM6010_REQ07_R12_AGC_GATE_STARTH, 0x07 },
  442. { TM6010_REQ07_R13_AGC_GATE_STARTL, 0x3b },
  443. { TM6010_REQ07_R14_AGC_GATE_WIDTH, 0x47 },
  444. { TM6010_REQ07_R15_AGC_BP_DELAY, 0x6f },
  445. { TM6010_REQ07_R17_HLOOP_MAXSTATE, 0xcd },
  446. { TM6010_REQ07_R18_CHROMA_DTO_INCREMENT3, 0x1e },
  447. { TM6010_REQ07_R19_CHROMA_DTO_INCREMENT2, 0x8b },
  448. { TM6010_REQ07_R1A_CHROMA_DTO_INCREMENT1, 0xa2 },
  449. { TM6010_REQ07_R1B_CHROMA_DTO_INCREMENT0, 0xe9 },
  450. { TM6010_REQ07_R1C_HSYNC_DTO_INCREMENT3, 0x1c },
  451. { TM6010_REQ07_R1D_HSYNC_DTO_INCREMENT2, 0xcc },
  452. { TM6010_REQ07_R1E_HSYNC_DTO_INCREMENT1, 0xcc },
  453. { TM6010_REQ07_R1F_HSYNC_DTO_INCREMENT0, 0xcd },
  454. { TM6010_REQ07_R20_HSYNC_RISING_EDGE_TIME, 0x3c },
  455. { TM6010_REQ07_R21_HSYNC_PHASE_OFFSET, 0x3c },
  456. { TM6010_REQ07_R2D_CHROMA_BURST_END, 0x48 },
  457. { TM6010_REQ07_R2E_ACTIVE_VIDEO_HSTART, 0x88 },
  458. { TM6010_REQ07_R30_ACTIVE_VIDEO_VSTART, 0x22 },
  459. { TM6010_REQ07_R31_ACTIVE_VIDEO_VHIGHT, 0x61 },
  460. { TM6010_REQ07_R32_VSYNC_HLOCK_MIN, 0x74 },
  461. { TM6010_REQ07_R33_VSYNC_HLOCK_MAX, 0x1c },
  462. { TM6010_REQ07_R34_VSYNC_AGC_MIN, 0x74 },
  463. { TM6010_REQ07_R35_VSYNC_AGC_MAX, 0x1c },
  464. { TM6010_REQ07_R36_VSYNC_VBI_MIN, 0x7a },
  465. { TM6010_REQ07_R37_VSYNC_VBI_MAX, 0x26 },
  466. { TM6010_REQ07_R38_VSYNC_THRESHOLD, 0x40 },
  467. { TM6010_REQ07_R39_VSYNC_TIME_CONSTANT, 0x0a },
  468. { TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55 },
  469. { TM6010_REQ07_R51_VBI_DATA_TYPE_LINE21, 0x11 },
  470. { TM6010_REQ07_R55_VBI_LOOP_FILTER_GAIN, 0x01 },
  471. { TM6010_REQ07_R57_VBI_LOOP_FILTER_P_GAIN, 0x02 },
  472. { TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35 },
  473. { TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0 },
  474. { TM6010_REQ07_R80_COMB_FILTER_TRESHOLD, 0x15 },
  475. { TM6010_REQ07_R82_COMB_FILTER_CONFIG, 0x42 },
  476. { TM6010_REQ07_RC1_TRESHOLD, 0xd0 },
  477. { TM6010_REQ07_RC3_HSTART1, 0x88 },
  478. { TM6010_REQ07_R3F_RESET, 0x00 },
  479. { TM6010_REQ05_R18_IMASK7, 0x00 },
  480. { TM6010_REQ07_RDC_IR_LEADER1, 0xaa },
  481. { TM6010_REQ07_RDD_IR_LEADER0, 0x30 },
  482. { TM6010_REQ07_RDE_IR_PULSE_CNT1, 0x20 },
  483. { TM6010_REQ07_RDF_IR_PULSE_CNT0, 0xd0 },
  484. { REQ_04_EN_DISABLE_MCU_INT, 0x02, 0x00 },
  485. { TM6010_REQ07_RD8_IR, 0x0f },
  486. /* set remote wakeup key:any key wakeup */
  487. { TM6010_REQ07_RE5_REMOTE_WAKEUP, 0xfe },
  488. { TM6010_REQ07_RDA_IR_WAKEUP_SEL, 0xff },
  489. };
  490. int tm6000_init(struct tm6000_core *dev)
  491. {
  492. int board, rc = 0, i, size;
  493. struct reg_init *tab;
  494. /* Check board revision */
  495. board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0);
  496. if (board >= 0) {
  497. switch (board & 0xff) {
  498. case 0xf3:
  499. printk(KERN_INFO "Found tm6000\n");
  500. if (dev->dev_type != TM6000)
  501. dev->dev_type = TM6000;
  502. break;
  503. case 0xf4:
  504. printk(KERN_INFO "Found tm6010\n");
  505. if (dev->dev_type != TM6010)
  506. dev->dev_type = TM6010;
  507. break;
  508. default:
  509. printk(KERN_INFO "Unknown board version = 0x%08x\n", board);
  510. }
  511. } else
  512. printk(KERN_ERR "Error %i while retrieving board version\n", board);
  513. if (dev->dev_type == TM6010) {
  514. tab = tm6010_init_tab;
  515. size = ARRAY_SIZE(tm6010_init_tab);
  516. } else {
  517. tab = tm6000_init_tab;
  518. size = ARRAY_SIZE(tm6000_init_tab);
  519. }
  520. /* Load board's initialization table */
  521. for (i = 0; i < size; i++) {
  522. rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val);
  523. if (rc < 0) {
  524. printk(KERN_ERR "Error %i while setting req %d, reg %d to value %d\n",
  525. rc,
  526. tab[i].req, tab[i].reg, tab[i].val);
  527. return rc;
  528. }
  529. }
  530. msleep(5); /* Just to be conservative */
  531. rc = tm6000_cards_setup(dev);
  532. return rc;
  533. }
  534. int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
  535. {
  536. int val = 0;
  537. u8 areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
  538. u8 areg_0a = 0x91; /* SIF 48KHz */
  539. switch (bitrate) {
  540. case 48000:
  541. areg_f0 = 0x60; /* ADC MCLK = 250 Fs */
  542. areg_0a = 0x91; /* SIF 48KHz */
  543. dev->audio_bitrate = bitrate;
  544. break;
  545. case 32000:
  546. areg_f0 = 0x00; /* ADC MCLK = 375 Fs */
  547. areg_0a = 0x90; /* SIF 32KHz */
  548. dev->audio_bitrate = bitrate;
  549. break;
  550. default:
  551. return -EINVAL;
  552. }
  553. /* enable I2S, if we use sif or external I2S device */
  554. if (dev->dev_type == TM6010) {
  555. val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a);
  556. if (val < 0)
  557. return val;
  558. val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
  559. areg_f0, 0xf0);
  560. if (val < 0)
  561. return val;
  562. } else {
  563. val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
  564. areg_f0, 0xf0);
  565. if (val < 0)
  566. return val;
  567. }
  568. return 0;
  569. }
  570. EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);
  571. int tm6000_set_audio_rinput(struct tm6000_core *dev)
  572. {
  573. if (dev->dev_type == TM6010) {
  574. /* Audio crossbar setting, default SIF1 */
  575. u8 areg_f0;
  576. u8 areg_07 = 0x10;
  577. switch (dev->rinput.amux) {
  578. case TM6000_AMUX_SIF1:
  579. case TM6000_AMUX_SIF2:
  580. areg_f0 = 0x03;
  581. areg_07 = 0x30;
  582. break;
  583. case TM6000_AMUX_ADC1:
  584. areg_f0 = 0x00;
  585. break;
  586. case TM6000_AMUX_ADC2:
  587. areg_f0 = 0x08;
  588. break;
  589. case TM6000_AMUX_I2S:
  590. areg_f0 = 0x04;
  591. break;
  592. default:
  593. printk(KERN_INFO "%s: audio input dosn't support\n",
  594. dev->name);
  595. return 0;
  596. break;
  597. }
  598. /* Set audio input crossbar */
  599. tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG,
  600. areg_f0, 0x0f);
  601. /* Mux overflow workaround */
  602. tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL,
  603. areg_07, 0xf0);
  604. } else {
  605. u8 areg_eb;
  606. /* Audio setting, default LINE1 */
  607. switch (dev->rinput.amux) {
  608. case TM6000_AMUX_ADC1:
  609. areg_eb = 0x00;
  610. break;
  611. case TM6000_AMUX_ADC2:
  612. areg_eb = 0x04;
  613. break;
  614. default:
  615. printk(KERN_INFO "%s: audio input dosn't support\n",
  616. dev->name);
  617. return 0;
  618. break;
  619. }
  620. /* Set audio input */
  621. tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE,
  622. areg_eb, 0x0f);
  623. }
  624. return 0;
  625. }
  626. static void tm6010_set_mute_sif(struct tm6000_core *dev, u8 mute)
  627. {
  628. u8 mute_reg = 0;
  629. if (mute)
  630. mute_reg = 0x08;
  631. tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08);
  632. }
  633. static void tm6010_set_mute_adc(struct tm6000_core *dev, u8 mute)
  634. {
  635. u8 mute_reg = 0;
  636. if (mute)
  637. mute_reg = 0x20;
  638. if (dev->dev_type == TM6010) {
  639. tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL,
  640. mute_reg, 0x20);
  641. tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL,
  642. mute_reg, 0x20);
  643. } else {
  644. tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL,
  645. mute_reg, 0x20);
  646. tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL,
  647. mute_reg, 0x20);
  648. }
  649. }
  650. int tm6000_tvaudio_set_mute(struct tm6000_core *dev, u8 mute)
  651. {
  652. enum tm6000_mux mux;
  653. if (dev->radio)
  654. mux = dev->rinput.amux;
  655. else
  656. mux = dev->vinput[dev->input].amux;
  657. switch (mux) {
  658. case TM6000_AMUX_SIF1:
  659. case TM6000_AMUX_SIF2:
  660. if (dev->dev_type == TM6010)
  661. tm6010_set_mute_sif(dev, mute);
  662. else {
  663. printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has SIF audio inputs. Please check the %s configuration.\n",
  664. dev->name);
  665. return -EINVAL;
  666. }
  667. break;
  668. case TM6000_AMUX_ADC1:
  669. case TM6000_AMUX_ADC2:
  670. tm6010_set_mute_adc(dev, mute);
  671. break;
  672. default:
  673. return -EINVAL;
  674. break;
  675. }
  676. return 0;
  677. }
  678. static void tm6010_set_volume_sif(struct tm6000_core *dev, int vol)
  679. {
  680. u8 vol_reg;
  681. vol_reg = vol & 0x0F;
  682. if (vol < 0)
  683. vol_reg |= 0x40;
  684. tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg);
  685. tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg);
  686. }
  687. static void tm6010_set_volume_adc(struct tm6000_core *dev, int vol)
  688. {
  689. u8 vol_reg;
  690. vol_reg = (vol + 0x10) & 0x1f;
  691. if (dev->dev_type == TM6010) {
  692. tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg);
  693. tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg);
  694. } else {
  695. tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg);
  696. tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg);
  697. }
  698. }
  699. void tm6000_set_volume(struct tm6000_core *dev, int vol)
  700. {
  701. enum tm6000_mux mux;
  702. if (dev->radio) {
  703. mux = dev->rinput.amux;
  704. vol += 8; /* Offset to 0 dB */
  705. } else
  706. mux = dev->vinput[dev->input].amux;
  707. switch (mux) {
  708. case TM6000_AMUX_SIF1:
  709. case TM6000_AMUX_SIF2:
  710. if (dev->dev_type == TM6010)
  711. tm6010_set_volume_sif(dev, vol);
  712. else
  713. printk(KERN_INFO "ERROR: TM5600 and TM6000 don't has SIF audio inputs. Please check the %s configuration.\n",
  714. dev->name);
  715. break;
  716. case TM6000_AMUX_ADC1:
  717. case TM6000_AMUX_ADC2:
  718. tm6010_set_volume_adc(dev, vol);
  719. break;
  720. default:
  721. break;
  722. }
  723. }
  724. static LIST_HEAD(tm6000_devlist);
  725. static DEFINE_MUTEX(tm6000_devlist_mutex);
  726. /*
  727. * tm6000_realease_resource()
  728. */
  729. void tm6000_remove_from_devlist(struct tm6000_core *dev)
  730. {
  731. mutex_lock(&tm6000_devlist_mutex);
  732. list_del(&dev->devlist);
  733. mutex_unlock(&tm6000_devlist_mutex);
  734. };
  735. void tm6000_add_into_devlist(struct tm6000_core *dev)
  736. {
  737. mutex_lock(&tm6000_devlist_mutex);
  738. list_add_tail(&dev->devlist, &tm6000_devlist);
  739. mutex_unlock(&tm6000_devlist_mutex);
  740. };
  741. /*
  742. * Extension interface
  743. */
  744. static LIST_HEAD(tm6000_extension_devlist);
  745. int tm6000_call_fillbuf(struct tm6000_core *dev, enum tm6000_ops_type type,
  746. char *buf, int size)
  747. {
  748. struct tm6000_ops *ops = NULL;
  749. /* FIXME: tm6000_extension_devlist_lock should be a spinlock */
  750. if (!list_empty(&tm6000_extension_devlist)) {
  751. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  752. if (ops->fillbuf && ops->type == type)
  753. ops->fillbuf(dev, buf, size);
  754. }
  755. }
  756. return 0;
  757. }
  758. int tm6000_register_extension(struct tm6000_ops *ops)
  759. {
  760. struct tm6000_core *dev = NULL;
  761. mutex_lock(&tm6000_devlist_mutex);
  762. list_add_tail(&ops->next, &tm6000_extension_devlist);
  763. list_for_each_entry(dev, &tm6000_devlist, devlist) {
  764. ops->init(dev);
  765. printk(KERN_INFO "%s: Initialized (%s) extension\n",
  766. dev->name, ops->name);
  767. }
  768. mutex_unlock(&tm6000_devlist_mutex);
  769. return 0;
  770. }
  771. EXPORT_SYMBOL(tm6000_register_extension);
  772. void tm6000_unregister_extension(struct tm6000_ops *ops)
  773. {
  774. struct tm6000_core *dev = NULL;
  775. mutex_lock(&tm6000_devlist_mutex);
  776. list_for_each_entry(dev, &tm6000_devlist, devlist)
  777. ops->fini(dev);
  778. printk(KERN_INFO "tm6000: Remove (%s) extension\n", ops->name);
  779. list_del(&ops->next);
  780. mutex_unlock(&tm6000_devlist_mutex);
  781. }
  782. EXPORT_SYMBOL(tm6000_unregister_extension);
  783. void tm6000_init_extension(struct tm6000_core *dev)
  784. {
  785. struct tm6000_ops *ops = NULL;
  786. mutex_lock(&tm6000_devlist_mutex);
  787. if (!list_empty(&tm6000_extension_devlist)) {
  788. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  789. if (ops->init)
  790. ops->init(dev);
  791. }
  792. }
  793. mutex_unlock(&tm6000_devlist_mutex);
  794. }
  795. void tm6000_close_extension(struct tm6000_core *dev)
  796. {
  797. struct tm6000_ops *ops = NULL;
  798. mutex_lock(&tm6000_devlist_mutex);
  799. if (!list_empty(&tm6000_extension_devlist)) {
  800. list_for_each_entry(ops, &tm6000_extension_devlist, next) {
  801. if (ops->fini)
  802. ops->fini(dev);
  803. }
  804. }
  805. mutex_unlock(&tm6000_devlist_mutex);
  806. }