atmel-isi.c 34 KB

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  1. /*
  2. * Copyright (c) 2011 Atmel Corporation
  3. * Josh Wu, <josh.wu@atmel.com>
  4. *
  5. * Based on previous work by Lars Haring, <lars.haring@atmel.com>
  6. * and Sedji Gaouaou
  7. * Based on the bttv driver for Bt848 with respective copyright holders
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/completion.h>
  15. #include <linux/delay.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/of_graph.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/of.h>
  26. #include <linux/videodev2.h>
  27. #include <media/v4l2-ctrls.h>
  28. #include <media/v4l2-device.h>
  29. #include <media/v4l2-dev.h>
  30. #include <media/v4l2-ioctl.h>
  31. #include <media/v4l2-event.h>
  32. #include <media/v4l2-fwnode.h>
  33. #include <media/videobuf2-dma-contig.h>
  34. #include <media/v4l2-image-sizes.h>
  35. #include "atmel-isi.h"
  36. #define MAX_SUPPORT_WIDTH 2048U
  37. #define MAX_SUPPORT_HEIGHT 2048U
  38. #define MIN_FRAME_RATE 15
  39. #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE)
  40. /* Frame buffer descriptor */
  41. struct fbd {
  42. /* Physical address of the frame buffer */
  43. u32 fb_address;
  44. /* DMA Control Register(only in HISI2) */
  45. u32 dma_ctrl;
  46. /* Physical address of the next fbd */
  47. u32 next_fbd_address;
  48. };
  49. static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl)
  50. {
  51. fb_desc->dma_ctrl = ctrl;
  52. }
  53. struct isi_dma_desc {
  54. struct list_head list;
  55. struct fbd *p_fbd;
  56. dma_addr_t fbd_phys;
  57. };
  58. /* Frame buffer data */
  59. struct frame_buffer {
  60. struct vb2_v4l2_buffer vb;
  61. struct isi_dma_desc *p_dma_desc;
  62. struct list_head list;
  63. };
  64. struct isi_graph_entity {
  65. struct device_node *node;
  66. struct v4l2_async_subdev asd;
  67. struct v4l2_subdev *subdev;
  68. };
  69. /*
  70. * struct isi_format - ISI media bus format information
  71. * @fourcc: Fourcc code for this format
  72. * @mbus_code: V4L2 media bus format code.
  73. * @bpp: Bytes per pixel (when stored in memory)
  74. * @swap: Byte swap configuration value
  75. * @support: Indicates format supported by subdev
  76. * @skip: Skip duplicate format supported by subdev
  77. */
  78. struct isi_format {
  79. u32 fourcc;
  80. u32 mbus_code;
  81. u8 bpp;
  82. u32 swap;
  83. };
  84. struct atmel_isi {
  85. /* Protects the access of variables shared with the ISR */
  86. spinlock_t irqlock;
  87. struct device *dev;
  88. void __iomem *regs;
  89. int sequence;
  90. /* Allocate descriptors for dma buffer use */
  91. struct fbd *p_fb_descriptors;
  92. dma_addr_t fb_descriptors_phys;
  93. struct list_head dma_desc_head;
  94. struct isi_dma_desc dma_desc[VIDEO_MAX_FRAME];
  95. bool enable_preview_path;
  96. struct completion complete;
  97. /* ISI peripherial clock */
  98. struct clk *pclk;
  99. unsigned int irq;
  100. struct isi_platform_data pdata;
  101. u16 width_flags; /* max 12 bits */
  102. struct list_head video_buffer_list;
  103. struct frame_buffer *active;
  104. struct v4l2_device v4l2_dev;
  105. struct video_device *vdev;
  106. struct v4l2_async_notifier notifier;
  107. struct isi_graph_entity entity;
  108. struct v4l2_format fmt;
  109. const struct isi_format **user_formats;
  110. unsigned int num_user_formats;
  111. const struct isi_format *current_fmt;
  112. struct mutex lock;
  113. struct vb2_queue queue;
  114. };
  115. #define notifier_to_isi(n) container_of(n, struct atmel_isi, notifier)
  116. static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val)
  117. {
  118. writel(val, isi->regs + reg);
  119. }
  120. static u32 isi_readl(struct atmel_isi *isi, u32 reg)
  121. {
  122. return readl(isi->regs + reg);
  123. }
  124. static void configure_geometry(struct atmel_isi *isi)
  125. {
  126. u32 cfg2, psize;
  127. u32 fourcc = isi->current_fmt->fourcc;
  128. isi->enable_preview_path = fourcc == V4L2_PIX_FMT_RGB565 ||
  129. fourcc == V4L2_PIX_FMT_RGB32;
  130. /* According to sensor's output format to set cfg2 */
  131. cfg2 = isi->current_fmt->swap;
  132. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  133. /* Set width */
  134. cfg2 |= ((isi->fmt.fmt.pix.width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) &
  135. ISI_CFG2_IM_HSIZE_MASK;
  136. /* Set height */
  137. cfg2 |= ((isi->fmt.fmt.pix.height - 1) << ISI_CFG2_IM_VSIZE_OFFSET)
  138. & ISI_CFG2_IM_VSIZE_MASK;
  139. isi_writel(isi, ISI_CFG2, cfg2);
  140. /* No down sampling, preview size equal to sensor output size */
  141. psize = ((isi->fmt.fmt.pix.width - 1) << ISI_PSIZE_PREV_HSIZE_OFFSET) &
  142. ISI_PSIZE_PREV_HSIZE_MASK;
  143. psize |= ((isi->fmt.fmt.pix.height - 1) << ISI_PSIZE_PREV_VSIZE_OFFSET) &
  144. ISI_PSIZE_PREV_VSIZE_MASK;
  145. isi_writel(isi, ISI_PSIZE, psize);
  146. isi_writel(isi, ISI_PDECF, ISI_PDECF_NO_SAMPLING);
  147. }
  148. static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi)
  149. {
  150. if (isi->active) {
  151. struct vb2_v4l2_buffer *vbuf = &isi->active->vb;
  152. struct frame_buffer *buf = isi->active;
  153. list_del_init(&buf->list);
  154. vbuf->vb2_buf.timestamp = ktime_get_ns();
  155. vbuf->sequence = isi->sequence++;
  156. vbuf->field = V4L2_FIELD_NONE;
  157. vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE);
  158. }
  159. if (list_empty(&isi->video_buffer_list)) {
  160. isi->active = NULL;
  161. } else {
  162. /* start next dma frame. */
  163. isi->active = list_entry(isi->video_buffer_list.next,
  164. struct frame_buffer, list);
  165. if (!isi->enable_preview_path) {
  166. isi_writel(isi, ISI_DMA_C_DSCR,
  167. (u32)isi->active->p_dma_desc->fbd_phys);
  168. isi_writel(isi, ISI_DMA_C_CTRL,
  169. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  170. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  171. } else {
  172. isi_writel(isi, ISI_DMA_P_DSCR,
  173. (u32)isi->active->p_dma_desc->fbd_phys);
  174. isi_writel(isi, ISI_DMA_P_CTRL,
  175. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  176. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_P_CH);
  177. }
  178. }
  179. return IRQ_HANDLED;
  180. }
  181. /* ISI interrupt service routine */
  182. static irqreturn_t isi_interrupt(int irq, void *dev_id)
  183. {
  184. struct atmel_isi *isi = dev_id;
  185. u32 status, mask, pending;
  186. irqreturn_t ret = IRQ_NONE;
  187. spin_lock(&isi->irqlock);
  188. status = isi_readl(isi, ISI_STATUS);
  189. mask = isi_readl(isi, ISI_INTMASK);
  190. pending = status & mask;
  191. if (pending & ISI_CTRL_SRST) {
  192. complete(&isi->complete);
  193. isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST);
  194. ret = IRQ_HANDLED;
  195. } else if (pending & ISI_CTRL_DIS) {
  196. complete(&isi->complete);
  197. isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS);
  198. ret = IRQ_HANDLED;
  199. } else {
  200. if (likely(pending & ISI_SR_CXFR_DONE) ||
  201. likely(pending & ISI_SR_PXFR_DONE))
  202. ret = atmel_isi_handle_streaming(isi);
  203. }
  204. spin_unlock(&isi->irqlock);
  205. return ret;
  206. }
  207. #define WAIT_ISI_RESET 1
  208. #define WAIT_ISI_DISABLE 0
  209. static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset)
  210. {
  211. unsigned long timeout;
  212. /*
  213. * The reset or disable will only succeed if we have a
  214. * pixel clock from the camera.
  215. */
  216. init_completion(&isi->complete);
  217. if (wait_reset) {
  218. isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST);
  219. isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST);
  220. } else {
  221. isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS);
  222. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  223. }
  224. timeout = wait_for_completion_timeout(&isi->complete,
  225. msecs_to_jiffies(500));
  226. if (timeout == 0)
  227. return -ETIMEDOUT;
  228. return 0;
  229. }
  230. /* ------------------------------------------------------------------
  231. Videobuf operations
  232. ------------------------------------------------------------------*/
  233. static int queue_setup(struct vb2_queue *vq,
  234. unsigned int *nbuffers, unsigned int *nplanes,
  235. unsigned int sizes[], struct device *alloc_devs[])
  236. {
  237. struct atmel_isi *isi = vb2_get_drv_priv(vq);
  238. unsigned long size;
  239. size = isi->fmt.fmt.pix.sizeimage;
  240. /* Make sure the image size is large enough. */
  241. if (*nplanes)
  242. return sizes[0] < size ? -EINVAL : 0;
  243. *nplanes = 1;
  244. sizes[0] = size;
  245. isi->active = NULL;
  246. dev_dbg(isi->dev, "%s, count=%d, size=%ld\n", __func__,
  247. *nbuffers, size);
  248. return 0;
  249. }
  250. static int buffer_init(struct vb2_buffer *vb)
  251. {
  252. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  253. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  254. buf->p_dma_desc = NULL;
  255. INIT_LIST_HEAD(&buf->list);
  256. return 0;
  257. }
  258. static int buffer_prepare(struct vb2_buffer *vb)
  259. {
  260. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  261. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  262. struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue);
  263. unsigned long size;
  264. struct isi_dma_desc *desc;
  265. size = isi->fmt.fmt.pix.sizeimage;
  266. if (vb2_plane_size(vb, 0) < size) {
  267. dev_err(isi->dev, "%s data will not fit into plane (%lu < %lu)\n",
  268. __func__, vb2_plane_size(vb, 0), size);
  269. return -EINVAL;
  270. }
  271. vb2_set_plane_payload(vb, 0, size);
  272. if (!buf->p_dma_desc) {
  273. if (list_empty(&isi->dma_desc_head)) {
  274. dev_err(isi->dev, "Not enough dma descriptors.\n");
  275. return -EINVAL;
  276. } else {
  277. /* Get an available descriptor */
  278. desc = list_entry(isi->dma_desc_head.next,
  279. struct isi_dma_desc, list);
  280. /* Delete the descriptor since now it is used */
  281. list_del_init(&desc->list);
  282. /* Initialize the dma descriptor */
  283. desc->p_fbd->fb_address =
  284. vb2_dma_contig_plane_dma_addr(vb, 0);
  285. desc->p_fbd->next_fbd_address = 0;
  286. set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB);
  287. buf->p_dma_desc = desc;
  288. }
  289. }
  290. return 0;
  291. }
  292. static void buffer_cleanup(struct vb2_buffer *vb)
  293. {
  294. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  295. struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue);
  296. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  297. /* This descriptor is available now and we add to head list */
  298. if (buf->p_dma_desc)
  299. list_add(&buf->p_dma_desc->list, &isi->dma_desc_head);
  300. }
  301. static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
  302. {
  303. u32 ctrl, cfg1;
  304. cfg1 = isi_readl(isi, ISI_CFG1);
  305. /* Enable irq: cxfr for the codec path, pxfr for the preview path */
  306. isi_writel(isi, ISI_INTEN,
  307. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  308. /* Check if already in a frame */
  309. if (!isi->enable_preview_path) {
  310. if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) {
  311. dev_err(isi->dev, "Already in frame handling.\n");
  312. return;
  313. }
  314. isi_writel(isi, ISI_DMA_C_DSCR,
  315. (u32)buffer->p_dma_desc->fbd_phys);
  316. isi_writel(isi, ISI_DMA_C_CTRL,
  317. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  318. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  319. } else {
  320. isi_writel(isi, ISI_DMA_P_DSCR,
  321. (u32)buffer->p_dma_desc->fbd_phys);
  322. isi_writel(isi, ISI_DMA_P_CTRL,
  323. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  324. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_P_CH);
  325. }
  326. cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK;
  327. /* Enable linked list */
  328. cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR;
  329. /* Enable ISI */
  330. ctrl = ISI_CTRL_EN;
  331. if (!isi->enable_preview_path)
  332. ctrl |= ISI_CTRL_CDC;
  333. isi_writel(isi, ISI_CTRL, ctrl);
  334. isi_writel(isi, ISI_CFG1, cfg1);
  335. }
  336. static void buffer_queue(struct vb2_buffer *vb)
  337. {
  338. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  339. struct atmel_isi *isi = vb2_get_drv_priv(vb->vb2_queue);
  340. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  341. unsigned long flags = 0;
  342. spin_lock_irqsave(&isi->irqlock, flags);
  343. list_add_tail(&buf->list, &isi->video_buffer_list);
  344. if (isi->active == NULL) {
  345. isi->active = buf;
  346. if (vb2_is_streaming(vb->vb2_queue))
  347. start_dma(isi, buf);
  348. }
  349. spin_unlock_irqrestore(&isi->irqlock, flags);
  350. }
  351. static int start_streaming(struct vb2_queue *vq, unsigned int count)
  352. {
  353. struct atmel_isi *isi = vb2_get_drv_priv(vq);
  354. struct frame_buffer *buf, *node;
  355. int ret;
  356. pm_runtime_get_sync(isi->dev);
  357. /* Enable stream on the sub device */
  358. ret = v4l2_subdev_call(isi->entity.subdev, video, s_stream, 1);
  359. if (ret && ret != -ENOIOCTLCMD) {
  360. dev_err(isi->dev, "stream on failed in subdev\n");
  361. goto err_start_stream;
  362. }
  363. /* Reset ISI */
  364. ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET);
  365. if (ret < 0) {
  366. dev_err(isi->dev, "Reset ISI timed out\n");
  367. goto err_reset;
  368. }
  369. /* Disable all interrupts */
  370. isi_writel(isi, ISI_INTDIS, (u32)~0UL);
  371. isi->sequence = 0;
  372. configure_geometry(isi);
  373. spin_lock_irq(&isi->irqlock);
  374. /* Clear any pending interrupt */
  375. isi_readl(isi, ISI_STATUS);
  376. start_dma(isi, isi->active);
  377. spin_unlock_irq(&isi->irqlock);
  378. return 0;
  379. err_reset:
  380. v4l2_subdev_call(isi->entity.subdev, video, s_stream, 0);
  381. err_start_stream:
  382. pm_runtime_put(isi->dev);
  383. spin_lock_irq(&isi->irqlock);
  384. isi->active = NULL;
  385. /* Release all active buffers */
  386. list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) {
  387. list_del_init(&buf->list);
  388. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
  389. }
  390. spin_unlock_irq(&isi->irqlock);
  391. return ret;
  392. }
  393. /* abort streaming and wait for last buffer */
  394. static void stop_streaming(struct vb2_queue *vq)
  395. {
  396. struct atmel_isi *isi = vb2_get_drv_priv(vq);
  397. struct frame_buffer *buf, *node;
  398. int ret = 0;
  399. unsigned long timeout;
  400. /* Disable stream on the sub device */
  401. ret = v4l2_subdev_call(isi->entity.subdev, video, s_stream, 0);
  402. if (ret && ret != -ENOIOCTLCMD)
  403. dev_err(isi->dev, "stream off failed in subdev\n");
  404. spin_lock_irq(&isi->irqlock);
  405. isi->active = NULL;
  406. /* Release all active buffers */
  407. list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) {
  408. list_del_init(&buf->list);
  409. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  410. }
  411. spin_unlock_irq(&isi->irqlock);
  412. if (!isi->enable_preview_path) {
  413. timeout = jiffies + (FRAME_INTERVAL_MILLI_SEC * HZ) / 1000;
  414. /* Wait until the end of the current frame. */
  415. while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) &&
  416. time_before(jiffies, timeout))
  417. msleep(1);
  418. if (time_after(jiffies, timeout))
  419. dev_err(isi->dev,
  420. "Timeout waiting for finishing codec request\n");
  421. }
  422. /* Disable interrupts */
  423. isi_writel(isi, ISI_INTDIS,
  424. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  425. /* Disable ISI and wait for it is done */
  426. ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE);
  427. if (ret < 0)
  428. dev_err(isi->dev, "Disable ISI timed out\n");
  429. pm_runtime_put(isi->dev);
  430. }
  431. static const struct vb2_ops isi_video_qops = {
  432. .queue_setup = queue_setup,
  433. .buf_init = buffer_init,
  434. .buf_prepare = buffer_prepare,
  435. .buf_cleanup = buffer_cleanup,
  436. .buf_queue = buffer_queue,
  437. .start_streaming = start_streaming,
  438. .stop_streaming = stop_streaming,
  439. .wait_prepare = vb2_ops_wait_prepare,
  440. .wait_finish = vb2_ops_wait_finish,
  441. };
  442. static int isi_g_fmt_vid_cap(struct file *file, void *priv,
  443. struct v4l2_format *fmt)
  444. {
  445. struct atmel_isi *isi = video_drvdata(file);
  446. *fmt = isi->fmt;
  447. return 0;
  448. }
  449. static const struct isi_format *find_format_by_fourcc(struct atmel_isi *isi,
  450. unsigned int fourcc)
  451. {
  452. unsigned int num_formats = isi->num_user_formats;
  453. const struct isi_format *fmt;
  454. unsigned int i;
  455. for (i = 0; i < num_formats; i++) {
  456. fmt = isi->user_formats[i];
  457. if (fmt->fourcc == fourcc)
  458. return fmt;
  459. }
  460. return NULL;
  461. }
  462. static int isi_try_fmt(struct atmel_isi *isi, struct v4l2_format *f,
  463. const struct isi_format **current_fmt)
  464. {
  465. const struct isi_format *isi_fmt;
  466. struct v4l2_pix_format *pixfmt = &f->fmt.pix;
  467. struct v4l2_subdev_pad_config pad_cfg;
  468. struct v4l2_subdev_format format = {
  469. .which = V4L2_SUBDEV_FORMAT_TRY,
  470. };
  471. int ret;
  472. isi_fmt = find_format_by_fourcc(isi, pixfmt->pixelformat);
  473. if (!isi_fmt) {
  474. isi_fmt = isi->user_formats[isi->num_user_formats - 1];
  475. pixfmt->pixelformat = isi_fmt->fourcc;
  476. }
  477. /* Limit to Atmel ISI hardware capabilities */
  478. pixfmt->width = clamp(pixfmt->width, 0U, MAX_SUPPORT_WIDTH);
  479. pixfmt->height = clamp(pixfmt->height, 0U, MAX_SUPPORT_HEIGHT);
  480. v4l2_fill_mbus_format(&format.format, pixfmt, isi_fmt->mbus_code);
  481. ret = v4l2_subdev_call(isi->entity.subdev, pad, set_fmt,
  482. &pad_cfg, &format);
  483. if (ret < 0)
  484. return ret;
  485. v4l2_fill_pix_format(pixfmt, &format.format);
  486. pixfmt->field = V4L2_FIELD_NONE;
  487. pixfmt->bytesperline = pixfmt->width * isi_fmt->bpp;
  488. pixfmt->sizeimage = pixfmt->bytesperline * pixfmt->height;
  489. if (current_fmt)
  490. *current_fmt = isi_fmt;
  491. return 0;
  492. }
  493. static int isi_set_fmt(struct atmel_isi *isi, struct v4l2_format *f)
  494. {
  495. struct v4l2_subdev_format format = {
  496. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  497. };
  498. const struct isi_format *current_fmt;
  499. int ret;
  500. ret = isi_try_fmt(isi, f, &current_fmt);
  501. if (ret)
  502. return ret;
  503. v4l2_fill_mbus_format(&format.format, &f->fmt.pix,
  504. current_fmt->mbus_code);
  505. ret = v4l2_subdev_call(isi->entity.subdev, pad,
  506. set_fmt, NULL, &format);
  507. if (ret < 0)
  508. return ret;
  509. isi->fmt = *f;
  510. isi->current_fmt = current_fmt;
  511. return 0;
  512. }
  513. static int isi_s_fmt_vid_cap(struct file *file, void *priv,
  514. struct v4l2_format *f)
  515. {
  516. struct atmel_isi *isi = video_drvdata(file);
  517. if (vb2_is_streaming(&isi->queue))
  518. return -EBUSY;
  519. return isi_set_fmt(isi, f);
  520. }
  521. static int isi_try_fmt_vid_cap(struct file *file, void *priv,
  522. struct v4l2_format *f)
  523. {
  524. struct atmel_isi *isi = video_drvdata(file);
  525. return isi_try_fmt(isi, f, NULL);
  526. }
  527. static int isi_enum_fmt_vid_cap(struct file *file, void *priv,
  528. struct v4l2_fmtdesc *f)
  529. {
  530. struct atmel_isi *isi = video_drvdata(file);
  531. if (f->index >= isi->num_user_formats)
  532. return -EINVAL;
  533. f->pixelformat = isi->user_formats[f->index]->fourcc;
  534. return 0;
  535. }
  536. static int isi_querycap(struct file *file, void *priv,
  537. struct v4l2_capability *cap)
  538. {
  539. strlcpy(cap->driver, "atmel-isi", sizeof(cap->driver));
  540. strlcpy(cap->card, "Atmel Image Sensor Interface", sizeof(cap->card));
  541. strlcpy(cap->bus_info, "platform:isi", sizeof(cap->bus_info));
  542. return 0;
  543. }
  544. static int isi_enum_input(struct file *file, void *priv,
  545. struct v4l2_input *i)
  546. {
  547. if (i->index != 0)
  548. return -EINVAL;
  549. i->type = V4L2_INPUT_TYPE_CAMERA;
  550. strlcpy(i->name, "Camera", sizeof(i->name));
  551. return 0;
  552. }
  553. static int isi_g_input(struct file *file, void *priv, unsigned int *i)
  554. {
  555. *i = 0;
  556. return 0;
  557. }
  558. static int isi_s_input(struct file *file, void *priv, unsigned int i)
  559. {
  560. if (i > 0)
  561. return -EINVAL;
  562. return 0;
  563. }
  564. static int isi_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a)
  565. {
  566. struct atmel_isi *isi = video_drvdata(file);
  567. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  568. return -EINVAL;
  569. a->parm.capture.readbuffers = 2;
  570. return v4l2_subdev_call(isi->entity.subdev, video, g_parm, a);
  571. }
  572. static int isi_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a)
  573. {
  574. struct atmel_isi *isi = video_drvdata(file);
  575. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  576. return -EINVAL;
  577. a->parm.capture.readbuffers = 2;
  578. return v4l2_subdev_call(isi->entity.subdev, video, s_parm, a);
  579. }
  580. static int isi_enum_framesizes(struct file *file, void *fh,
  581. struct v4l2_frmsizeenum *fsize)
  582. {
  583. struct atmel_isi *isi = video_drvdata(file);
  584. const struct isi_format *isi_fmt;
  585. struct v4l2_subdev_frame_size_enum fse = {
  586. .index = fsize->index,
  587. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  588. };
  589. int ret;
  590. isi_fmt = find_format_by_fourcc(isi, fsize->pixel_format);
  591. if (!isi_fmt)
  592. return -EINVAL;
  593. fse.code = isi_fmt->mbus_code;
  594. ret = v4l2_subdev_call(isi->entity.subdev, pad, enum_frame_size,
  595. NULL, &fse);
  596. if (ret)
  597. return ret;
  598. fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
  599. fsize->discrete.width = fse.max_width;
  600. fsize->discrete.height = fse.max_height;
  601. return 0;
  602. }
  603. static int isi_enum_frameintervals(struct file *file, void *fh,
  604. struct v4l2_frmivalenum *fival)
  605. {
  606. struct atmel_isi *isi = video_drvdata(file);
  607. const struct isi_format *isi_fmt;
  608. struct v4l2_subdev_frame_interval_enum fie = {
  609. .index = fival->index,
  610. .width = fival->width,
  611. .height = fival->height,
  612. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  613. };
  614. int ret;
  615. isi_fmt = find_format_by_fourcc(isi, fival->pixel_format);
  616. if (!isi_fmt)
  617. return -EINVAL;
  618. fie.code = isi_fmt->mbus_code;
  619. ret = v4l2_subdev_call(isi->entity.subdev, pad,
  620. enum_frame_interval, NULL, &fie);
  621. if (ret)
  622. return ret;
  623. fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
  624. fival->discrete = fie.interval;
  625. return 0;
  626. }
  627. static void isi_camera_set_bus_param(struct atmel_isi *isi)
  628. {
  629. u32 cfg1 = 0;
  630. /* set bus param for ISI */
  631. if (isi->pdata.hsync_act_low)
  632. cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW;
  633. if (isi->pdata.vsync_act_low)
  634. cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW;
  635. if (isi->pdata.pclk_act_falling)
  636. cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING;
  637. if (isi->pdata.has_emb_sync)
  638. cfg1 |= ISI_CFG1_EMB_SYNC;
  639. if (isi->pdata.full_mode)
  640. cfg1 |= ISI_CFG1_FULL_MODE;
  641. cfg1 |= ISI_CFG1_THMASK_BEATS_16;
  642. /* Enable PM and peripheral clock before operate isi registers */
  643. pm_runtime_get_sync(isi->dev);
  644. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  645. isi_writel(isi, ISI_CFG1, cfg1);
  646. pm_runtime_put(isi->dev);
  647. }
  648. /* -----------------------------------------------------------------------*/
  649. static int atmel_isi_parse_dt(struct atmel_isi *isi,
  650. struct platform_device *pdev)
  651. {
  652. struct device_node *np = pdev->dev.of_node;
  653. struct v4l2_fwnode_endpoint ep;
  654. int err;
  655. /* Default settings for ISI */
  656. isi->pdata.full_mode = 1;
  657. isi->pdata.frate = ISI_CFG1_FRATE_CAPTURE_ALL;
  658. np = of_graph_get_next_endpoint(np, NULL);
  659. if (!np) {
  660. dev_err(&pdev->dev, "Could not find the endpoint\n");
  661. return -EINVAL;
  662. }
  663. err = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep);
  664. of_node_put(np);
  665. if (err) {
  666. dev_err(&pdev->dev, "Could not parse the endpoint\n");
  667. return err;
  668. }
  669. switch (ep.bus.parallel.bus_width) {
  670. case 8:
  671. isi->pdata.data_width_flags = ISI_DATAWIDTH_8;
  672. break;
  673. case 10:
  674. isi->pdata.data_width_flags =
  675. ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10;
  676. break;
  677. default:
  678. dev_err(&pdev->dev, "Unsupported bus width: %d\n",
  679. ep.bus.parallel.bus_width);
  680. return -EINVAL;
  681. }
  682. if (ep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
  683. isi->pdata.hsync_act_low = true;
  684. if (ep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
  685. isi->pdata.vsync_act_low = true;
  686. if (ep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
  687. isi->pdata.pclk_act_falling = true;
  688. if (ep.bus_type == V4L2_MBUS_BT656)
  689. isi->pdata.has_emb_sync = true;
  690. return 0;
  691. }
  692. static int isi_open(struct file *file)
  693. {
  694. struct atmel_isi *isi = video_drvdata(file);
  695. struct v4l2_subdev *sd = isi->entity.subdev;
  696. int ret;
  697. if (mutex_lock_interruptible(&isi->lock))
  698. return -ERESTARTSYS;
  699. ret = v4l2_fh_open(file);
  700. if (ret < 0)
  701. goto unlock;
  702. if (!v4l2_fh_is_singular_file(file))
  703. goto fh_rel;
  704. ret = v4l2_subdev_call(sd, core, s_power, 1);
  705. if (ret < 0 && ret != -ENOIOCTLCMD)
  706. goto fh_rel;
  707. ret = isi_set_fmt(isi, &isi->fmt);
  708. if (ret)
  709. v4l2_subdev_call(sd, core, s_power, 0);
  710. fh_rel:
  711. if (ret)
  712. v4l2_fh_release(file);
  713. unlock:
  714. mutex_unlock(&isi->lock);
  715. return ret;
  716. }
  717. static int isi_release(struct file *file)
  718. {
  719. struct atmel_isi *isi = video_drvdata(file);
  720. struct v4l2_subdev *sd = isi->entity.subdev;
  721. bool fh_singular;
  722. int ret;
  723. mutex_lock(&isi->lock);
  724. fh_singular = v4l2_fh_is_singular_file(file);
  725. ret = _vb2_fop_release(file, NULL);
  726. if (fh_singular)
  727. v4l2_subdev_call(sd, core, s_power, 0);
  728. mutex_unlock(&isi->lock);
  729. return ret;
  730. }
  731. static const struct v4l2_ioctl_ops isi_ioctl_ops = {
  732. .vidioc_querycap = isi_querycap,
  733. .vidioc_try_fmt_vid_cap = isi_try_fmt_vid_cap,
  734. .vidioc_g_fmt_vid_cap = isi_g_fmt_vid_cap,
  735. .vidioc_s_fmt_vid_cap = isi_s_fmt_vid_cap,
  736. .vidioc_enum_fmt_vid_cap = isi_enum_fmt_vid_cap,
  737. .vidioc_enum_input = isi_enum_input,
  738. .vidioc_g_input = isi_g_input,
  739. .vidioc_s_input = isi_s_input,
  740. .vidioc_g_parm = isi_g_parm,
  741. .vidioc_s_parm = isi_s_parm,
  742. .vidioc_enum_framesizes = isi_enum_framesizes,
  743. .vidioc_enum_frameintervals = isi_enum_frameintervals,
  744. .vidioc_reqbufs = vb2_ioctl_reqbufs,
  745. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  746. .vidioc_querybuf = vb2_ioctl_querybuf,
  747. .vidioc_qbuf = vb2_ioctl_qbuf,
  748. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  749. .vidioc_expbuf = vb2_ioctl_expbuf,
  750. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  751. .vidioc_streamon = vb2_ioctl_streamon,
  752. .vidioc_streamoff = vb2_ioctl_streamoff,
  753. .vidioc_log_status = v4l2_ctrl_log_status,
  754. .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
  755. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  756. };
  757. static const struct v4l2_file_operations isi_fops = {
  758. .owner = THIS_MODULE,
  759. .unlocked_ioctl = video_ioctl2,
  760. .open = isi_open,
  761. .release = isi_release,
  762. .poll = vb2_fop_poll,
  763. .mmap = vb2_fop_mmap,
  764. .read = vb2_fop_read,
  765. };
  766. static int isi_set_default_fmt(struct atmel_isi *isi)
  767. {
  768. struct v4l2_format f = {
  769. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
  770. .fmt.pix = {
  771. .width = VGA_WIDTH,
  772. .height = VGA_HEIGHT,
  773. .field = V4L2_FIELD_NONE,
  774. .pixelformat = isi->user_formats[0]->fourcc,
  775. },
  776. };
  777. int ret;
  778. ret = isi_try_fmt(isi, &f, NULL);
  779. if (ret)
  780. return ret;
  781. isi->current_fmt = isi->user_formats[0];
  782. isi->fmt = f;
  783. return 0;
  784. }
  785. static const struct isi_format isi_formats[] = {
  786. {
  787. .fourcc = V4L2_PIX_FMT_YUYV,
  788. .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
  789. .bpp = 2,
  790. .swap = ISI_CFG2_YCC_SWAP_DEFAULT,
  791. }, {
  792. .fourcc = V4L2_PIX_FMT_YUYV,
  793. .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
  794. .bpp = 2,
  795. .swap = ISI_CFG2_YCC_SWAP_MODE_1,
  796. }, {
  797. .fourcc = V4L2_PIX_FMT_YUYV,
  798. .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
  799. .bpp = 2,
  800. .swap = ISI_CFG2_YCC_SWAP_MODE_2,
  801. }, {
  802. .fourcc = V4L2_PIX_FMT_YUYV,
  803. .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
  804. .bpp = 2,
  805. .swap = ISI_CFG2_YCC_SWAP_MODE_3,
  806. }, {
  807. .fourcc = V4L2_PIX_FMT_RGB565,
  808. .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
  809. .bpp = 2,
  810. .swap = ISI_CFG2_YCC_SWAP_MODE_2,
  811. }, {
  812. .fourcc = V4L2_PIX_FMT_RGB565,
  813. .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8,
  814. .bpp = 2,
  815. .swap = ISI_CFG2_YCC_SWAP_MODE_3,
  816. }, {
  817. .fourcc = V4L2_PIX_FMT_RGB565,
  818. .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
  819. .bpp = 2,
  820. .swap = ISI_CFG2_YCC_SWAP_DEFAULT,
  821. }, {
  822. .fourcc = V4L2_PIX_FMT_RGB565,
  823. .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8,
  824. .bpp = 2,
  825. .swap = ISI_CFG2_YCC_SWAP_MODE_1,
  826. },
  827. };
  828. static int isi_formats_init(struct atmel_isi *isi)
  829. {
  830. const struct isi_format *isi_fmts[ARRAY_SIZE(isi_formats)];
  831. unsigned int num_fmts = 0, i, j;
  832. struct v4l2_subdev *subdev = isi->entity.subdev;
  833. struct v4l2_subdev_mbus_code_enum mbus_code = {
  834. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  835. };
  836. while (!v4l2_subdev_call(subdev, pad, enum_mbus_code,
  837. NULL, &mbus_code)) {
  838. for (i = 0; i < ARRAY_SIZE(isi_formats); i++) {
  839. if (isi_formats[i].mbus_code != mbus_code.code)
  840. continue;
  841. /* Code supported, have we got this fourcc yet? */
  842. for (j = 0; j < num_fmts; j++)
  843. if (isi_fmts[j]->fourcc == isi_formats[i].fourcc)
  844. /* Already available */
  845. break;
  846. if (j == num_fmts)
  847. /* new */
  848. isi_fmts[num_fmts++] = isi_formats + i;
  849. }
  850. mbus_code.index++;
  851. }
  852. if (!num_fmts)
  853. return -ENXIO;
  854. isi->num_user_formats = num_fmts;
  855. isi->user_formats = devm_kcalloc(isi->dev,
  856. num_fmts, sizeof(struct isi_format *),
  857. GFP_KERNEL);
  858. if (!isi->user_formats) {
  859. dev_err(isi->dev, "could not allocate memory\n");
  860. return -ENOMEM;
  861. }
  862. memcpy(isi->user_formats, isi_fmts,
  863. num_fmts * sizeof(struct isi_format *));
  864. isi->current_fmt = isi->user_formats[0];
  865. return 0;
  866. }
  867. static int isi_graph_notify_complete(struct v4l2_async_notifier *notifier)
  868. {
  869. struct atmel_isi *isi = notifier_to_isi(notifier);
  870. int ret;
  871. isi->vdev->ctrl_handler = isi->entity.subdev->ctrl_handler;
  872. ret = isi_formats_init(isi);
  873. if (ret) {
  874. dev_err(isi->dev, "No supported mediabus format found\n");
  875. return ret;
  876. }
  877. isi_camera_set_bus_param(isi);
  878. ret = isi_set_default_fmt(isi);
  879. if (ret) {
  880. dev_err(isi->dev, "Could not set default format\n");
  881. return ret;
  882. }
  883. ret = video_register_device(isi->vdev, VFL_TYPE_GRABBER, -1);
  884. if (ret) {
  885. dev_err(isi->dev, "Failed to register video device\n");
  886. return ret;
  887. }
  888. dev_dbg(isi->dev, "Device registered as %s\n",
  889. video_device_node_name(isi->vdev));
  890. return 0;
  891. }
  892. static void isi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
  893. struct v4l2_subdev *sd,
  894. struct v4l2_async_subdev *asd)
  895. {
  896. struct atmel_isi *isi = notifier_to_isi(notifier);
  897. dev_dbg(isi->dev, "Removing %s\n", video_device_node_name(isi->vdev));
  898. /* Checks internaly if vdev have been init or not */
  899. video_unregister_device(isi->vdev);
  900. }
  901. static int isi_graph_notify_bound(struct v4l2_async_notifier *notifier,
  902. struct v4l2_subdev *subdev,
  903. struct v4l2_async_subdev *asd)
  904. {
  905. struct atmel_isi *isi = notifier_to_isi(notifier);
  906. dev_dbg(isi->dev, "subdev %s bound\n", subdev->name);
  907. isi->entity.subdev = subdev;
  908. return 0;
  909. }
  910. static int isi_graph_parse(struct atmel_isi *isi, struct device_node *node)
  911. {
  912. struct device_node *ep = NULL;
  913. struct device_node *remote;
  914. while (1) {
  915. ep = of_graph_get_next_endpoint(node, ep);
  916. if (!ep)
  917. return -EINVAL;
  918. remote = of_graph_get_remote_port_parent(ep);
  919. if (!remote) {
  920. of_node_put(ep);
  921. return -EINVAL;
  922. }
  923. /* Remote node to connect */
  924. isi->entity.node = remote;
  925. isi->entity.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
  926. isi->entity.asd.match.fwnode.fwnode = of_fwnode_handle(remote);
  927. return 0;
  928. }
  929. }
  930. static int isi_graph_init(struct atmel_isi *isi)
  931. {
  932. struct v4l2_async_subdev **subdevs = NULL;
  933. int ret;
  934. /* Parse the graph to extract a list of subdevice DT nodes. */
  935. ret = isi_graph_parse(isi, isi->dev->of_node);
  936. if (ret < 0) {
  937. dev_err(isi->dev, "Graph parsing failed\n");
  938. return ret;
  939. }
  940. /* Register the subdevices notifier. */
  941. subdevs = devm_kzalloc(isi->dev, sizeof(*subdevs), GFP_KERNEL);
  942. if (subdevs == NULL) {
  943. of_node_put(isi->entity.node);
  944. return -ENOMEM;
  945. }
  946. subdevs[0] = &isi->entity.asd;
  947. isi->notifier.subdevs = subdevs;
  948. isi->notifier.num_subdevs = 1;
  949. isi->notifier.bound = isi_graph_notify_bound;
  950. isi->notifier.unbind = isi_graph_notify_unbind;
  951. isi->notifier.complete = isi_graph_notify_complete;
  952. ret = v4l2_async_notifier_register(&isi->v4l2_dev, &isi->notifier);
  953. if (ret < 0) {
  954. dev_err(isi->dev, "Notifier registration failed\n");
  955. of_node_put(isi->entity.node);
  956. return ret;
  957. }
  958. return 0;
  959. }
  960. static int atmel_isi_probe(struct platform_device *pdev)
  961. {
  962. int irq;
  963. struct atmel_isi *isi;
  964. struct vb2_queue *q;
  965. struct resource *regs;
  966. int ret, i;
  967. isi = devm_kzalloc(&pdev->dev, sizeof(struct atmel_isi), GFP_KERNEL);
  968. if (!isi) {
  969. dev_err(&pdev->dev, "Can't allocate interface!\n");
  970. return -ENOMEM;
  971. }
  972. isi->pclk = devm_clk_get(&pdev->dev, "isi_clk");
  973. if (IS_ERR(isi->pclk))
  974. return PTR_ERR(isi->pclk);
  975. ret = atmel_isi_parse_dt(isi, pdev);
  976. if (ret)
  977. return ret;
  978. isi->active = NULL;
  979. isi->dev = &pdev->dev;
  980. mutex_init(&isi->lock);
  981. spin_lock_init(&isi->irqlock);
  982. INIT_LIST_HEAD(&isi->video_buffer_list);
  983. INIT_LIST_HEAD(&isi->dma_desc_head);
  984. q = &isi->queue;
  985. /* Initialize the top-level structure */
  986. ret = v4l2_device_register(&pdev->dev, &isi->v4l2_dev);
  987. if (ret)
  988. return ret;
  989. isi->vdev = video_device_alloc();
  990. if (isi->vdev == NULL) {
  991. ret = -ENOMEM;
  992. goto err_vdev_alloc;
  993. }
  994. /* video node */
  995. isi->vdev->fops = &isi_fops;
  996. isi->vdev->v4l2_dev = &isi->v4l2_dev;
  997. isi->vdev->queue = &isi->queue;
  998. strlcpy(isi->vdev->name, KBUILD_MODNAME, sizeof(isi->vdev->name));
  999. isi->vdev->release = video_device_release;
  1000. isi->vdev->ioctl_ops = &isi_ioctl_ops;
  1001. isi->vdev->lock = &isi->lock;
  1002. isi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
  1003. V4L2_CAP_READWRITE;
  1004. video_set_drvdata(isi->vdev, isi);
  1005. /* buffer queue */
  1006. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1007. q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
  1008. q->lock = &isi->lock;
  1009. q->drv_priv = isi;
  1010. q->buf_struct_size = sizeof(struct frame_buffer);
  1011. q->ops = &isi_video_qops;
  1012. q->mem_ops = &vb2_dma_contig_memops;
  1013. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1014. q->min_buffers_needed = 2;
  1015. q->dev = &pdev->dev;
  1016. ret = vb2_queue_init(q);
  1017. if (ret < 0) {
  1018. dev_err(&pdev->dev, "failed to initialize VB2 queue\n");
  1019. goto err_vb2_queue;
  1020. }
  1021. isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev,
  1022. sizeof(struct fbd) * VIDEO_MAX_FRAME,
  1023. &isi->fb_descriptors_phys,
  1024. GFP_KERNEL);
  1025. if (!isi->p_fb_descriptors) {
  1026. dev_err(&pdev->dev, "Can't allocate descriptors!\n");
  1027. ret = -ENOMEM;
  1028. goto err_dma_alloc;
  1029. }
  1030. for (i = 0; i < VIDEO_MAX_FRAME; i++) {
  1031. isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i;
  1032. isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys +
  1033. i * sizeof(struct fbd);
  1034. list_add(&isi->dma_desc[i].list, &isi->dma_desc_head);
  1035. }
  1036. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1037. isi->regs = devm_ioremap_resource(&pdev->dev, regs);
  1038. if (IS_ERR(isi->regs)) {
  1039. ret = PTR_ERR(isi->regs);
  1040. goto err_ioremap;
  1041. }
  1042. if (isi->pdata.data_width_flags & ISI_DATAWIDTH_8)
  1043. isi->width_flags = 1 << 7;
  1044. if (isi->pdata.data_width_flags & ISI_DATAWIDTH_10)
  1045. isi->width_flags |= 1 << 9;
  1046. irq = platform_get_irq(pdev, 0);
  1047. if (irq < 0) {
  1048. ret = irq;
  1049. goto err_req_irq;
  1050. }
  1051. ret = devm_request_irq(&pdev->dev, irq, isi_interrupt, 0, "isi", isi);
  1052. if (ret) {
  1053. dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
  1054. goto err_req_irq;
  1055. }
  1056. isi->irq = irq;
  1057. ret = isi_graph_init(isi);
  1058. if (ret < 0)
  1059. goto err_req_irq;
  1060. pm_suspend_ignore_children(&pdev->dev, true);
  1061. pm_runtime_enable(&pdev->dev);
  1062. platform_set_drvdata(pdev, isi);
  1063. return 0;
  1064. err_req_irq:
  1065. err_ioremap:
  1066. dma_free_coherent(&pdev->dev,
  1067. sizeof(struct fbd) * VIDEO_MAX_FRAME,
  1068. isi->p_fb_descriptors,
  1069. isi->fb_descriptors_phys);
  1070. err_dma_alloc:
  1071. err_vb2_queue:
  1072. video_device_release(isi->vdev);
  1073. err_vdev_alloc:
  1074. v4l2_device_unregister(&isi->v4l2_dev);
  1075. return ret;
  1076. }
  1077. static int atmel_isi_remove(struct platform_device *pdev)
  1078. {
  1079. struct atmel_isi *isi = platform_get_drvdata(pdev);
  1080. dma_free_coherent(&pdev->dev,
  1081. sizeof(struct fbd) * VIDEO_MAX_FRAME,
  1082. isi->p_fb_descriptors,
  1083. isi->fb_descriptors_phys);
  1084. pm_runtime_disable(&pdev->dev);
  1085. v4l2_async_notifier_unregister(&isi->notifier);
  1086. v4l2_device_unregister(&isi->v4l2_dev);
  1087. return 0;
  1088. }
  1089. #ifdef CONFIG_PM
  1090. static int atmel_isi_runtime_suspend(struct device *dev)
  1091. {
  1092. struct atmel_isi *isi = dev_get_drvdata(dev);
  1093. clk_disable_unprepare(isi->pclk);
  1094. return 0;
  1095. }
  1096. static int atmel_isi_runtime_resume(struct device *dev)
  1097. {
  1098. struct atmel_isi *isi = dev_get_drvdata(dev);
  1099. return clk_prepare_enable(isi->pclk);
  1100. }
  1101. #endif /* CONFIG_PM */
  1102. static const struct dev_pm_ops atmel_isi_dev_pm_ops = {
  1103. SET_RUNTIME_PM_OPS(atmel_isi_runtime_suspend,
  1104. atmel_isi_runtime_resume, NULL)
  1105. };
  1106. static const struct of_device_id atmel_isi_of_match[] = {
  1107. { .compatible = "atmel,at91sam9g45-isi" },
  1108. { }
  1109. };
  1110. MODULE_DEVICE_TABLE(of, atmel_isi_of_match);
  1111. static struct platform_driver atmel_isi_driver = {
  1112. .driver = {
  1113. .name = "atmel_isi",
  1114. .of_match_table = of_match_ptr(atmel_isi_of_match),
  1115. .pm = &atmel_isi_dev_pm_ops,
  1116. },
  1117. .probe = atmel_isi_probe,
  1118. .remove = atmel_isi_remove,
  1119. };
  1120. module_platform_driver(atmel_isi_driver);
  1121. MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>");
  1122. MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux");
  1123. MODULE_LICENSE("GPL");
  1124. MODULE_SUPPORTED_DEVICE("video");