i40iw.h 16 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #ifndef I40IW_IW_H
  35. #define I40IW_IW_H
  36. #include <linux/netdevice.h>
  37. #include <linux/inetdevice.h>
  38. #include <linux/spinlock.h>
  39. #include <linux/kernel.h>
  40. #include <linux/delay.h>
  41. #include <linux/pci.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/workqueue.h>
  44. #include <linux/slab.h>
  45. #include <linux/io.h>
  46. #include <linux/crc32c.h>
  47. #include <rdma/ib_smi.h>
  48. #include <rdma/ib_verbs.h>
  49. #include <rdma/ib_pack.h>
  50. #include <rdma/rdma_cm.h>
  51. #include <rdma/iw_cm.h>
  52. #include <crypto/hash.h>
  53. #include "i40iw_status.h"
  54. #include "i40iw_osdep.h"
  55. #include "i40iw_d.h"
  56. #include "i40iw_hmc.h"
  57. #include <i40e_client.h>
  58. #include "i40iw_type.h"
  59. #include "i40iw_p.h"
  60. #include "i40iw_ucontext.h"
  61. #include "i40iw_pble.h"
  62. #include "i40iw_verbs.h"
  63. #include "i40iw_cm.h"
  64. #include "i40iw_user.h"
  65. #include "i40iw_puda.h"
  66. #define I40IW_FW_VERSION 2
  67. #define I40IW_HW_VERSION 2
  68. #define I40IW_ARP_ADD 1
  69. #define I40IW_ARP_DELETE 2
  70. #define I40IW_ARP_RESOLVE 3
  71. #define I40IW_MACIP_ADD 1
  72. #define I40IW_MACIP_DELETE 2
  73. #define IW_CCQ_SIZE (I40IW_CQP_SW_SQSIZE_2048 + 1)
  74. #define IW_CEQ_SIZE 2048
  75. #define IW_AEQ_SIZE 2048
  76. #define RX_BUF_SIZE (1536 + 8)
  77. #define IW_REG0_SIZE (4 * 1024)
  78. #define IW_TX_TIMEOUT (6 * HZ)
  79. #define IW_FIRST_QPN 1
  80. #define IW_SW_CONTEXT_ALIGN 1024
  81. #define MAX_DPC_ITERATIONS 128
  82. #define I40IW_EVENT_TIMEOUT 100000
  83. #define I40IW_VCHNL_EVENT_TIMEOUT 100000
  84. #define I40IW_NO_VLAN 0xffff
  85. #define I40IW_NO_QSET 0xffff
  86. /* access to mcast filter list */
  87. #define IW_ADD_MCAST false
  88. #define IW_DEL_MCAST true
  89. #define I40IW_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
  90. #define I40IW_DRV_OPT_DISABLE_MPA_CRC 0x00000002
  91. #define I40IW_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
  92. #define I40IW_DRV_OPT_DISABLE_INTF 0x00000008
  93. #define I40IW_DRV_OPT_ENABLE_MSI 0x00000010
  94. #define I40IW_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
  95. #define I40IW_DRV_OPT_NO_INLINE_DATA 0x00000080
  96. #define I40IW_DRV_OPT_DISABLE_INT_MOD 0x00000100
  97. #define I40IW_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
  98. #define I40IW_DRV_OPT_ENABLE_PAU 0x00000400
  99. #define I40IW_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
  100. #define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
  101. #define IW_CFG_FPM_QP_COUNT 32768
  102. #define I40IW_MAX_PAGES_PER_FMR 512
  103. #define I40IW_MIN_PAGES_PER_FMR 1
  104. #define I40IW_CQP_COMPL_RQ_WQE_FLUSHED 2
  105. #define I40IW_CQP_COMPL_SQ_WQE_FLUSHED 3
  106. #define I40IW_CQP_COMPL_RQ_SQ_WQE_FLUSHED 4
  107. #define I40IW_MTU_TO_MSS 40
  108. #define I40IW_DEFAULT_MSS 1460
  109. struct i40iw_cqp_compl_info {
  110. u32 op_ret_val;
  111. u16 maj_err_code;
  112. u16 min_err_code;
  113. bool error;
  114. u8 op_code;
  115. };
  116. #define i40iw_pr_err(fmt, args ...) pr_err("%s: "fmt, __func__, ## args)
  117. #define i40iw_pr_info(fmt, args ...) pr_info("%s: " fmt, __func__, ## args)
  118. #define i40iw_pr_warn(fmt, args ...) pr_warn("%s: " fmt, __func__, ## args)
  119. struct i40iw_cqp_request {
  120. struct cqp_commands_info info;
  121. wait_queue_head_t waitq;
  122. struct list_head list;
  123. atomic_t refcount;
  124. void (*callback_fcn)(struct i40iw_cqp_request*, u32);
  125. void *param;
  126. struct i40iw_cqp_compl_info compl_info;
  127. bool waiting;
  128. bool request_done;
  129. bool dynamic;
  130. };
  131. struct i40iw_cqp {
  132. struct i40iw_sc_cqp sc_cqp;
  133. spinlock_t req_lock; /*cqp request list */
  134. wait_queue_head_t waitq;
  135. struct i40iw_dma_mem sq;
  136. struct i40iw_dma_mem host_ctx;
  137. u64 *scratch_array;
  138. struct i40iw_cqp_request *cqp_requests;
  139. struct list_head cqp_avail_reqs;
  140. struct list_head cqp_pending_reqs;
  141. };
  142. struct i40iw_device;
  143. struct i40iw_ccq {
  144. struct i40iw_sc_cq sc_cq;
  145. spinlock_t lock; /* ccq control */
  146. wait_queue_head_t waitq;
  147. struct i40iw_dma_mem mem_cq;
  148. struct i40iw_dma_mem shadow_area;
  149. };
  150. struct i40iw_ceq {
  151. struct i40iw_sc_ceq sc_ceq;
  152. struct i40iw_dma_mem mem;
  153. u32 irq;
  154. u32 msix_idx;
  155. struct i40iw_device *iwdev;
  156. struct tasklet_struct dpc_tasklet;
  157. };
  158. struct i40iw_aeq {
  159. struct i40iw_sc_aeq sc_aeq;
  160. struct i40iw_dma_mem mem;
  161. };
  162. struct i40iw_arp_entry {
  163. u32 ip_addr[4];
  164. u8 mac_addr[ETH_ALEN];
  165. };
  166. enum init_completion_state {
  167. INVALID_STATE = 0,
  168. INITIAL_STATE,
  169. CQP_CREATED,
  170. HMC_OBJS_CREATED,
  171. PBLE_CHUNK_MEM,
  172. CCQ_CREATED,
  173. AEQ_CREATED,
  174. CEQ_CREATED,
  175. ILQ_CREATED,
  176. IEQ_CREATED,
  177. IP_ADDR_REGISTERED,
  178. RDMA_DEV_REGISTERED
  179. };
  180. struct i40iw_msix_vector {
  181. u32 idx;
  182. u32 irq;
  183. u32 cpu_affinity;
  184. u32 ceq_id;
  185. cpumask_t mask;
  186. };
  187. struct l2params_work {
  188. struct work_struct work;
  189. struct i40iw_device *iwdev;
  190. struct i40iw_l2params l2params;
  191. };
  192. #define I40IW_MSIX_TABLE_SIZE 65
  193. struct virtchnl_work {
  194. struct work_struct work;
  195. union {
  196. struct i40iw_cqp_request *cqp_request;
  197. struct i40iw_virtchnl_work_info work_info;
  198. };
  199. };
  200. struct i40e_qvlist_info;
  201. struct i40iw_device {
  202. struct i40iw_ib_device *iwibdev;
  203. struct net_device *netdev;
  204. wait_queue_head_t vchnl_waitq;
  205. struct i40iw_sc_dev sc_dev;
  206. struct i40iw_sc_vsi vsi;
  207. struct i40iw_handler *hdl;
  208. struct i40e_info *ldev;
  209. struct i40e_client *client;
  210. struct i40iw_hw hw;
  211. struct i40iw_cm_core cm_core;
  212. u8 *mem_resources;
  213. unsigned long *allocated_qps;
  214. unsigned long *allocated_cqs;
  215. unsigned long *allocated_mrs;
  216. unsigned long *allocated_pds;
  217. unsigned long *allocated_arps;
  218. struct i40iw_qp **qp_table;
  219. bool msix_shared;
  220. u32 msix_count;
  221. struct i40iw_msix_vector *iw_msixtbl;
  222. struct i40e_qvlist_info *iw_qvlist;
  223. struct i40iw_hmc_pble_rsrc *pble_rsrc;
  224. struct i40iw_arp_entry *arp_table;
  225. struct i40iw_cqp cqp;
  226. struct i40iw_ccq ccq;
  227. u32 ceqs_count;
  228. struct i40iw_ceq *ceqlist;
  229. struct i40iw_aeq aeq;
  230. u32 arp_table_size;
  231. u32 next_arp_index;
  232. spinlock_t resource_lock; /* hw resource access */
  233. spinlock_t qptable_lock;
  234. u32 vendor_id;
  235. u32 vendor_part_id;
  236. u32 of_device_registered;
  237. u32 device_cap_flags;
  238. unsigned long db_start;
  239. u8 resource_profile;
  240. u8 max_rdma_vfs;
  241. u8 max_enabled_vfs;
  242. u8 max_sge;
  243. u8 iw_status;
  244. u8 send_term_ok;
  245. bool push_mode; /* Initialized from parameter passed to driver */
  246. /* x710 specific */
  247. struct mutex pbl_mutex;
  248. struct tasklet_struct dpc_tasklet;
  249. struct workqueue_struct *virtchnl_wq;
  250. struct virtchnl_work virtchnl_w[I40IW_MAX_PE_ENABLED_VF_COUNT];
  251. struct i40iw_dma_mem obj_mem;
  252. struct i40iw_dma_mem obj_next;
  253. u8 *hmc_info_mem;
  254. u32 sd_type;
  255. struct workqueue_struct *param_wq;
  256. atomic_t params_busy;
  257. enum init_completion_state init_state;
  258. u16 mac_ip_table_idx;
  259. atomic_t vchnl_msgs;
  260. u32 max_mr;
  261. u32 max_qp;
  262. u32 max_cq;
  263. u32 max_pd;
  264. u32 next_qp;
  265. u32 next_cq;
  266. u32 next_pd;
  267. u32 max_mr_size;
  268. u32 max_qp_wr;
  269. u32 max_cqe;
  270. u32 mr_stagmask;
  271. u32 mpa_version;
  272. bool dcb;
  273. bool closing;
  274. bool reset;
  275. u32 used_pds;
  276. u32 used_cqs;
  277. u32 used_mrs;
  278. u32 used_qps;
  279. wait_queue_head_t close_wq;
  280. atomic64_t use_count;
  281. };
  282. struct i40iw_ib_device {
  283. struct ib_device ibdev;
  284. struct i40iw_device *iwdev;
  285. };
  286. struct i40iw_handler {
  287. struct list_head list;
  288. struct i40e_client *client;
  289. struct i40iw_device device;
  290. struct i40e_info ldev;
  291. };
  292. /**
  293. * to_iwdev - get device
  294. * @ibdev: ib device
  295. **/
  296. static inline struct i40iw_device *to_iwdev(struct ib_device *ibdev)
  297. {
  298. return container_of(ibdev, struct i40iw_ib_device, ibdev)->iwdev;
  299. }
  300. /**
  301. * to_ucontext - get user context
  302. * @ibucontext: ib user context
  303. **/
  304. static inline struct i40iw_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
  305. {
  306. return container_of(ibucontext, struct i40iw_ucontext, ibucontext);
  307. }
  308. /**
  309. * to_iwpd - get protection domain
  310. * @ibpd: ib pd
  311. **/
  312. static inline struct i40iw_pd *to_iwpd(struct ib_pd *ibpd)
  313. {
  314. return container_of(ibpd, struct i40iw_pd, ibpd);
  315. }
  316. /**
  317. * to_iwmr - get device memory region
  318. * @ibdev: ib memory region
  319. **/
  320. static inline struct i40iw_mr *to_iwmr(struct ib_mr *ibmr)
  321. {
  322. return container_of(ibmr, struct i40iw_mr, ibmr);
  323. }
  324. /**
  325. * to_iwmr_from_ibfmr - get device memory region
  326. * @ibfmr: ib fmr
  327. **/
  328. static inline struct i40iw_mr *to_iwmr_from_ibfmr(struct ib_fmr *ibfmr)
  329. {
  330. return container_of(ibfmr, struct i40iw_mr, ibfmr);
  331. }
  332. /**
  333. * to_iwmw - get device memory window
  334. * @ibmw: ib memory window
  335. **/
  336. static inline struct i40iw_mr *to_iwmw(struct ib_mw *ibmw)
  337. {
  338. return container_of(ibmw, struct i40iw_mr, ibmw);
  339. }
  340. /**
  341. * to_iwcq - get completion queue
  342. * @ibcq: ib cqdevice
  343. **/
  344. static inline struct i40iw_cq *to_iwcq(struct ib_cq *ibcq)
  345. {
  346. return container_of(ibcq, struct i40iw_cq, ibcq);
  347. }
  348. /**
  349. * to_iwqp - get device qp
  350. * @ibqp: ib qp
  351. **/
  352. static inline struct i40iw_qp *to_iwqp(struct ib_qp *ibqp)
  353. {
  354. return container_of(ibqp, struct i40iw_qp, ibqp);
  355. }
  356. /* i40iw.c */
  357. void i40iw_add_ref(struct ib_qp *);
  358. void i40iw_rem_ref(struct ib_qp *);
  359. struct ib_qp *i40iw_get_qp(struct ib_device *, int);
  360. void i40iw_flush_wqes(struct i40iw_device *iwdev,
  361. struct i40iw_qp *qp);
  362. void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
  363. unsigned char *mac_addr,
  364. u32 *ip_addr,
  365. bool ipv4,
  366. u32 action);
  367. int i40iw_manage_apbvt(struct i40iw_device *iwdev,
  368. u16 accel_local_port,
  369. bool add_port);
  370. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
  371. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
  372. void i40iw_put_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
  373. /**
  374. * i40iw_alloc_resource - allocate a resource
  375. * @iwdev: device pointer
  376. * @resource_array: resource bit array:
  377. * @max_resources: maximum resource number
  378. * @req_resources_num: Allocated resource number
  379. * @next: next free id
  380. **/
  381. static inline int i40iw_alloc_resource(struct i40iw_device *iwdev,
  382. unsigned long *resource_array,
  383. u32 max_resources,
  384. u32 *req_resource_num,
  385. u32 *next)
  386. {
  387. u32 resource_num;
  388. unsigned long flags;
  389. spin_lock_irqsave(&iwdev->resource_lock, flags);
  390. resource_num = find_next_zero_bit(resource_array, max_resources, *next);
  391. if (resource_num >= max_resources) {
  392. resource_num = find_first_zero_bit(resource_array, max_resources);
  393. if (resource_num >= max_resources) {
  394. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  395. return -EOVERFLOW;
  396. }
  397. }
  398. set_bit(resource_num, resource_array);
  399. *next = resource_num + 1;
  400. if (*next == max_resources)
  401. *next = 0;
  402. *req_resource_num = resource_num;
  403. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  404. return 0;
  405. }
  406. /**
  407. * i40iw_is_resource_allocated - detrmine if resource is
  408. * allocated
  409. * @iwdev: device pointer
  410. * @resource_array: resource array for the resource_num
  411. * @resource_num: resource number to check
  412. **/
  413. static inline bool i40iw_is_resource_allocated(struct i40iw_device *iwdev,
  414. unsigned long *resource_array,
  415. u32 resource_num)
  416. {
  417. bool bit_is_set;
  418. unsigned long flags;
  419. spin_lock_irqsave(&iwdev->resource_lock, flags);
  420. bit_is_set = test_bit(resource_num, resource_array);
  421. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  422. return bit_is_set;
  423. }
  424. /**
  425. * i40iw_free_resource - free a resource
  426. * @iwdev: device pointer
  427. * @resource_array: resource array for the resource_num
  428. * @resource_num: resource number to free
  429. **/
  430. static inline void i40iw_free_resource(struct i40iw_device *iwdev,
  431. unsigned long *resource_array,
  432. u32 resource_num)
  433. {
  434. unsigned long flags;
  435. spin_lock_irqsave(&iwdev->resource_lock, flags);
  436. clear_bit(resource_num, resource_array);
  437. spin_unlock_irqrestore(&iwdev->resource_lock, flags);
  438. }
  439. /**
  440. * to_iwhdl - Get the handler from the device pointer
  441. * @iwdev: device pointer
  442. **/
  443. static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev)
  444. {
  445. return container_of(iw_dev, struct i40iw_handler, device);
  446. }
  447. struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev);
  448. /**
  449. * iw_init_resources -
  450. */
  451. u32 i40iw_initialize_hw_resources(struct i40iw_device *iwdev);
  452. int i40iw_register_rdma_device(struct i40iw_device *iwdev);
  453. void i40iw_port_ibevent(struct i40iw_device *iwdev);
  454. void i40iw_cm_disconn(struct i40iw_qp *iwqp);
  455. void i40iw_cm_disconn_worker(void *);
  456. int mini_cm_recv_pkt(struct i40iw_cm_core *, struct i40iw_device *,
  457. struct sk_buff *);
  458. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  459. struct i40iw_cqp_request *cqp_request);
  460. enum i40iw_status_code i40iw_add_mac_addr(struct i40iw_device *iwdev,
  461. u8 *mac_addr, u8 *mac_index);
  462. int i40iw_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
  463. void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq);
  464. void i40iw_cleanup_pending_cqp_op(struct i40iw_device *iwdev);
  465. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev);
  466. void i40iw_add_pdusecount(struct i40iw_pd *iwpd);
  467. void i40iw_rem_devusecount(struct i40iw_device *iwdev);
  468. void i40iw_add_devusecount(struct i40iw_device *iwdev);
  469. void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
  470. struct i40iw_modify_qp_info *info, bool wait);
  471. void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev,
  472. struct i40iw_sc_qp *qp,
  473. bool suspend);
  474. enum i40iw_status_code i40iw_manage_qhash(struct i40iw_device *iwdev,
  475. struct i40iw_cm_info *cminfo,
  476. enum i40iw_quad_entry_type etype,
  477. enum i40iw_quad_hash_manage_type mtype,
  478. void *cmnode,
  479. bool wait);
  480. void i40iw_receive_ilq(struct i40iw_sc_vsi *vsi, struct i40iw_puda_buf *rbuf);
  481. void i40iw_free_sqbuf(struct i40iw_sc_vsi *vsi, void *bufp);
  482. void i40iw_free_qp_resources(struct i40iw_device *iwdev,
  483. struct i40iw_qp *iwqp,
  484. u32 qp_num);
  485. enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
  486. struct i40iw_dma_mem *memptr,
  487. u32 size, u32 mask);
  488. void i40iw_request_reset(struct i40iw_device *iwdev);
  489. void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev);
  490. void i40iw_setup_cm_core(struct i40iw_device *iwdev);
  491. void i40iw_cleanup_cm_core(struct i40iw_cm_core *cm_core);
  492. void i40iw_process_ceq(struct i40iw_device *, struct i40iw_ceq *iwceq);
  493. void i40iw_process_aeq(struct i40iw_device *);
  494. void i40iw_next_iw_state(struct i40iw_qp *iwqp,
  495. u8 state, u8 del_hash,
  496. u8 term, u8 term_len);
  497. int i40iw_send_syn(struct i40iw_cm_node *cm_node, u32 sendack);
  498. struct i40iw_cm_node *i40iw_find_node(struct i40iw_cm_core *cm_core,
  499. u16 rem_port,
  500. u32 *rem_addr,
  501. u16 loc_port,
  502. u32 *loc_addr,
  503. bool add_refcnt);
  504. enum i40iw_status_code i40iw_hw_flush_wqes(struct i40iw_device *iwdev,
  505. struct i40iw_sc_qp *qp,
  506. struct i40iw_qp_flush_info *info,
  507. bool wait);
  508. void i40iw_copy_ip_ntohl(u32 *dst, __be32 *src);
  509. struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *ib_pd,
  510. u64 addr,
  511. u64 size,
  512. int acc,
  513. u64 *iova_start);
  514. int i40iw_inetaddr_event(struct notifier_block *notifier,
  515. unsigned long event,
  516. void *ptr);
  517. int i40iw_inet6addr_event(struct notifier_block *notifier,
  518. unsigned long event,
  519. void *ptr);
  520. int i40iw_net_event(struct notifier_block *notifier,
  521. unsigned long event,
  522. void *ptr);
  523. #endif