adis16480.c 26 KB

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  1. /*
  2. * ADIS16480 and similar IMUs driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/interrupt.h>
  12. #include <linux/delay.h>
  13. #include <linux/mutex.h>
  14. #include <linux/device.h>
  15. #include <linux/kernel.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/slab.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/module.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/buffer.h>
  23. #include <linux/iio/imu/adis.h>
  24. #include <linux/debugfs.h>
  25. #define ADIS16480_PAGE_SIZE 0x80
  26. #define ADIS16480_REG(page, reg) ((page) * ADIS16480_PAGE_SIZE + (reg))
  27. #define ADIS16480_REG_PAGE_ID 0x00 /* Same address on each page */
  28. #define ADIS16480_REG_SEQ_CNT ADIS16480_REG(0x00, 0x06)
  29. #define ADIS16480_REG_SYS_E_FLA ADIS16480_REG(0x00, 0x08)
  30. #define ADIS16480_REG_DIAG_STS ADIS16480_REG(0x00, 0x0A)
  31. #define ADIS16480_REG_ALM_STS ADIS16480_REG(0x00, 0x0C)
  32. #define ADIS16480_REG_TEMP_OUT ADIS16480_REG(0x00, 0x0E)
  33. #define ADIS16480_REG_X_GYRO_OUT ADIS16480_REG(0x00, 0x10)
  34. #define ADIS16480_REG_Y_GYRO_OUT ADIS16480_REG(0x00, 0x14)
  35. #define ADIS16480_REG_Z_GYRO_OUT ADIS16480_REG(0x00, 0x18)
  36. #define ADIS16480_REG_X_ACCEL_OUT ADIS16480_REG(0x00, 0x1C)
  37. #define ADIS16480_REG_Y_ACCEL_OUT ADIS16480_REG(0x00, 0x20)
  38. #define ADIS16480_REG_Z_ACCEL_OUT ADIS16480_REG(0x00, 0x24)
  39. #define ADIS16480_REG_X_MAGN_OUT ADIS16480_REG(0x00, 0x28)
  40. #define ADIS16480_REG_Y_MAGN_OUT ADIS16480_REG(0x00, 0x2A)
  41. #define ADIS16480_REG_Z_MAGN_OUT ADIS16480_REG(0x00, 0x2C)
  42. #define ADIS16480_REG_BAROM_OUT ADIS16480_REG(0x00, 0x2E)
  43. #define ADIS16480_REG_X_DELTAANG_OUT ADIS16480_REG(0x00, 0x40)
  44. #define ADIS16480_REG_Y_DELTAANG_OUT ADIS16480_REG(0x00, 0x44)
  45. #define ADIS16480_REG_Z_DELTAANG_OUT ADIS16480_REG(0x00, 0x48)
  46. #define ADIS16480_REG_X_DELTAVEL_OUT ADIS16480_REG(0x00, 0x4C)
  47. #define ADIS16480_REG_Y_DELTAVEL_OUT ADIS16480_REG(0x00, 0x50)
  48. #define ADIS16480_REG_Z_DELTAVEL_OUT ADIS16480_REG(0x00, 0x54)
  49. #define ADIS16480_REG_PROD_ID ADIS16480_REG(0x00, 0x7E)
  50. #define ADIS16480_REG_X_GYRO_SCALE ADIS16480_REG(0x02, 0x04)
  51. #define ADIS16480_REG_Y_GYRO_SCALE ADIS16480_REG(0x02, 0x06)
  52. #define ADIS16480_REG_Z_GYRO_SCALE ADIS16480_REG(0x02, 0x08)
  53. #define ADIS16480_REG_X_ACCEL_SCALE ADIS16480_REG(0x02, 0x0A)
  54. #define ADIS16480_REG_Y_ACCEL_SCALE ADIS16480_REG(0x02, 0x0C)
  55. #define ADIS16480_REG_Z_ACCEL_SCALE ADIS16480_REG(0x02, 0x0E)
  56. #define ADIS16480_REG_X_GYRO_BIAS ADIS16480_REG(0x02, 0x10)
  57. #define ADIS16480_REG_Y_GYRO_BIAS ADIS16480_REG(0x02, 0x14)
  58. #define ADIS16480_REG_Z_GYRO_BIAS ADIS16480_REG(0x02, 0x18)
  59. #define ADIS16480_REG_X_ACCEL_BIAS ADIS16480_REG(0x02, 0x1C)
  60. #define ADIS16480_REG_Y_ACCEL_BIAS ADIS16480_REG(0x02, 0x20)
  61. #define ADIS16480_REG_Z_ACCEL_BIAS ADIS16480_REG(0x02, 0x24)
  62. #define ADIS16480_REG_X_HARD_IRON ADIS16480_REG(0x02, 0x28)
  63. #define ADIS16480_REG_Y_HARD_IRON ADIS16480_REG(0x02, 0x2A)
  64. #define ADIS16480_REG_Z_HARD_IRON ADIS16480_REG(0x02, 0x2C)
  65. #define ADIS16480_REG_BAROM_BIAS ADIS16480_REG(0x02, 0x40)
  66. #define ADIS16480_REG_FLASH_CNT ADIS16480_REG(0x02, 0x7C)
  67. #define ADIS16480_REG_GLOB_CMD ADIS16480_REG(0x03, 0x02)
  68. #define ADIS16480_REG_FNCTIO_CTRL ADIS16480_REG(0x03, 0x06)
  69. #define ADIS16480_REG_GPIO_CTRL ADIS16480_REG(0x03, 0x08)
  70. #define ADIS16480_REG_CONFIG ADIS16480_REG(0x03, 0x0A)
  71. #define ADIS16480_REG_DEC_RATE ADIS16480_REG(0x03, 0x0C)
  72. #define ADIS16480_REG_SLP_CNT ADIS16480_REG(0x03, 0x10)
  73. #define ADIS16480_REG_FILTER_BNK0 ADIS16480_REG(0x03, 0x16)
  74. #define ADIS16480_REG_FILTER_BNK1 ADIS16480_REG(0x03, 0x18)
  75. #define ADIS16480_REG_ALM_CNFG0 ADIS16480_REG(0x03, 0x20)
  76. #define ADIS16480_REG_ALM_CNFG1 ADIS16480_REG(0x03, 0x22)
  77. #define ADIS16480_REG_ALM_CNFG2 ADIS16480_REG(0x03, 0x24)
  78. #define ADIS16480_REG_XG_ALM_MAGN ADIS16480_REG(0x03, 0x28)
  79. #define ADIS16480_REG_YG_ALM_MAGN ADIS16480_REG(0x03, 0x2A)
  80. #define ADIS16480_REG_ZG_ALM_MAGN ADIS16480_REG(0x03, 0x2C)
  81. #define ADIS16480_REG_XA_ALM_MAGN ADIS16480_REG(0x03, 0x2E)
  82. #define ADIS16480_REG_YA_ALM_MAGN ADIS16480_REG(0x03, 0x30)
  83. #define ADIS16480_REG_ZA_ALM_MAGN ADIS16480_REG(0x03, 0x32)
  84. #define ADIS16480_REG_XM_ALM_MAGN ADIS16480_REG(0x03, 0x34)
  85. #define ADIS16480_REG_YM_ALM_MAGN ADIS16480_REG(0x03, 0x36)
  86. #define ADIS16480_REG_ZM_ALM_MAGN ADIS16480_REG(0x03, 0x38)
  87. #define ADIS16480_REG_BR_ALM_MAGN ADIS16480_REG(0x03, 0x3A)
  88. #define ADIS16480_REG_FIRM_REV ADIS16480_REG(0x03, 0x78)
  89. #define ADIS16480_REG_FIRM_DM ADIS16480_REG(0x03, 0x7A)
  90. #define ADIS16480_REG_FIRM_Y ADIS16480_REG(0x03, 0x7C)
  91. #define ADIS16480_REG_SERIAL_NUM ADIS16480_REG(0x04, 0x20)
  92. /* Each filter coefficent bank spans two pages */
  93. #define ADIS16480_FIR_COEF(page) (x < 60 ? ADIS16480_REG(page, (x) + 8) : \
  94. ADIS16480_REG((page) + 1, (x) - 60 + 8))
  95. #define ADIS16480_FIR_COEF_A(x) ADIS16480_FIR_COEF(0x05, (x))
  96. #define ADIS16480_FIR_COEF_B(x) ADIS16480_FIR_COEF(0x07, (x))
  97. #define ADIS16480_FIR_COEF_C(x) ADIS16480_FIR_COEF(0x09, (x))
  98. #define ADIS16480_FIR_COEF_D(x) ADIS16480_FIR_COEF(0x0B, (x))
  99. struct adis16480_chip_info {
  100. unsigned int num_channels;
  101. const struct iio_chan_spec *channels;
  102. unsigned int gyro_max_val;
  103. unsigned int gyro_max_scale;
  104. unsigned int accel_max_val;
  105. unsigned int accel_max_scale;
  106. };
  107. struct adis16480 {
  108. const struct adis16480_chip_info *chip_info;
  109. struct adis adis;
  110. };
  111. #ifdef CONFIG_DEBUG_FS
  112. static ssize_t adis16480_show_firmware_revision(struct file *file,
  113. char __user *userbuf, size_t count, loff_t *ppos)
  114. {
  115. struct adis16480 *adis16480 = file->private_data;
  116. char buf[7];
  117. size_t len;
  118. u16 rev;
  119. int ret;
  120. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_REV, &rev);
  121. if (ret < 0)
  122. return ret;
  123. len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
  124. return simple_read_from_buffer(userbuf, count, ppos, buf, len);
  125. }
  126. static const struct file_operations adis16480_firmware_revision_fops = {
  127. .open = simple_open,
  128. .read = adis16480_show_firmware_revision,
  129. .llseek = default_llseek,
  130. .owner = THIS_MODULE,
  131. };
  132. static ssize_t adis16480_show_firmware_date(struct file *file,
  133. char __user *userbuf, size_t count, loff_t *ppos)
  134. {
  135. struct adis16480 *adis16480 = file->private_data;
  136. u16 md, year;
  137. char buf[12];
  138. size_t len;
  139. int ret;
  140. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_Y, &year);
  141. if (ret < 0)
  142. return ret;
  143. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_DM, &md);
  144. if (ret < 0)
  145. return ret;
  146. len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n",
  147. md >> 8, md & 0xff, year);
  148. return simple_read_from_buffer(userbuf, count, ppos, buf, len);
  149. }
  150. static const struct file_operations adis16480_firmware_date_fops = {
  151. .open = simple_open,
  152. .read = adis16480_show_firmware_date,
  153. .llseek = default_llseek,
  154. .owner = THIS_MODULE,
  155. };
  156. static int adis16480_show_serial_number(void *arg, u64 *val)
  157. {
  158. struct adis16480 *adis16480 = arg;
  159. u16 serial;
  160. int ret;
  161. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_SERIAL_NUM,
  162. &serial);
  163. if (ret < 0)
  164. return ret;
  165. *val = serial;
  166. return 0;
  167. }
  168. DEFINE_SIMPLE_ATTRIBUTE(adis16480_serial_number_fops,
  169. adis16480_show_serial_number, NULL, "0x%.4llx\n");
  170. static int adis16480_show_product_id(void *arg, u64 *val)
  171. {
  172. struct adis16480 *adis16480 = arg;
  173. u16 prod_id;
  174. int ret;
  175. ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_PROD_ID,
  176. &prod_id);
  177. if (ret < 0)
  178. return ret;
  179. *val = prod_id;
  180. return 0;
  181. }
  182. DEFINE_SIMPLE_ATTRIBUTE(adis16480_product_id_fops,
  183. adis16480_show_product_id, NULL, "%llu\n");
  184. static int adis16480_show_flash_count(void *arg, u64 *val)
  185. {
  186. struct adis16480 *adis16480 = arg;
  187. u32 flash_count;
  188. int ret;
  189. ret = adis_read_reg_32(&adis16480->adis, ADIS16480_REG_FLASH_CNT,
  190. &flash_count);
  191. if (ret < 0)
  192. return ret;
  193. *val = flash_count;
  194. return 0;
  195. }
  196. DEFINE_SIMPLE_ATTRIBUTE(adis16480_flash_count_fops,
  197. adis16480_show_flash_count, NULL, "%lld\n");
  198. static int adis16480_debugfs_init(struct iio_dev *indio_dev)
  199. {
  200. struct adis16480 *adis16480 = iio_priv(indio_dev);
  201. debugfs_create_file("firmware_revision", 0400,
  202. indio_dev->debugfs_dentry, adis16480,
  203. &adis16480_firmware_revision_fops);
  204. debugfs_create_file("firmware_date", 0400, indio_dev->debugfs_dentry,
  205. adis16480, &adis16480_firmware_date_fops);
  206. debugfs_create_file("serial_number", 0400, indio_dev->debugfs_dentry,
  207. adis16480, &adis16480_serial_number_fops);
  208. debugfs_create_file("product_id", 0400, indio_dev->debugfs_dentry,
  209. adis16480, &adis16480_product_id_fops);
  210. debugfs_create_file("flash_count", 0400, indio_dev->debugfs_dentry,
  211. adis16480, &adis16480_flash_count_fops);
  212. return 0;
  213. }
  214. #else
  215. static int adis16480_debugfs_init(struct iio_dev *indio_dev)
  216. {
  217. return 0;
  218. }
  219. #endif
  220. static int adis16480_set_freq(struct iio_dev *indio_dev, int val, int val2)
  221. {
  222. struct adis16480 *st = iio_priv(indio_dev);
  223. unsigned int t;
  224. if (val < 0 || val2 < 0)
  225. return -EINVAL;
  226. t = val * 1000 + val2 / 1000;
  227. if (t == 0)
  228. return -EINVAL;
  229. t = 2460000 / t;
  230. if (t > 2048)
  231. t = 2048;
  232. if (t != 0)
  233. t--;
  234. return adis_write_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, t);
  235. }
  236. static int adis16480_get_freq(struct iio_dev *indio_dev, int *val, int *val2)
  237. {
  238. struct adis16480 *st = iio_priv(indio_dev);
  239. uint16_t t;
  240. int ret;
  241. unsigned freq;
  242. ret = adis_read_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, &t);
  243. if (ret < 0)
  244. return ret;
  245. freq = 2460000 / (t + 1);
  246. *val = freq / 1000;
  247. *val2 = (freq % 1000) * 1000;
  248. return IIO_VAL_INT_PLUS_MICRO;
  249. }
  250. enum {
  251. ADIS16480_SCAN_GYRO_X,
  252. ADIS16480_SCAN_GYRO_Y,
  253. ADIS16480_SCAN_GYRO_Z,
  254. ADIS16480_SCAN_ACCEL_X,
  255. ADIS16480_SCAN_ACCEL_Y,
  256. ADIS16480_SCAN_ACCEL_Z,
  257. ADIS16480_SCAN_MAGN_X,
  258. ADIS16480_SCAN_MAGN_Y,
  259. ADIS16480_SCAN_MAGN_Z,
  260. ADIS16480_SCAN_BARO,
  261. ADIS16480_SCAN_TEMP,
  262. };
  263. static const unsigned int adis16480_calibbias_regs[] = {
  264. [ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_BIAS,
  265. [ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_BIAS,
  266. [ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_BIAS,
  267. [ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_BIAS,
  268. [ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_BIAS,
  269. [ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_BIAS,
  270. [ADIS16480_SCAN_MAGN_X] = ADIS16480_REG_X_HARD_IRON,
  271. [ADIS16480_SCAN_MAGN_Y] = ADIS16480_REG_Y_HARD_IRON,
  272. [ADIS16480_SCAN_MAGN_Z] = ADIS16480_REG_Z_HARD_IRON,
  273. [ADIS16480_SCAN_BARO] = ADIS16480_REG_BAROM_BIAS,
  274. };
  275. static const unsigned int adis16480_calibscale_regs[] = {
  276. [ADIS16480_SCAN_GYRO_X] = ADIS16480_REG_X_GYRO_SCALE,
  277. [ADIS16480_SCAN_GYRO_Y] = ADIS16480_REG_Y_GYRO_SCALE,
  278. [ADIS16480_SCAN_GYRO_Z] = ADIS16480_REG_Z_GYRO_SCALE,
  279. [ADIS16480_SCAN_ACCEL_X] = ADIS16480_REG_X_ACCEL_SCALE,
  280. [ADIS16480_SCAN_ACCEL_Y] = ADIS16480_REG_Y_ACCEL_SCALE,
  281. [ADIS16480_SCAN_ACCEL_Z] = ADIS16480_REG_Z_ACCEL_SCALE,
  282. };
  283. static int adis16480_set_calibbias(struct iio_dev *indio_dev,
  284. const struct iio_chan_spec *chan, int bias)
  285. {
  286. unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
  287. struct adis16480 *st = iio_priv(indio_dev);
  288. switch (chan->type) {
  289. case IIO_MAGN:
  290. case IIO_PRESSURE:
  291. if (bias < -0x8000 || bias >= 0x8000)
  292. return -EINVAL;
  293. return adis_write_reg_16(&st->adis, reg, bias);
  294. case IIO_ANGL_VEL:
  295. case IIO_ACCEL:
  296. return adis_write_reg_32(&st->adis, reg, bias);
  297. default:
  298. break;
  299. }
  300. return -EINVAL;
  301. }
  302. static int adis16480_get_calibbias(struct iio_dev *indio_dev,
  303. const struct iio_chan_spec *chan, int *bias)
  304. {
  305. unsigned int reg = adis16480_calibbias_regs[chan->scan_index];
  306. struct adis16480 *st = iio_priv(indio_dev);
  307. uint16_t val16;
  308. uint32_t val32;
  309. int ret;
  310. switch (chan->type) {
  311. case IIO_MAGN:
  312. case IIO_PRESSURE:
  313. ret = adis_read_reg_16(&st->adis, reg, &val16);
  314. if (ret == 0)
  315. *bias = sign_extend32(val16, 15);
  316. break;
  317. case IIO_ANGL_VEL:
  318. case IIO_ACCEL:
  319. ret = adis_read_reg_32(&st->adis, reg, &val32);
  320. if (ret == 0)
  321. *bias = sign_extend32(val32, 31);
  322. break;
  323. default:
  324. ret = -EINVAL;
  325. }
  326. if (ret < 0)
  327. return ret;
  328. return IIO_VAL_INT;
  329. }
  330. static int adis16480_set_calibscale(struct iio_dev *indio_dev,
  331. const struct iio_chan_spec *chan, int scale)
  332. {
  333. unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
  334. struct adis16480 *st = iio_priv(indio_dev);
  335. if (scale < -0x8000 || scale >= 0x8000)
  336. return -EINVAL;
  337. return adis_write_reg_16(&st->adis, reg, scale);
  338. }
  339. static int adis16480_get_calibscale(struct iio_dev *indio_dev,
  340. const struct iio_chan_spec *chan, int *scale)
  341. {
  342. unsigned int reg = adis16480_calibscale_regs[chan->scan_index];
  343. struct adis16480 *st = iio_priv(indio_dev);
  344. uint16_t val16;
  345. int ret;
  346. ret = adis_read_reg_16(&st->adis, reg, &val16);
  347. if (ret < 0)
  348. return ret;
  349. *scale = sign_extend32(val16, 15);
  350. return IIO_VAL_INT;
  351. }
  352. static const unsigned int adis16480_def_filter_freqs[] = {
  353. 310,
  354. 55,
  355. 275,
  356. 63,
  357. };
  358. static const unsigned int ad16480_filter_data[][2] = {
  359. [ADIS16480_SCAN_GYRO_X] = { ADIS16480_REG_FILTER_BNK0, 0 },
  360. [ADIS16480_SCAN_GYRO_Y] = { ADIS16480_REG_FILTER_BNK0, 3 },
  361. [ADIS16480_SCAN_GYRO_Z] = { ADIS16480_REG_FILTER_BNK0, 6 },
  362. [ADIS16480_SCAN_ACCEL_X] = { ADIS16480_REG_FILTER_BNK0, 9 },
  363. [ADIS16480_SCAN_ACCEL_Y] = { ADIS16480_REG_FILTER_BNK0, 12 },
  364. [ADIS16480_SCAN_ACCEL_Z] = { ADIS16480_REG_FILTER_BNK1, 0 },
  365. [ADIS16480_SCAN_MAGN_X] = { ADIS16480_REG_FILTER_BNK1, 3 },
  366. [ADIS16480_SCAN_MAGN_Y] = { ADIS16480_REG_FILTER_BNK1, 6 },
  367. [ADIS16480_SCAN_MAGN_Z] = { ADIS16480_REG_FILTER_BNK1, 9 },
  368. };
  369. static int adis16480_get_filter_freq(struct iio_dev *indio_dev,
  370. const struct iio_chan_spec *chan, int *freq)
  371. {
  372. struct adis16480 *st = iio_priv(indio_dev);
  373. unsigned int enable_mask, offset, reg;
  374. uint16_t val;
  375. int ret;
  376. reg = ad16480_filter_data[chan->scan_index][0];
  377. offset = ad16480_filter_data[chan->scan_index][1];
  378. enable_mask = BIT(offset + 2);
  379. ret = adis_read_reg_16(&st->adis, reg, &val);
  380. if (ret < 0)
  381. return ret;
  382. if (!(val & enable_mask))
  383. *freq = 0;
  384. else
  385. *freq = adis16480_def_filter_freqs[(val >> offset) & 0x3];
  386. return IIO_VAL_INT;
  387. }
  388. static int adis16480_set_filter_freq(struct iio_dev *indio_dev,
  389. const struct iio_chan_spec *chan, unsigned int freq)
  390. {
  391. struct adis16480 *st = iio_priv(indio_dev);
  392. unsigned int enable_mask, offset, reg;
  393. unsigned int diff, best_diff;
  394. unsigned int i, best_freq;
  395. uint16_t val;
  396. int ret;
  397. reg = ad16480_filter_data[chan->scan_index][0];
  398. offset = ad16480_filter_data[chan->scan_index][1];
  399. enable_mask = BIT(offset + 2);
  400. ret = adis_read_reg_16(&st->adis, reg, &val);
  401. if (ret < 0)
  402. return ret;
  403. if (freq == 0) {
  404. val &= ~enable_mask;
  405. } else {
  406. best_freq = 0;
  407. best_diff = 310;
  408. for (i = 0; i < ARRAY_SIZE(adis16480_def_filter_freqs); i++) {
  409. if (adis16480_def_filter_freqs[i] >= freq) {
  410. diff = adis16480_def_filter_freqs[i] - freq;
  411. if (diff < best_diff) {
  412. best_diff = diff;
  413. best_freq = i;
  414. }
  415. }
  416. }
  417. val &= ~(0x3 << offset);
  418. val |= best_freq << offset;
  419. val |= enable_mask;
  420. }
  421. return adis_write_reg_16(&st->adis, reg, val);
  422. }
  423. static int adis16480_read_raw(struct iio_dev *indio_dev,
  424. const struct iio_chan_spec *chan, int *val, int *val2, long info)
  425. {
  426. struct adis16480 *st = iio_priv(indio_dev);
  427. switch (info) {
  428. case IIO_CHAN_INFO_RAW:
  429. return adis_single_conversion(indio_dev, chan, 0, val);
  430. case IIO_CHAN_INFO_SCALE:
  431. switch (chan->type) {
  432. case IIO_ANGL_VEL:
  433. *val = st->chip_info->gyro_max_scale;
  434. *val2 = st->chip_info->gyro_max_val;
  435. return IIO_VAL_FRACTIONAL;
  436. case IIO_ACCEL:
  437. *val = st->chip_info->accel_max_scale;
  438. *val2 = st->chip_info->accel_max_val;
  439. return IIO_VAL_FRACTIONAL;
  440. case IIO_MAGN:
  441. *val = 0;
  442. *val2 = 100; /* 0.0001 gauss */
  443. return IIO_VAL_INT_PLUS_MICRO;
  444. case IIO_TEMP:
  445. *val = 5;
  446. *val2 = 650000; /* 5.65 milli degree Celsius */
  447. return IIO_VAL_INT_PLUS_MICRO;
  448. case IIO_PRESSURE:
  449. *val = 0;
  450. *val2 = 4000; /* 40ubar = 0.004 kPa */
  451. return IIO_VAL_INT_PLUS_MICRO;
  452. default:
  453. return -EINVAL;
  454. }
  455. case IIO_CHAN_INFO_OFFSET:
  456. /* Only the temperature channel has a offset */
  457. *val = 4425; /* 25 degree Celsius = 0x0000 */
  458. return IIO_VAL_INT;
  459. case IIO_CHAN_INFO_CALIBBIAS:
  460. return adis16480_get_calibbias(indio_dev, chan, val);
  461. case IIO_CHAN_INFO_CALIBSCALE:
  462. return adis16480_get_calibscale(indio_dev, chan, val);
  463. case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
  464. return adis16480_get_filter_freq(indio_dev, chan, val);
  465. case IIO_CHAN_INFO_SAMP_FREQ:
  466. return adis16480_get_freq(indio_dev, val, val2);
  467. default:
  468. return -EINVAL;
  469. }
  470. }
  471. static int adis16480_write_raw(struct iio_dev *indio_dev,
  472. const struct iio_chan_spec *chan, int val, int val2, long info)
  473. {
  474. switch (info) {
  475. case IIO_CHAN_INFO_CALIBBIAS:
  476. return adis16480_set_calibbias(indio_dev, chan, val);
  477. case IIO_CHAN_INFO_CALIBSCALE:
  478. return adis16480_set_calibscale(indio_dev, chan, val);
  479. case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
  480. return adis16480_set_filter_freq(indio_dev, chan, val);
  481. case IIO_CHAN_INFO_SAMP_FREQ:
  482. return adis16480_set_freq(indio_dev, val, val2);
  483. default:
  484. return -EINVAL;
  485. }
  486. }
  487. #define ADIS16480_MOD_CHANNEL(_type, _mod, _address, _si, _info_sep, _bits) \
  488. { \
  489. .type = (_type), \
  490. .modified = 1, \
  491. .channel2 = (_mod), \
  492. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  493. BIT(IIO_CHAN_INFO_CALIBBIAS) | \
  494. _info_sep, \
  495. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  496. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  497. .address = (_address), \
  498. .scan_index = (_si), \
  499. .scan_type = { \
  500. .sign = 's', \
  501. .realbits = (_bits), \
  502. .storagebits = (_bits), \
  503. .endianness = IIO_BE, \
  504. }, \
  505. }
  506. #define ADIS16480_GYRO_CHANNEL(_mod) \
  507. ADIS16480_MOD_CHANNEL(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
  508. ADIS16480_REG_ ## _mod ## _GYRO_OUT, ADIS16480_SCAN_GYRO_ ## _mod, \
  509. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
  510. BIT(IIO_CHAN_INFO_CALIBSCALE), \
  511. 32)
  512. #define ADIS16480_ACCEL_CHANNEL(_mod) \
  513. ADIS16480_MOD_CHANNEL(IIO_ACCEL, IIO_MOD_ ## _mod, \
  514. ADIS16480_REG_ ## _mod ## _ACCEL_OUT, ADIS16480_SCAN_ACCEL_ ## _mod, \
  515. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) | \
  516. BIT(IIO_CHAN_INFO_CALIBSCALE), \
  517. 32)
  518. #define ADIS16480_MAGN_CHANNEL(_mod) \
  519. ADIS16480_MOD_CHANNEL(IIO_MAGN, IIO_MOD_ ## _mod, \
  520. ADIS16480_REG_ ## _mod ## _MAGN_OUT, ADIS16480_SCAN_MAGN_ ## _mod, \
  521. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
  522. 16)
  523. #define ADIS16480_PRESSURE_CHANNEL() \
  524. { \
  525. .type = IIO_PRESSURE, \
  526. .indexed = 1, \
  527. .channel = 0, \
  528. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  529. BIT(IIO_CHAN_INFO_CALIBBIAS) | \
  530. BIT(IIO_CHAN_INFO_SCALE), \
  531. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  532. .address = ADIS16480_REG_BAROM_OUT, \
  533. .scan_index = ADIS16480_SCAN_BARO, \
  534. .scan_type = { \
  535. .sign = 's', \
  536. .realbits = 32, \
  537. .storagebits = 32, \
  538. .endianness = IIO_BE, \
  539. }, \
  540. }
  541. #define ADIS16480_TEMP_CHANNEL() { \
  542. .type = IIO_TEMP, \
  543. .indexed = 1, \
  544. .channel = 0, \
  545. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  546. BIT(IIO_CHAN_INFO_SCALE) | \
  547. BIT(IIO_CHAN_INFO_OFFSET), \
  548. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  549. .address = ADIS16480_REG_TEMP_OUT, \
  550. .scan_index = ADIS16480_SCAN_TEMP, \
  551. .scan_type = { \
  552. .sign = 's', \
  553. .realbits = 16, \
  554. .storagebits = 16, \
  555. .endianness = IIO_BE, \
  556. }, \
  557. }
  558. static const struct iio_chan_spec adis16480_channels[] = {
  559. ADIS16480_GYRO_CHANNEL(X),
  560. ADIS16480_GYRO_CHANNEL(Y),
  561. ADIS16480_GYRO_CHANNEL(Z),
  562. ADIS16480_ACCEL_CHANNEL(X),
  563. ADIS16480_ACCEL_CHANNEL(Y),
  564. ADIS16480_ACCEL_CHANNEL(Z),
  565. ADIS16480_MAGN_CHANNEL(X),
  566. ADIS16480_MAGN_CHANNEL(Y),
  567. ADIS16480_MAGN_CHANNEL(Z),
  568. ADIS16480_PRESSURE_CHANNEL(),
  569. ADIS16480_TEMP_CHANNEL(),
  570. IIO_CHAN_SOFT_TIMESTAMP(11)
  571. };
  572. static const struct iio_chan_spec adis16485_channels[] = {
  573. ADIS16480_GYRO_CHANNEL(X),
  574. ADIS16480_GYRO_CHANNEL(Y),
  575. ADIS16480_GYRO_CHANNEL(Z),
  576. ADIS16480_ACCEL_CHANNEL(X),
  577. ADIS16480_ACCEL_CHANNEL(Y),
  578. ADIS16480_ACCEL_CHANNEL(Z),
  579. ADIS16480_TEMP_CHANNEL(),
  580. IIO_CHAN_SOFT_TIMESTAMP(7)
  581. };
  582. enum adis16480_variant {
  583. ADIS16375,
  584. ADIS16480,
  585. ADIS16485,
  586. ADIS16488,
  587. };
  588. static const struct adis16480_chip_info adis16480_chip_info[] = {
  589. [ADIS16375] = {
  590. .channels = adis16485_channels,
  591. .num_channels = ARRAY_SIZE(adis16485_channels),
  592. /*
  593. * storing the value in rad/degree and the scale in degree
  594. * gives us the result in rad and better precession than
  595. * storing the scale directly in rad.
  596. */
  597. .gyro_max_val = IIO_RAD_TO_DEGREE(22887),
  598. .gyro_max_scale = 300,
  599. .accel_max_val = IIO_M_S_2_TO_G(21973),
  600. .accel_max_scale = 18,
  601. },
  602. [ADIS16480] = {
  603. .channels = adis16480_channels,
  604. .num_channels = ARRAY_SIZE(adis16480_channels),
  605. .gyro_max_val = IIO_RAD_TO_DEGREE(22500),
  606. .gyro_max_scale = 450,
  607. .accel_max_val = IIO_M_S_2_TO_G(12500),
  608. .accel_max_scale = 10,
  609. },
  610. [ADIS16485] = {
  611. .channels = adis16485_channels,
  612. .num_channels = ARRAY_SIZE(adis16485_channels),
  613. .gyro_max_val = IIO_RAD_TO_DEGREE(22500),
  614. .gyro_max_scale = 450,
  615. .accel_max_val = IIO_M_S_2_TO_G(20000),
  616. .accel_max_scale = 5,
  617. },
  618. [ADIS16488] = {
  619. .channels = adis16480_channels,
  620. .num_channels = ARRAY_SIZE(adis16480_channels),
  621. .gyro_max_val = IIO_RAD_TO_DEGREE(22500),
  622. .gyro_max_scale = 450,
  623. .accel_max_val = IIO_M_S_2_TO_G(22500),
  624. .accel_max_scale = 18,
  625. },
  626. };
  627. static const struct iio_info adis16480_info = {
  628. .read_raw = &adis16480_read_raw,
  629. .write_raw = &adis16480_write_raw,
  630. .update_scan_mode = adis_update_scan_mode,
  631. .driver_module = THIS_MODULE,
  632. .debugfs_reg_access = adis_debugfs_reg_access,
  633. };
  634. static int adis16480_stop_device(struct iio_dev *indio_dev)
  635. {
  636. struct adis16480 *st = iio_priv(indio_dev);
  637. int ret;
  638. ret = adis_write_reg_16(&st->adis, ADIS16480_REG_SLP_CNT, BIT(9));
  639. if (ret)
  640. dev_err(&indio_dev->dev,
  641. "Could not power down device: %d\n", ret);
  642. return ret;
  643. }
  644. static int adis16480_enable_irq(struct adis *adis, bool enable)
  645. {
  646. return adis_write_reg_16(adis, ADIS16480_REG_FNCTIO_CTRL,
  647. enable ? BIT(3) : 0);
  648. }
  649. static int adis16480_initial_setup(struct iio_dev *indio_dev)
  650. {
  651. struct adis16480 *st = iio_priv(indio_dev);
  652. uint16_t prod_id;
  653. unsigned int device_id;
  654. int ret;
  655. adis_reset(&st->adis);
  656. msleep(70);
  657. ret = adis_write_reg_16(&st->adis, ADIS16480_REG_GLOB_CMD, BIT(1));
  658. if (ret)
  659. return ret;
  660. msleep(30);
  661. ret = adis_check_status(&st->adis);
  662. if (ret)
  663. return ret;
  664. ret = adis_read_reg_16(&st->adis, ADIS16480_REG_PROD_ID, &prod_id);
  665. if (ret)
  666. return ret;
  667. ret = sscanf(indio_dev->name, "adis%u\n", &device_id);
  668. if (ret != 1)
  669. return -EINVAL;
  670. if (prod_id != device_id)
  671. dev_warn(&indio_dev->dev, "Device ID(%u) and product ID(%u) do not match.",
  672. device_id, prod_id);
  673. return 0;
  674. }
  675. #define ADIS16480_DIAG_STAT_XGYRO_FAIL 0
  676. #define ADIS16480_DIAG_STAT_YGYRO_FAIL 1
  677. #define ADIS16480_DIAG_STAT_ZGYRO_FAIL 2
  678. #define ADIS16480_DIAG_STAT_XACCL_FAIL 3
  679. #define ADIS16480_DIAG_STAT_YACCL_FAIL 4
  680. #define ADIS16480_DIAG_STAT_ZACCL_FAIL 5
  681. #define ADIS16480_DIAG_STAT_XMAGN_FAIL 8
  682. #define ADIS16480_DIAG_STAT_YMAGN_FAIL 9
  683. #define ADIS16480_DIAG_STAT_ZMAGN_FAIL 10
  684. #define ADIS16480_DIAG_STAT_BARO_FAIL 11
  685. static const char * const adis16480_status_error_msgs[] = {
  686. [ADIS16480_DIAG_STAT_XGYRO_FAIL] = "X-axis gyroscope self-test failure",
  687. [ADIS16480_DIAG_STAT_YGYRO_FAIL] = "Y-axis gyroscope self-test failure",
  688. [ADIS16480_DIAG_STAT_ZGYRO_FAIL] = "Z-axis gyroscope self-test failure",
  689. [ADIS16480_DIAG_STAT_XACCL_FAIL] = "X-axis accelerometer self-test failure",
  690. [ADIS16480_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
  691. [ADIS16480_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
  692. [ADIS16480_DIAG_STAT_XMAGN_FAIL] = "X-axis magnetometer self-test failure",
  693. [ADIS16480_DIAG_STAT_YMAGN_FAIL] = "Y-axis magnetometer self-test failure",
  694. [ADIS16480_DIAG_STAT_ZMAGN_FAIL] = "Z-axis magnetometer self-test failure",
  695. [ADIS16480_DIAG_STAT_BARO_FAIL] = "Barometer self-test failure",
  696. };
  697. static const struct adis_data adis16480_data = {
  698. .diag_stat_reg = ADIS16480_REG_DIAG_STS,
  699. .glob_cmd_reg = ADIS16480_REG_GLOB_CMD,
  700. .has_paging = true,
  701. .read_delay = 5,
  702. .write_delay = 5,
  703. .status_error_msgs = adis16480_status_error_msgs,
  704. .status_error_mask = BIT(ADIS16480_DIAG_STAT_XGYRO_FAIL) |
  705. BIT(ADIS16480_DIAG_STAT_YGYRO_FAIL) |
  706. BIT(ADIS16480_DIAG_STAT_ZGYRO_FAIL) |
  707. BIT(ADIS16480_DIAG_STAT_XACCL_FAIL) |
  708. BIT(ADIS16480_DIAG_STAT_YACCL_FAIL) |
  709. BIT(ADIS16480_DIAG_STAT_ZACCL_FAIL) |
  710. BIT(ADIS16480_DIAG_STAT_XMAGN_FAIL) |
  711. BIT(ADIS16480_DIAG_STAT_YMAGN_FAIL) |
  712. BIT(ADIS16480_DIAG_STAT_ZMAGN_FAIL) |
  713. BIT(ADIS16480_DIAG_STAT_BARO_FAIL),
  714. .enable_irq = adis16480_enable_irq,
  715. };
  716. static int adis16480_probe(struct spi_device *spi)
  717. {
  718. const struct spi_device_id *id = spi_get_device_id(spi);
  719. struct iio_dev *indio_dev;
  720. struct adis16480 *st;
  721. int ret;
  722. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  723. if (indio_dev == NULL)
  724. return -ENOMEM;
  725. spi_set_drvdata(spi, indio_dev);
  726. st = iio_priv(indio_dev);
  727. st->chip_info = &adis16480_chip_info[id->driver_data];
  728. indio_dev->dev.parent = &spi->dev;
  729. indio_dev->name = spi_get_device_id(spi)->name;
  730. indio_dev->channels = st->chip_info->channels;
  731. indio_dev->num_channels = st->chip_info->num_channels;
  732. indio_dev->info = &adis16480_info;
  733. indio_dev->modes = INDIO_DIRECT_MODE;
  734. ret = adis_init(&st->adis, indio_dev, spi, &adis16480_data);
  735. if (ret)
  736. return ret;
  737. ret = adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
  738. if (ret)
  739. return ret;
  740. ret = adis16480_initial_setup(indio_dev);
  741. if (ret)
  742. goto error_cleanup_buffer;
  743. ret = iio_device_register(indio_dev);
  744. if (ret)
  745. goto error_stop_device;
  746. adis16480_debugfs_init(indio_dev);
  747. return 0;
  748. error_stop_device:
  749. adis16480_stop_device(indio_dev);
  750. error_cleanup_buffer:
  751. adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
  752. return ret;
  753. }
  754. static int adis16480_remove(struct spi_device *spi)
  755. {
  756. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  757. struct adis16480 *st = iio_priv(indio_dev);
  758. iio_device_unregister(indio_dev);
  759. adis16480_stop_device(indio_dev);
  760. adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
  761. return 0;
  762. }
  763. static const struct spi_device_id adis16480_ids[] = {
  764. { "adis16375", ADIS16375 },
  765. { "adis16480", ADIS16480 },
  766. { "adis16485", ADIS16485 },
  767. { "adis16488", ADIS16488 },
  768. { }
  769. };
  770. MODULE_DEVICE_TABLE(spi, adis16480_ids);
  771. static struct spi_driver adis16480_driver = {
  772. .driver = {
  773. .name = "adis16480",
  774. },
  775. .id_table = adis16480_ids,
  776. .probe = adis16480_probe,
  777. .remove = adis16480_remove,
  778. };
  779. module_spi_driver(adis16480_driver);
  780. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  781. MODULE_DESCRIPTION("Analog Devices ADIS16480 IMU driver");
  782. MODULE_LICENSE("GPL v2");