max30102.c 12 KB

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  1. /*
  2. * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
  3. *
  4. * Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * TODO: proximity power saving feature
  17. */
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/delay.h>
  22. #include <linux/err.h>
  23. #include <linux/irq.h>
  24. #include <linux/i2c.h>
  25. #include <linux/mutex.h>
  26. #include <linux/of.h>
  27. #include <linux/regmap.h>
  28. #include <linux/iio/iio.h>
  29. #include <linux/iio/buffer.h>
  30. #include <linux/iio/kfifo_buf.h>
  31. #define MAX30102_REGMAP_NAME "max30102_regmap"
  32. #define MAX30102_DRV_NAME "max30102"
  33. #define MAX30102_REG_INT_STATUS 0x00
  34. #define MAX30102_REG_INT_STATUS_PWR_RDY BIT(0)
  35. #define MAX30102_REG_INT_STATUS_PROX_INT BIT(4)
  36. #define MAX30102_REG_INT_STATUS_ALC_OVF BIT(5)
  37. #define MAX30102_REG_INT_STATUS_PPG_RDY BIT(6)
  38. #define MAX30102_REG_INT_STATUS_FIFO_RDY BIT(7)
  39. #define MAX30102_REG_INT_ENABLE 0x02
  40. #define MAX30102_REG_INT_ENABLE_PROX_INT_EN BIT(4)
  41. #define MAX30102_REG_INT_ENABLE_ALC_OVF_EN BIT(5)
  42. #define MAX30102_REG_INT_ENABLE_PPG_EN BIT(6)
  43. #define MAX30102_REG_INT_ENABLE_FIFO_EN BIT(7)
  44. #define MAX30102_REG_INT_ENABLE_MASK 0xf0
  45. #define MAX30102_REG_INT_ENABLE_MASK_SHIFT 4
  46. #define MAX30102_REG_FIFO_WR_PTR 0x04
  47. #define MAX30102_REG_FIFO_OVR_CTR 0x05
  48. #define MAX30102_REG_FIFO_RD_PTR 0x06
  49. #define MAX30102_REG_FIFO_DATA 0x07
  50. #define MAX30102_REG_FIFO_DATA_ENTRY_LEN 6
  51. #define MAX30102_REG_FIFO_CONFIG 0x08
  52. #define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES BIT(1)
  53. #define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT 5
  54. #define MAX30102_REG_FIFO_CONFIG_AFULL BIT(0)
  55. #define MAX30102_REG_MODE_CONFIG 0x09
  56. #define MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0)
  57. #define MAX30102_REG_MODE_CONFIG_MODE_HR_EN BIT(1)
  58. #define MAX30102_REG_MODE_CONFIG_MODE_MASK 0x03
  59. #define MAX30102_REG_MODE_CONFIG_PWR BIT(7)
  60. #define MAX30102_REG_SPO2_CONFIG 0x0a
  61. #define MAX30102_REG_SPO2_CONFIG_PULSE_411_US 0x03
  62. #define MAX30102_REG_SPO2_CONFIG_SR_400HZ 0x03
  63. #define MAX30102_REG_SPO2_CONFIG_SR_MASK 0x07
  64. #define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT 2
  65. #define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0)
  66. #define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5
  67. #define MAX30102_REG_RED_LED_CONFIG 0x0c
  68. #define MAX30102_REG_IR_LED_CONFIG 0x0d
  69. #define MAX30102_REG_TEMP_CONFIG 0x21
  70. #define MAX30102_REG_TEMP_CONFIG_TEMP_EN BIT(0)
  71. #define MAX30102_REG_TEMP_INTEGER 0x1f
  72. #define MAX30102_REG_TEMP_FRACTION 0x20
  73. struct max30102_data {
  74. struct i2c_client *client;
  75. struct iio_dev *indio_dev;
  76. struct mutex lock;
  77. struct regmap *regmap;
  78. u8 buffer[8];
  79. __be32 processed_buffer[2]; /* 2 x 18-bit (padded to 32-bits) */
  80. };
  81. static const struct regmap_config max30102_regmap_config = {
  82. .name = MAX30102_REGMAP_NAME,
  83. .reg_bits = 8,
  84. .val_bits = 8,
  85. };
  86. static const unsigned long max30102_scan_masks[] = {0x3, 0};
  87. static const struct iio_chan_spec max30102_channels[] = {
  88. {
  89. .type = IIO_INTENSITY,
  90. .channel2 = IIO_MOD_LIGHT_RED,
  91. .modified = 1,
  92. .scan_index = 0,
  93. .scan_type = {
  94. .sign = 'u',
  95. .shift = 8,
  96. .realbits = 18,
  97. .storagebits = 32,
  98. .endianness = IIO_BE,
  99. },
  100. },
  101. {
  102. .type = IIO_INTENSITY,
  103. .channel2 = IIO_MOD_LIGHT_IR,
  104. .modified = 1,
  105. .scan_index = 1,
  106. .scan_type = {
  107. .sign = 'u',
  108. .shift = 8,
  109. .realbits = 18,
  110. .storagebits = 32,
  111. .endianness = IIO_BE,
  112. },
  113. },
  114. {
  115. .type = IIO_TEMP,
  116. .info_mask_separate =
  117. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  118. .scan_index = -1,
  119. },
  120. };
  121. static int max30102_set_powermode(struct max30102_data *data, bool state)
  122. {
  123. return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
  124. MAX30102_REG_MODE_CONFIG_PWR,
  125. state ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
  126. }
  127. static int max30102_buffer_postenable(struct iio_dev *indio_dev)
  128. {
  129. struct max30102_data *data = iio_priv(indio_dev);
  130. return max30102_set_powermode(data, true);
  131. }
  132. static int max30102_buffer_predisable(struct iio_dev *indio_dev)
  133. {
  134. struct max30102_data *data = iio_priv(indio_dev);
  135. return max30102_set_powermode(data, false);
  136. }
  137. static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
  138. .postenable = max30102_buffer_postenable,
  139. .predisable = max30102_buffer_predisable,
  140. };
  141. static inline int max30102_fifo_count(struct max30102_data *data)
  142. {
  143. unsigned int val;
  144. int ret;
  145. ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
  146. if (ret)
  147. return ret;
  148. /* FIFO has one sample slot left */
  149. if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
  150. return 1;
  151. return 0;
  152. }
  153. static int max30102_read_measurement(struct max30102_data *data)
  154. {
  155. int ret;
  156. u8 *buffer = (u8 *) &data->buffer;
  157. ret = i2c_smbus_read_i2c_block_data(data->client,
  158. MAX30102_REG_FIFO_DATA,
  159. MAX30102_REG_FIFO_DATA_ENTRY_LEN,
  160. buffer);
  161. memcpy(&data->processed_buffer[0], &buffer[0], 3);
  162. memcpy(&data->processed_buffer[1], &buffer[3], 3);
  163. return (ret == MAX30102_REG_FIFO_DATA_ENTRY_LEN) ? 0 : -EINVAL;
  164. }
  165. static irqreturn_t max30102_interrupt_handler(int irq, void *private)
  166. {
  167. struct iio_dev *indio_dev = private;
  168. struct max30102_data *data = iio_priv(indio_dev);
  169. int ret, cnt = 0;
  170. mutex_lock(&data->lock);
  171. while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
  172. ret = max30102_read_measurement(data);
  173. if (ret)
  174. break;
  175. iio_push_to_buffers(data->indio_dev, data->processed_buffer);
  176. cnt--;
  177. }
  178. mutex_unlock(&data->lock);
  179. return IRQ_HANDLED;
  180. }
  181. static int max30102_get_current_idx(unsigned int val, int *reg)
  182. {
  183. /* each step is 0.200 mA */
  184. *reg = val / 200;
  185. return *reg > 0xff ? -EINVAL : 0;
  186. }
  187. static int max30102_led_init(struct max30102_data *data)
  188. {
  189. struct device *dev = &data->client->dev;
  190. struct device_node *np = dev->of_node;
  191. unsigned int val;
  192. int reg, ret;
  193. ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
  194. if (ret) {
  195. dev_info(dev, "no red-led-current-microamp set\n");
  196. /* Default to 7 mA RED LED */
  197. val = 7000;
  198. }
  199. ret = max30102_get_current_idx(val, &reg);
  200. if (ret) {
  201. dev_err(dev, "invalid RED LED current setting %d\n", val);
  202. return ret;
  203. }
  204. ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
  205. if (ret)
  206. return ret;
  207. ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
  208. if (ret) {
  209. dev_info(dev, "no ir-led-current-microamp set\n");
  210. /* Default to 7 mA IR LED */
  211. val = 7000;
  212. }
  213. ret = max30102_get_current_idx(val, &reg);
  214. if (ret) {
  215. dev_err(dev, "invalid IR LED current setting %d", val);
  216. return ret;
  217. }
  218. return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
  219. }
  220. static int max30102_chip_init(struct max30102_data *data)
  221. {
  222. int ret;
  223. /* setup LED current settings */
  224. ret = max30102_led_init(data);
  225. if (ret)
  226. return ret;
  227. /* enable 18-bit HR + SPO2 readings at 400Hz */
  228. ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
  229. (MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
  230. << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
  231. (MAX30102_REG_SPO2_CONFIG_SR_400HZ
  232. << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
  233. MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
  234. if (ret)
  235. return ret;
  236. /* enable SPO2 mode */
  237. ret = regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
  238. MAX30102_REG_MODE_CONFIG_MODE_MASK,
  239. MAX30102_REG_MODE_CONFIG_MODE_HR_EN |
  240. MAX30102_REG_MODE_CONFIG_MODE_SPO2_EN);
  241. if (ret)
  242. return ret;
  243. /* average 4 samples + generate FIFO interrupt */
  244. ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
  245. (MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
  246. << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
  247. MAX30102_REG_FIFO_CONFIG_AFULL);
  248. if (ret)
  249. return ret;
  250. /* enable FIFO interrupt */
  251. return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
  252. MAX30102_REG_INT_ENABLE_MASK,
  253. MAX30102_REG_INT_ENABLE_FIFO_EN);
  254. }
  255. static int max30102_read_temp(struct max30102_data *data, int *val)
  256. {
  257. int ret;
  258. unsigned int reg;
  259. ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, &reg);
  260. if (ret < 0)
  261. return ret;
  262. *val = reg << 4;
  263. ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, &reg);
  264. if (ret < 0)
  265. return ret;
  266. *val |= reg & 0xf;
  267. *val = sign_extend32(*val, 11);
  268. return 0;
  269. }
  270. static int max30102_get_temp(struct max30102_data *data, int *val, bool en)
  271. {
  272. int ret;
  273. if (en) {
  274. ret = max30102_set_powermode(data, true);
  275. if (ret)
  276. return ret;
  277. }
  278. /* start acquisition */
  279. ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
  280. MAX30102_REG_TEMP_CONFIG_TEMP_EN,
  281. MAX30102_REG_TEMP_CONFIG_TEMP_EN);
  282. if (ret)
  283. goto out;
  284. msleep(35);
  285. ret = max30102_read_temp(data, val);
  286. out:
  287. if (en)
  288. max30102_set_powermode(data, false);
  289. return ret;
  290. }
  291. static int max30102_read_raw(struct iio_dev *indio_dev,
  292. struct iio_chan_spec const *chan,
  293. int *val, int *val2, long mask)
  294. {
  295. struct max30102_data *data = iio_priv(indio_dev);
  296. int ret = -EINVAL;
  297. switch (mask) {
  298. case IIO_CHAN_INFO_RAW:
  299. /*
  300. * Temperature reading can only be acquired when not in
  301. * shutdown; leave shutdown briefly when buffer not running
  302. */
  303. mutex_lock(&indio_dev->mlock);
  304. if (!iio_buffer_enabled(indio_dev))
  305. ret = max30102_get_temp(data, val, true);
  306. else
  307. ret = max30102_get_temp(data, val, false);
  308. mutex_unlock(&indio_dev->mlock);
  309. if (ret)
  310. return ret;
  311. ret = IIO_VAL_INT;
  312. break;
  313. case IIO_CHAN_INFO_SCALE:
  314. *val = 1000; /* 62.5 */
  315. *val2 = 16;
  316. ret = IIO_VAL_FRACTIONAL;
  317. break;
  318. }
  319. return ret;
  320. }
  321. static const struct iio_info max30102_info = {
  322. .driver_module = THIS_MODULE,
  323. .read_raw = max30102_read_raw,
  324. };
  325. static int max30102_probe(struct i2c_client *client,
  326. const struct i2c_device_id *id)
  327. {
  328. struct max30102_data *data;
  329. struct iio_buffer *buffer;
  330. struct iio_dev *indio_dev;
  331. int ret;
  332. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  333. if (!indio_dev)
  334. return -ENOMEM;
  335. buffer = devm_iio_kfifo_allocate(&client->dev);
  336. if (!buffer)
  337. return -ENOMEM;
  338. iio_device_attach_buffer(indio_dev, buffer);
  339. indio_dev->name = MAX30102_DRV_NAME;
  340. indio_dev->channels = max30102_channels;
  341. indio_dev->info = &max30102_info;
  342. indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
  343. indio_dev->available_scan_masks = max30102_scan_masks;
  344. indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
  345. indio_dev->setup_ops = &max30102_buffer_setup_ops;
  346. indio_dev->dev.parent = &client->dev;
  347. data = iio_priv(indio_dev);
  348. data->indio_dev = indio_dev;
  349. data->client = client;
  350. mutex_init(&data->lock);
  351. i2c_set_clientdata(client, indio_dev);
  352. data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
  353. if (IS_ERR(data->regmap)) {
  354. dev_err(&client->dev, "regmap initialization failed.\n");
  355. return PTR_ERR(data->regmap);
  356. }
  357. max30102_set_powermode(data, false);
  358. ret = max30102_chip_init(data);
  359. if (ret)
  360. return ret;
  361. if (client->irq <= 0) {
  362. dev_err(&client->dev, "no valid irq defined\n");
  363. return -EINVAL;
  364. }
  365. ret = devm_request_threaded_irq(&client->dev, client->irq,
  366. NULL, max30102_interrupt_handler,
  367. IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  368. "max30102_irq", indio_dev);
  369. if (ret) {
  370. dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
  371. return ret;
  372. }
  373. return iio_device_register(indio_dev);
  374. }
  375. static int max30102_remove(struct i2c_client *client)
  376. {
  377. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  378. struct max30102_data *data = iio_priv(indio_dev);
  379. iio_device_unregister(indio_dev);
  380. max30102_set_powermode(data, false);
  381. return 0;
  382. }
  383. static const struct i2c_device_id max30102_id[] = {
  384. { "max30102", 0 },
  385. {}
  386. };
  387. MODULE_DEVICE_TABLE(i2c, max30102_id);
  388. static const struct of_device_id max30102_dt_ids[] = {
  389. { .compatible = "maxim,max30102" },
  390. { }
  391. };
  392. MODULE_DEVICE_TABLE(of, max30102_dt_ids);
  393. static struct i2c_driver max30102_driver = {
  394. .driver = {
  395. .name = MAX30102_DRV_NAME,
  396. .of_match_table = of_match_ptr(max30102_dt_ids),
  397. },
  398. .probe = max30102_probe,
  399. .remove = max30102_remove,
  400. .id_table = max30102_id,
  401. };
  402. module_i2c_driver(max30102_driver);
  403. MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
  404. MODULE_DESCRIPTION("MAX30102 heart rate and pulse oximeter sensor");
  405. MODULE_LICENSE("GPL");