max30100.c 13 KB

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  1. /*
  2. * max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor
  3. *
  4. * Copyright (C) 2015 Matt Ranostay <mranostay@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * TODO: enable pulse length controls via device tree properties
  17. */
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/delay.h>
  22. #include <linux/err.h>
  23. #include <linux/irq.h>
  24. #include <linux/i2c.h>
  25. #include <linux/mutex.h>
  26. #include <linux/of.h>
  27. #include <linux/regmap.h>
  28. #include <linux/iio/iio.h>
  29. #include <linux/iio/buffer.h>
  30. #include <linux/iio/kfifo_buf.h>
  31. #define MAX30100_REGMAP_NAME "max30100_regmap"
  32. #define MAX30100_DRV_NAME "max30100"
  33. #define MAX30100_REG_INT_STATUS 0x00
  34. #define MAX30100_REG_INT_STATUS_PWR_RDY BIT(0)
  35. #define MAX30100_REG_INT_STATUS_SPO2_RDY BIT(4)
  36. #define MAX30100_REG_INT_STATUS_HR_RDY BIT(5)
  37. #define MAX30100_REG_INT_STATUS_FIFO_RDY BIT(7)
  38. #define MAX30100_REG_INT_ENABLE 0x01
  39. #define MAX30100_REG_INT_ENABLE_SPO2_EN BIT(0)
  40. #define MAX30100_REG_INT_ENABLE_HR_EN BIT(1)
  41. #define MAX30100_REG_INT_ENABLE_FIFO_EN BIT(3)
  42. #define MAX30100_REG_INT_ENABLE_MASK 0xf0
  43. #define MAX30100_REG_INT_ENABLE_MASK_SHIFT 4
  44. #define MAX30100_REG_FIFO_WR_PTR 0x02
  45. #define MAX30100_REG_FIFO_OVR_CTR 0x03
  46. #define MAX30100_REG_FIFO_RD_PTR 0x04
  47. #define MAX30100_REG_FIFO_DATA 0x05
  48. #define MAX30100_REG_FIFO_DATA_ENTRY_COUNT 16
  49. #define MAX30100_REG_FIFO_DATA_ENTRY_LEN 4
  50. #define MAX30100_REG_MODE_CONFIG 0x06
  51. #define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0)
  52. #define MAX30100_REG_MODE_CONFIG_MODE_HR_EN BIT(1)
  53. #define MAX30100_REG_MODE_CONFIG_MODE_MASK 0x03
  54. #define MAX30100_REG_MODE_CONFIG_TEMP_EN BIT(3)
  55. #define MAX30100_REG_MODE_CONFIG_PWR BIT(7)
  56. #define MAX30100_REG_SPO2_CONFIG 0x07
  57. #define MAX30100_REG_SPO2_CONFIG_100HZ BIT(2)
  58. #define MAX30100_REG_SPO2_CONFIG_HI_RES_EN BIT(6)
  59. #define MAX30100_REG_SPO2_CONFIG_1600US 0x3
  60. #define MAX30100_REG_LED_CONFIG 0x09
  61. #define MAX30100_REG_LED_CONFIG_LED_MASK 0x0f
  62. #define MAX30100_REG_LED_CONFIG_RED_LED_SHIFT 4
  63. #define MAX30100_REG_LED_CONFIG_24MA 0x07
  64. #define MAX30100_REG_LED_CONFIG_50MA 0x0f
  65. #define MAX30100_REG_TEMP_INTEGER 0x16
  66. #define MAX30100_REG_TEMP_FRACTION 0x17
  67. struct max30100_data {
  68. struct i2c_client *client;
  69. struct iio_dev *indio_dev;
  70. struct mutex lock;
  71. struct regmap *regmap;
  72. __be16 buffer[2]; /* 2 16-bit channels */
  73. };
  74. static bool max30100_is_volatile_reg(struct device *dev, unsigned int reg)
  75. {
  76. switch (reg) {
  77. case MAX30100_REG_INT_STATUS:
  78. case MAX30100_REG_MODE_CONFIG:
  79. case MAX30100_REG_FIFO_WR_PTR:
  80. case MAX30100_REG_FIFO_OVR_CTR:
  81. case MAX30100_REG_FIFO_RD_PTR:
  82. case MAX30100_REG_FIFO_DATA:
  83. case MAX30100_REG_TEMP_INTEGER:
  84. case MAX30100_REG_TEMP_FRACTION:
  85. return true;
  86. default:
  87. return false;
  88. }
  89. }
  90. static const struct regmap_config max30100_regmap_config = {
  91. .name = MAX30100_REGMAP_NAME,
  92. .reg_bits = 8,
  93. .val_bits = 8,
  94. .max_register = MAX30100_REG_TEMP_FRACTION,
  95. .cache_type = REGCACHE_FLAT,
  96. .volatile_reg = max30100_is_volatile_reg,
  97. };
  98. static const unsigned int max30100_led_current_mapping[] = {
  99. 4400, 7600, 11000, 14200, 17400,
  100. 20800, 24000, 27100, 30600, 33800,
  101. 37000, 40200, 43600, 46800, 50000
  102. };
  103. static const unsigned long max30100_scan_masks[] = {0x3, 0};
  104. static const struct iio_chan_spec max30100_channels[] = {
  105. {
  106. .type = IIO_INTENSITY,
  107. .channel2 = IIO_MOD_LIGHT_IR,
  108. .modified = 1,
  109. .scan_index = 0,
  110. .scan_type = {
  111. .sign = 'u',
  112. .realbits = 16,
  113. .storagebits = 16,
  114. .endianness = IIO_BE,
  115. },
  116. },
  117. {
  118. .type = IIO_INTENSITY,
  119. .channel2 = IIO_MOD_LIGHT_RED,
  120. .modified = 1,
  121. .scan_index = 1,
  122. .scan_type = {
  123. .sign = 'u',
  124. .realbits = 16,
  125. .storagebits = 16,
  126. .endianness = IIO_BE,
  127. },
  128. },
  129. {
  130. .type = IIO_TEMP,
  131. .info_mask_separate =
  132. BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
  133. .scan_index = -1,
  134. },
  135. };
  136. static int max30100_set_powermode(struct max30100_data *data, bool state)
  137. {
  138. return regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
  139. MAX30100_REG_MODE_CONFIG_PWR,
  140. state ? 0 : MAX30100_REG_MODE_CONFIG_PWR);
  141. }
  142. static int max30100_clear_fifo(struct max30100_data *data)
  143. {
  144. int ret;
  145. ret = regmap_write(data->regmap, MAX30100_REG_FIFO_WR_PTR, 0);
  146. if (ret)
  147. return ret;
  148. ret = regmap_write(data->regmap, MAX30100_REG_FIFO_OVR_CTR, 0);
  149. if (ret)
  150. return ret;
  151. return regmap_write(data->regmap, MAX30100_REG_FIFO_RD_PTR, 0);
  152. }
  153. static int max30100_buffer_postenable(struct iio_dev *indio_dev)
  154. {
  155. struct max30100_data *data = iio_priv(indio_dev);
  156. int ret;
  157. ret = max30100_set_powermode(data, true);
  158. if (ret)
  159. return ret;
  160. return max30100_clear_fifo(data);
  161. }
  162. static int max30100_buffer_predisable(struct iio_dev *indio_dev)
  163. {
  164. struct max30100_data *data = iio_priv(indio_dev);
  165. return max30100_set_powermode(data, false);
  166. }
  167. static const struct iio_buffer_setup_ops max30100_buffer_setup_ops = {
  168. .postenable = max30100_buffer_postenable,
  169. .predisable = max30100_buffer_predisable,
  170. };
  171. static inline int max30100_fifo_count(struct max30100_data *data)
  172. {
  173. unsigned int val;
  174. int ret;
  175. ret = regmap_read(data->regmap, MAX30100_REG_INT_STATUS, &val);
  176. if (ret)
  177. return ret;
  178. /* FIFO is almost full */
  179. if (val & MAX30100_REG_INT_STATUS_FIFO_RDY)
  180. return MAX30100_REG_FIFO_DATA_ENTRY_COUNT - 1;
  181. return 0;
  182. }
  183. static int max30100_read_measurement(struct max30100_data *data)
  184. {
  185. int ret;
  186. ret = i2c_smbus_read_i2c_block_data(data->client,
  187. MAX30100_REG_FIFO_DATA,
  188. MAX30100_REG_FIFO_DATA_ENTRY_LEN,
  189. (u8 *) &data->buffer);
  190. return (ret == MAX30100_REG_FIFO_DATA_ENTRY_LEN) ? 0 : ret;
  191. }
  192. static irqreturn_t max30100_interrupt_handler(int irq, void *private)
  193. {
  194. struct iio_dev *indio_dev = private;
  195. struct max30100_data *data = iio_priv(indio_dev);
  196. int ret, cnt = 0;
  197. mutex_lock(&data->lock);
  198. while (cnt || (cnt = max30100_fifo_count(data)) > 0) {
  199. ret = max30100_read_measurement(data);
  200. if (ret)
  201. break;
  202. iio_push_to_buffers(data->indio_dev, data->buffer);
  203. cnt--;
  204. }
  205. mutex_unlock(&data->lock);
  206. return IRQ_HANDLED;
  207. }
  208. static int max30100_get_current_idx(unsigned int val, int *reg)
  209. {
  210. int idx;
  211. /* LED turned off */
  212. if (val == 0) {
  213. *reg = 0;
  214. return 0;
  215. }
  216. for (idx = 0; idx < ARRAY_SIZE(max30100_led_current_mapping); idx++) {
  217. if (max30100_led_current_mapping[idx] == val) {
  218. *reg = idx + 1;
  219. return 0;
  220. }
  221. }
  222. return -EINVAL;
  223. }
  224. static int max30100_led_init(struct max30100_data *data)
  225. {
  226. struct device *dev = &data->client->dev;
  227. struct device_node *np = dev->of_node;
  228. unsigned int val[2];
  229. int reg, ret;
  230. ret = of_property_read_u32_array(np, "maxim,led-current-microamp",
  231. (unsigned int *) &val, 2);
  232. if (ret) {
  233. /* Default to 24 mA RED LED, 50 mA IR LED */
  234. reg = (MAX30100_REG_LED_CONFIG_24MA <<
  235. MAX30100_REG_LED_CONFIG_RED_LED_SHIFT) |
  236. MAX30100_REG_LED_CONFIG_50MA;
  237. dev_warn(dev, "no led-current-microamp set");
  238. return regmap_write(data->regmap, MAX30100_REG_LED_CONFIG, reg);
  239. }
  240. /* RED LED current */
  241. ret = max30100_get_current_idx(val[0], &reg);
  242. if (ret) {
  243. dev_err(dev, "invalid RED current setting %d", val[0]);
  244. return ret;
  245. }
  246. ret = regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
  247. MAX30100_REG_LED_CONFIG_LED_MASK <<
  248. MAX30100_REG_LED_CONFIG_RED_LED_SHIFT,
  249. reg << MAX30100_REG_LED_CONFIG_RED_LED_SHIFT);
  250. if (ret)
  251. return ret;
  252. /* IR LED current */
  253. ret = max30100_get_current_idx(val[1], &reg);
  254. if (ret) {
  255. dev_err(dev, "invalid IR current setting %d", val[1]);
  256. return ret;
  257. }
  258. return regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
  259. MAX30100_REG_LED_CONFIG_LED_MASK, reg);
  260. }
  261. static int max30100_chip_init(struct max30100_data *data)
  262. {
  263. int ret;
  264. /* setup LED current settings */
  265. ret = max30100_led_init(data);
  266. if (ret)
  267. return ret;
  268. /* enable hi-res SPO2 readings at 100Hz */
  269. ret = regmap_write(data->regmap, MAX30100_REG_SPO2_CONFIG,
  270. MAX30100_REG_SPO2_CONFIG_HI_RES_EN |
  271. MAX30100_REG_SPO2_CONFIG_100HZ);
  272. if (ret)
  273. return ret;
  274. /* enable SPO2 mode */
  275. ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
  276. MAX30100_REG_MODE_CONFIG_MODE_MASK,
  277. MAX30100_REG_MODE_CONFIG_MODE_HR_EN |
  278. MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN);
  279. if (ret)
  280. return ret;
  281. /* enable FIFO interrupt */
  282. return regmap_update_bits(data->regmap, MAX30100_REG_INT_ENABLE,
  283. MAX30100_REG_INT_ENABLE_MASK,
  284. MAX30100_REG_INT_ENABLE_FIFO_EN
  285. << MAX30100_REG_INT_ENABLE_MASK_SHIFT);
  286. }
  287. static int max30100_read_temp(struct max30100_data *data, int *val)
  288. {
  289. int ret;
  290. unsigned int reg;
  291. ret = regmap_read(data->regmap, MAX30100_REG_TEMP_INTEGER, &reg);
  292. if (ret < 0)
  293. return ret;
  294. *val = reg << 4;
  295. ret = regmap_read(data->regmap, MAX30100_REG_TEMP_FRACTION, &reg);
  296. if (ret < 0)
  297. return ret;
  298. *val |= reg & 0xf;
  299. *val = sign_extend32(*val, 11);
  300. return 0;
  301. }
  302. static int max30100_get_temp(struct max30100_data *data, int *val)
  303. {
  304. int ret;
  305. /* start acquisition */
  306. ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
  307. MAX30100_REG_MODE_CONFIG_TEMP_EN,
  308. MAX30100_REG_MODE_CONFIG_TEMP_EN);
  309. if (ret)
  310. return ret;
  311. msleep(35);
  312. return max30100_read_temp(data, val);
  313. }
  314. static int max30100_read_raw(struct iio_dev *indio_dev,
  315. struct iio_chan_spec const *chan,
  316. int *val, int *val2, long mask)
  317. {
  318. struct max30100_data *data = iio_priv(indio_dev);
  319. int ret = -EINVAL;
  320. switch (mask) {
  321. case IIO_CHAN_INFO_RAW:
  322. /*
  323. * Temperature reading can only be acquired while engine
  324. * is running
  325. */
  326. mutex_lock(&indio_dev->mlock);
  327. if (!iio_buffer_enabled(indio_dev))
  328. ret = -EAGAIN;
  329. else {
  330. ret = max30100_get_temp(data, val);
  331. if (!ret)
  332. ret = IIO_VAL_INT;
  333. }
  334. mutex_unlock(&indio_dev->mlock);
  335. break;
  336. case IIO_CHAN_INFO_SCALE:
  337. *val = 1; /* 0.0625 */
  338. *val2 = 16;
  339. ret = IIO_VAL_FRACTIONAL;
  340. break;
  341. }
  342. return ret;
  343. }
  344. static const struct iio_info max30100_info = {
  345. .driver_module = THIS_MODULE,
  346. .read_raw = max30100_read_raw,
  347. };
  348. static int max30100_probe(struct i2c_client *client,
  349. const struct i2c_device_id *id)
  350. {
  351. struct max30100_data *data;
  352. struct iio_buffer *buffer;
  353. struct iio_dev *indio_dev;
  354. int ret;
  355. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  356. if (!indio_dev)
  357. return -ENOMEM;
  358. buffer = devm_iio_kfifo_allocate(&client->dev);
  359. if (!buffer)
  360. return -ENOMEM;
  361. iio_device_attach_buffer(indio_dev, buffer);
  362. indio_dev->name = MAX30100_DRV_NAME;
  363. indio_dev->channels = max30100_channels;
  364. indio_dev->info = &max30100_info;
  365. indio_dev->num_channels = ARRAY_SIZE(max30100_channels);
  366. indio_dev->available_scan_masks = max30100_scan_masks;
  367. indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
  368. indio_dev->setup_ops = &max30100_buffer_setup_ops;
  369. indio_dev->dev.parent = &client->dev;
  370. data = iio_priv(indio_dev);
  371. data->indio_dev = indio_dev;
  372. data->client = client;
  373. mutex_init(&data->lock);
  374. i2c_set_clientdata(client, indio_dev);
  375. data->regmap = devm_regmap_init_i2c(client, &max30100_regmap_config);
  376. if (IS_ERR(data->regmap)) {
  377. dev_err(&client->dev, "regmap initialization failed.\n");
  378. return PTR_ERR(data->regmap);
  379. }
  380. max30100_set_powermode(data, false);
  381. ret = max30100_chip_init(data);
  382. if (ret)
  383. return ret;
  384. if (client->irq <= 0) {
  385. dev_err(&client->dev, "no valid irq defined\n");
  386. return -EINVAL;
  387. }
  388. ret = devm_request_threaded_irq(&client->dev, client->irq,
  389. NULL, max30100_interrupt_handler,
  390. IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  391. "max30100_irq", indio_dev);
  392. if (ret) {
  393. dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
  394. return ret;
  395. }
  396. return iio_device_register(indio_dev);
  397. }
  398. static int max30100_remove(struct i2c_client *client)
  399. {
  400. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  401. struct max30100_data *data = iio_priv(indio_dev);
  402. iio_device_unregister(indio_dev);
  403. max30100_set_powermode(data, false);
  404. return 0;
  405. }
  406. static const struct i2c_device_id max30100_id[] = {
  407. { "max30100", 0 },
  408. {}
  409. };
  410. MODULE_DEVICE_TABLE(i2c, max30100_id);
  411. static const struct of_device_id max30100_dt_ids[] = {
  412. { .compatible = "maxim,max30100" },
  413. { }
  414. };
  415. MODULE_DEVICE_TABLE(of, max30100_dt_ids);
  416. static struct i2c_driver max30100_driver = {
  417. .driver = {
  418. .name = MAX30100_DRV_NAME,
  419. .of_match_table = of_match_ptr(max30100_dt_ids),
  420. },
  421. .probe = max30100_probe,
  422. .remove = max30100_remove,
  423. .id_table = max30100_id,
  424. };
  425. module_i2c_driver(max30100_driver);
  426. MODULE_AUTHOR("Matt Ranostay <mranostay@gmail.com>");
  427. MODULE_DESCRIPTION("MAX30100 heart rate and pulse oximeter sensor");
  428. MODULE_LICENSE("GPL");