afe4404.c 17 KB

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  1. /*
  2. * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters
  3. *
  4. * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
  5. * Andrew F. Davis <afd@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. */
  16. #include <linux/device.h>
  17. #include <linux/err.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/i2c.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/regmap.h>
  23. #include <linux/sysfs.h>
  24. #include <linux/regulator/consumer.h>
  25. #include <linux/iio/iio.h>
  26. #include <linux/iio/sysfs.h>
  27. #include <linux/iio/buffer.h>
  28. #include <linux/iio/trigger.h>
  29. #include <linux/iio/triggered_buffer.h>
  30. #include <linux/iio/trigger_consumer.h>
  31. #include "afe440x.h"
  32. #define AFE4404_DRIVER_NAME "afe4404"
  33. /* AFE4404 registers */
  34. #define AFE4404_TIA_GAIN_SEP 0x20
  35. #define AFE4404_TIA_GAIN 0x21
  36. #define AFE4404_PROG_TG_STC 0x34
  37. #define AFE4404_PROG_TG_ENDC 0x35
  38. #define AFE4404_LED3LEDSTC 0x36
  39. #define AFE4404_LED3LEDENDC 0x37
  40. #define AFE4404_CLKDIV_PRF 0x39
  41. #define AFE4404_OFFDAC 0x3a
  42. #define AFE4404_DEC 0x3d
  43. #define AFE4404_AVG_LED2_ALED2VAL 0x3f
  44. #define AFE4404_AVG_LED1_ALED1VAL 0x40
  45. /* AFE4404 CONTROL2 register fields */
  46. #define AFE440X_CONTROL2_OSC_ENABLE BIT(9)
  47. enum afe4404_fields {
  48. /* Gains */
  49. F_TIA_GAIN_SEP, F_TIA_CF_SEP,
  50. F_TIA_GAIN, TIA_CF,
  51. /* LED Current */
  52. F_ILED1, F_ILED2, F_ILED3,
  53. /* Offset DAC */
  54. F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2,
  55. /* sentinel */
  56. F_MAX_FIELDS
  57. };
  58. static const struct reg_field afe4404_reg_fields[] = {
  59. /* Gains */
  60. [F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2),
  61. [F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5),
  62. [F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2),
  63. [TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5),
  64. /* LED Current */
  65. [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5),
  66. [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11),
  67. [F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17),
  68. /* Offset DAC */
  69. [F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4),
  70. [F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9),
  71. [F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14),
  72. [F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19),
  73. };
  74. /**
  75. * struct afe4404_data - AFE4404 device instance data
  76. * @dev: Device structure
  77. * @regmap: Register map of the device
  78. * @fields: Register fields of the device
  79. * @regulator: Pointer to the regulator for the IC
  80. * @trig: IIO trigger for this device
  81. * @irq: ADC_RDY line interrupt number
  82. * @buffer: Used to construct a scan to push to the iio buffer.
  83. */
  84. struct afe4404_data {
  85. struct device *dev;
  86. struct regmap *regmap;
  87. struct regmap_field *fields[F_MAX_FIELDS];
  88. struct regulator *regulator;
  89. struct iio_trigger *trig;
  90. int irq;
  91. s32 buffer[10] __aligned(8);
  92. };
  93. enum afe4404_chan_id {
  94. LED2 = 1,
  95. ALED2,
  96. LED1,
  97. ALED1,
  98. LED2_ALED2,
  99. LED1_ALED1,
  100. };
  101. static const unsigned int afe4404_channel_values[] = {
  102. [LED2] = AFE440X_LED2VAL,
  103. [ALED2] = AFE440X_ALED2VAL,
  104. [LED1] = AFE440X_LED1VAL,
  105. [ALED1] = AFE440X_ALED1VAL,
  106. [LED2_ALED2] = AFE440X_LED2_ALED2VAL,
  107. [LED1_ALED1] = AFE440X_LED1_ALED1VAL,
  108. };
  109. static const unsigned int afe4404_channel_leds[] = {
  110. [LED2] = F_ILED2,
  111. [ALED2] = F_ILED3,
  112. [LED1] = F_ILED1,
  113. };
  114. static const unsigned int afe4404_channel_offdacs[] = {
  115. [LED2] = F_OFFDAC_LED2,
  116. [ALED2] = F_OFFDAC_AMB2,
  117. [LED1] = F_OFFDAC_LED1,
  118. [ALED1] = F_OFFDAC_AMB1,
  119. };
  120. static const struct iio_chan_spec afe4404_channels[] = {
  121. /* ADC values */
  122. AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)),
  123. AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)),
  124. AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)),
  125. AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)),
  126. AFE440X_INTENSITY_CHAN(LED2_ALED2, 0),
  127. AFE440X_INTENSITY_CHAN(LED1_ALED1, 0),
  128. /* LED current */
  129. AFE440X_CURRENT_CHAN(LED2),
  130. AFE440X_CURRENT_CHAN(ALED2),
  131. AFE440X_CURRENT_CHAN(LED1),
  132. };
  133. static const struct afe440x_val_table afe4404_res_table[] = {
  134. { .integer = 500000, .fract = 0 },
  135. { .integer = 250000, .fract = 0 },
  136. { .integer = 100000, .fract = 0 },
  137. { .integer = 50000, .fract = 0 },
  138. { .integer = 25000, .fract = 0 },
  139. { .integer = 10000, .fract = 0 },
  140. { .integer = 1000000, .fract = 0 },
  141. { .integer = 2000000, .fract = 0 },
  142. };
  143. AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table);
  144. static const struct afe440x_val_table afe4404_cap_table[] = {
  145. { .integer = 0, .fract = 5000 },
  146. { .integer = 0, .fract = 2500 },
  147. { .integer = 0, .fract = 10000 },
  148. { .integer = 0, .fract = 7500 },
  149. { .integer = 0, .fract = 20000 },
  150. { .integer = 0, .fract = 17500 },
  151. { .integer = 0, .fract = 25000 },
  152. { .integer = 0, .fract = 22500 },
  153. };
  154. AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table);
  155. static ssize_t afe440x_show_register(struct device *dev,
  156. struct device_attribute *attr,
  157. char *buf)
  158. {
  159. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  160. struct afe4404_data *afe = iio_priv(indio_dev);
  161. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  162. unsigned int reg_val;
  163. int vals[2];
  164. int ret;
  165. ret = regmap_field_read(afe->fields[afe440x_attr->field], &reg_val);
  166. if (ret)
  167. return ret;
  168. if (reg_val >= afe440x_attr->table_size)
  169. return -EINVAL;
  170. vals[0] = afe440x_attr->val_table[reg_val].integer;
  171. vals[1] = afe440x_attr->val_table[reg_val].fract;
  172. return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals);
  173. }
  174. static ssize_t afe440x_store_register(struct device *dev,
  175. struct device_attribute *attr,
  176. const char *buf, size_t count)
  177. {
  178. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  179. struct afe4404_data *afe = iio_priv(indio_dev);
  180. struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr);
  181. int val, integer, fract, ret;
  182. ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract);
  183. if (ret)
  184. return ret;
  185. for (val = 0; val < afe440x_attr->table_size; val++)
  186. if (afe440x_attr->val_table[val].integer == integer &&
  187. afe440x_attr->val_table[val].fract == fract)
  188. break;
  189. if (val == afe440x_attr->table_size)
  190. return -EINVAL;
  191. ret = regmap_field_write(afe->fields[afe440x_attr->field], val);
  192. if (ret)
  193. return ret;
  194. return count;
  195. }
  196. static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
  197. static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
  198. static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table);
  199. static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table);
  200. static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table);
  201. static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table);
  202. static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table);
  203. static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table);
  204. static struct attribute *afe440x_attributes[] = {
  205. &dev_attr_in_intensity_resistance_available.attr,
  206. &dev_attr_in_intensity_capacitance_available.attr,
  207. &afe440x_attr_in_intensity1_resistance.dev_attr.attr,
  208. &afe440x_attr_in_intensity1_capacitance.dev_attr.attr,
  209. &afe440x_attr_in_intensity2_resistance.dev_attr.attr,
  210. &afe440x_attr_in_intensity2_capacitance.dev_attr.attr,
  211. &afe440x_attr_in_intensity3_resistance.dev_attr.attr,
  212. &afe440x_attr_in_intensity3_capacitance.dev_attr.attr,
  213. &afe440x_attr_in_intensity4_resistance.dev_attr.attr,
  214. &afe440x_attr_in_intensity4_capacitance.dev_attr.attr,
  215. NULL
  216. };
  217. static const struct attribute_group afe440x_attribute_group = {
  218. .attrs = afe440x_attributes
  219. };
  220. static int afe4404_read_raw(struct iio_dev *indio_dev,
  221. struct iio_chan_spec const *chan,
  222. int *val, int *val2, long mask)
  223. {
  224. struct afe4404_data *afe = iio_priv(indio_dev);
  225. unsigned int value_reg = afe4404_channel_values[chan->address];
  226. unsigned int led_field = afe4404_channel_leds[chan->address];
  227. unsigned int offdac_field = afe4404_channel_offdacs[chan->address];
  228. int ret;
  229. switch (chan->type) {
  230. case IIO_INTENSITY:
  231. switch (mask) {
  232. case IIO_CHAN_INFO_RAW:
  233. ret = regmap_read(afe->regmap, value_reg, val);
  234. if (ret)
  235. return ret;
  236. return IIO_VAL_INT;
  237. case IIO_CHAN_INFO_OFFSET:
  238. ret = regmap_field_read(afe->fields[offdac_field], val);
  239. if (ret)
  240. return ret;
  241. return IIO_VAL_INT;
  242. }
  243. break;
  244. case IIO_CURRENT:
  245. switch (mask) {
  246. case IIO_CHAN_INFO_RAW:
  247. ret = regmap_field_read(afe->fields[led_field], val);
  248. if (ret)
  249. return ret;
  250. return IIO_VAL_INT;
  251. case IIO_CHAN_INFO_SCALE:
  252. *val = 0;
  253. *val2 = 800000;
  254. return IIO_VAL_INT_PLUS_MICRO;
  255. }
  256. break;
  257. default:
  258. break;
  259. }
  260. return -EINVAL;
  261. }
  262. static int afe4404_write_raw(struct iio_dev *indio_dev,
  263. struct iio_chan_spec const *chan,
  264. int val, int val2, long mask)
  265. {
  266. struct afe4404_data *afe = iio_priv(indio_dev);
  267. unsigned int led_field = afe4404_channel_leds[chan->address];
  268. unsigned int offdac_field = afe4404_channel_offdacs[chan->address];
  269. switch (chan->type) {
  270. case IIO_INTENSITY:
  271. switch (mask) {
  272. case IIO_CHAN_INFO_OFFSET:
  273. return regmap_field_write(afe->fields[offdac_field], val);
  274. }
  275. break;
  276. case IIO_CURRENT:
  277. switch (mask) {
  278. case IIO_CHAN_INFO_RAW:
  279. return regmap_field_write(afe->fields[led_field], val);
  280. }
  281. break;
  282. default:
  283. break;
  284. }
  285. return -EINVAL;
  286. }
  287. static const struct iio_info afe4404_iio_info = {
  288. .attrs = &afe440x_attribute_group,
  289. .read_raw = afe4404_read_raw,
  290. .write_raw = afe4404_write_raw,
  291. .driver_module = THIS_MODULE,
  292. };
  293. static irqreturn_t afe4404_trigger_handler(int irq, void *private)
  294. {
  295. struct iio_poll_func *pf = private;
  296. struct iio_dev *indio_dev = pf->indio_dev;
  297. struct afe4404_data *afe = iio_priv(indio_dev);
  298. int ret, bit, i = 0;
  299. for_each_set_bit(bit, indio_dev->active_scan_mask,
  300. indio_dev->masklength) {
  301. ret = regmap_read(afe->regmap, afe4404_channel_values[bit],
  302. &afe->buffer[i++]);
  303. if (ret)
  304. goto err;
  305. }
  306. iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
  307. pf->timestamp);
  308. err:
  309. iio_trigger_notify_done(indio_dev->trig);
  310. return IRQ_HANDLED;
  311. }
  312. static const struct iio_trigger_ops afe4404_trigger_ops = {
  313. .owner = THIS_MODULE,
  314. };
  315. /* Default timings from data-sheet */
  316. #define AFE4404_TIMING_PAIRS \
  317. { AFE440X_PRPCOUNT, 39999 }, \
  318. { AFE440X_LED2LEDSTC, 0 }, \
  319. { AFE440X_LED2LEDENDC, 398 }, \
  320. { AFE440X_LED2STC, 80 }, \
  321. { AFE440X_LED2ENDC, 398 }, \
  322. { AFE440X_ADCRSTSTCT0, 5600 }, \
  323. { AFE440X_ADCRSTENDCT0, 5606 }, \
  324. { AFE440X_LED2CONVST, 5607 }, \
  325. { AFE440X_LED2CONVEND, 6066 }, \
  326. { AFE4404_LED3LEDSTC, 400 }, \
  327. { AFE4404_LED3LEDENDC, 798 }, \
  328. { AFE440X_ALED2STC, 480 }, \
  329. { AFE440X_ALED2ENDC, 798 }, \
  330. { AFE440X_ADCRSTSTCT1, 6068 }, \
  331. { AFE440X_ADCRSTENDCT1, 6074 }, \
  332. { AFE440X_ALED2CONVST, 6075 }, \
  333. { AFE440X_ALED2CONVEND, 6534 }, \
  334. { AFE440X_LED1LEDSTC, 800 }, \
  335. { AFE440X_LED1LEDENDC, 1198 }, \
  336. { AFE440X_LED1STC, 880 }, \
  337. { AFE440X_LED1ENDC, 1198 }, \
  338. { AFE440X_ADCRSTSTCT2, 6536 }, \
  339. { AFE440X_ADCRSTENDCT2, 6542 }, \
  340. { AFE440X_LED1CONVST, 6543 }, \
  341. { AFE440X_LED1CONVEND, 7003 }, \
  342. { AFE440X_ALED1STC, 1280 }, \
  343. { AFE440X_ALED1ENDC, 1598 }, \
  344. { AFE440X_ADCRSTSTCT3, 7005 }, \
  345. { AFE440X_ADCRSTENDCT3, 7011 }, \
  346. { AFE440X_ALED1CONVST, 7012 }, \
  347. { AFE440X_ALED1CONVEND, 7471 }, \
  348. { AFE440X_PDNCYCLESTC, 7671 }, \
  349. { AFE440X_PDNCYCLEENDC, 39199 }
  350. static const struct reg_sequence afe4404_reg_sequences[] = {
  351. AFE4404_TIMING_PAIRS,
  352. { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN },
  353. { AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN },
  354. { AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE },
  355. };
  356. static const struct regmap_range afe4404_yes_ranges[] = {
  357. regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL),
  358. regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL),
  359. };
  360. static const struct regmap_access_table afe4404_volatile_table = {
  361. .yes_ranges = afe4404_yes_ranges,
  362. .n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges),
  363. };
  364. static const struct regmap_config afe4404_regmap_config = {
  365. .reg_bits = 8,
  366. .val_bits = 24,
  367. .max_register = AFE4404_AVG_LED1_ALED1VAL,
  368. .cache_type = REGCACHE_RBTREE,
  369. .volatile_table = &afe4404_volatile_table,
  370. };
  371. static const struct of_device_id afe4404_of_match[] = {
  372. { .compatible = "ti,afe4404", },
  373. { /* sentinel */ }
  374. };
  375. MODULE_DEVICE_TABLE(of, afe4404_of_match);
  376. static int __maybe_unused afe4404_suspend(struct device *dev)
  377. {
  378. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  379. struct afe4404_data *afe = iio_priv(indio_dev);
  380. int ret;
  381. ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
  382. AFE440X_CONTROL2_PDN_AFE,
  383. AFE440X_CONTROL2_PDN_AFE);
  384. if (ret)
  385. return ret;
  386. ret = regulator_disable(afe->regulator);
  387. if (ret) {
  388. dev_err(dev, "Unable to disable regulator\n");
  389. return ret;
  390. }
  391. return 0;
  392. }
  393. static int __maybe_unused afe4404_resume(struct device *dev)
  394. {
  395. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  396. struct afe4404_data *afe = iio_priv(indio_dev);
  397. int ret;
  398. ret = regulator_enable(afe->regulator);
  399. if (ret) {
  400. dev_err(dev, "Unable to enable regulator\n");
  401. return ret;
  402. }
  403. ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2,
  404. AFE440X_CONTROL2_PDN_AFE, 0);
  405. if (ret)
  406. return ret;
  407. return 0;
  408. }
  409. static SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend, afe4404_resume);
  410. static int afe4404_probe(struct i2c_client *client,
  411. const struct i2c_device_id *id)
  412. {
  413. struct iio_dev *indio_dev;
  414. struct afe4404_data *afe;
  415. int i, ret;
  416. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe));
  417. if (!indio_dev)
  418. return -ENOMEM;
  419. afe = iio_priv(indio_dev);
  420. i2c_set_clientdata(client, indio_dev);
  421. afe->dev = &client->dev;
  422. afe->irq = client->irq;
  423. afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config);
  424. if (IS_ERR(afe->regmap)) {
  425. dev_err(afe->dev, "Unable to allocate register map\n");
  426. return PTR_ERR(afe->regmap);
  427. }
  428. for (i = 0; i < F_MAX_FIELDS; i++) {
  429. afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap,
  430. afe4404_reg_fields[i]);
  431. if (IS_ERR(afe->fields[i])) {
  432. dev_err(afe->dev, "Unable to allocate regmap fields\n");
  433. return PTR_ERR(afe->fields[i]);
  434. }
  435. }
  436. afe->regulator = devm_regulator_get(afe->dev, "tx_sup");
  437. if (IS_ERR(afe->regulator)) {
  438. dev_err(afe->dev, "Unable to get regulator\n");
  439. return PTR_ERR(afe->regulator);
  440. }
  441. ret = regulator_enable(afe->regulator);
  442. if (ret) {
  443. dev_err(afe->dev, "Unable to enable regulator\n");
  444. return ret;
  445. }
  446. ret = regmap_write(afe->regmap, AFE440X_CONTROL0,
  447. AFE440X_CONTROL0_SW_RESET);
  448. if (ret) {
  449. dev_err(afe->dev, "Unable to reset device\n");
  450. goto disable_reg;
  451. }
  452. ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences,
  453. ARRAY_SIZE(afe4404_reg_sequences));
  454. if (ret) {
  455. dev_err(afe->dev, "Unable to set register defaults\n");
  456. goto disable_reg;
  457. }
  458. indio_dev->modes = INDIO_DIRECT_MODE;
  459. indio_dev->dev.parent = afe->dev;
  460. indio_dev->channels = afe4404_channels;
  461. indio_dev->num_channels = ARRAY_SIZE(afe4404_channels);
  462. indio_dev->name = AFE4404_DRIVER_NAME;
  463. indio_dev->info = &afe4404_iio_info;
  464. if (afe->irq > 0) {
  465. afe->trig = devm_iio_trigger_alloc(afe->dev,
  466. "%s-dev%d",
  467. indio_dev->name,
  468. indio_dev->id);
  469. if (!afe->trig) {
  470. dev_err(afe->dev, "Unable to allocate IIO trigger\n");
  471. ret = -ENOMEM;
  472. goto disable_reg;
  473. }
  474. iio_trigger_set_drvdata(afe->trig, indio_dev);
  475. afe->trig->ops = &afe4404_trigger_ops;
  476. afe->trig->dev.parent = afe->dev;
  477. ret = iio_trigger_register(afe->trig);
  478. if (ret) {
  479. dev_err(afe->dev, "Unable to register IIO trigger\n");
  480. goto disable_reg;
  481. }
  482. ret = devm_request_threaded_irq(afe->dev, afe->irq,
  483. iio_trigger_generic_data_rdy_poll,
  484. NULL, IRQF_ONESHOT,
  485. AFE4404_DRIVER_NAME,
  486. afe->trig);
  487. if (ret) {
  488. dev_err(afe->dev, "Unable to request IRQ\n");
  489. goto disable_reg;
  490. }
  491. }
  492. ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
  493. afe4404_trigger_handler, NULL);
  494. if (ret) {
  495. dev_err(afe->dev, "Unable to setup buffer\n");
  496. goto unregister_trigger;
  497. }
  498. ret = iio_device_register(indio_dev);
  499. if (ret) {
  500. dev_err(afe->dev, "Unable to register IIO device\n");
  501. goto unregister_triggered_buffer;
  502. }
  503. return 0;
  504. unregister_triggered_buffer:
  505. iio_triggered_buffer_cleanup(indio_dev);
  506. unregister_trigger:
  507. if (afe->irq > 0)
  508. iio_trigger_unregister(afe->trig);
  509. disable_reg:
  510. regulator_disable(afe->regulator);
  511. return ret;
  512. }
  513. static int afe4404_remove(struct i2c_client *client)
  514. {
  515. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  516. struct afe4404_data *afe = iio_priv(indio_dev);
  517. int ret;
  518. iio_device_unregister(indio_dev);
  519. iio_triggered_buffer_cleanup(indio_dev);
  520. if (afe->irq > 0)
  521. iio_trigger_unregister(afe->trig);
  522. ret = regulator_disable(afe->regulator);
  523. if (ret) {
  524. dev_err(afe->dev, "Unable to disable regulator\n");
  525. return ret;
  526. }
  527. return 0;
  528. }
  529. static const struct i2c_device_id afe4404_ids[] = {
  530. { "afe4404", 0 },
  531. { /* sentinel */ }
  532. };
  533. MODULE_DEVICE_TABLE(i2c, afe4404_ids);
  534. static struct i2c_driver afe4404_i2c_driver = {
  535. .driver = {
  536. .name = AFE4404_DRIVER_NAME,
  537. .of_match_table = afe4404_of_match,
  538. .pm = &afe4404_pm_ops,
  539. },
  540. .probe = afe4404_probe,
  541. .remove = afe4404_remove,
  542. .id_table = afe4404_ids,
  543. };
  544. module_i2c_driver(afe4404_i2c_driver);
  545. MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
  546. MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE");
  547. MODULE_LICENSE("GPL v2");