vmwgfx_binding.c 39 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2015 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. /*
  28. * This file implements the vmwgfx context binding manager,
  29. * The sole reason for having to use this code is that vmware guest
  30. * backed contexts can be swapped out to their backing mobs by the device
  31. * at any time, also swapped in at any time. At swapin time, the device
  32. * validates the context bindings to make sure they point to valid resources.
  33. * It's this outside-of-drawcall validation (that can happen at any time),
  34. * that makes this code necessary.
  35. *
  36. * We therefore need to kill any context bindings pointing to a resource
  37. * when the resource is swapped out. Furthermore, if the vmwgfx driver has
  38. * swapped out the context we can't swap it in again to kill bindings because
  39. * of backing mob reservation lockdep violations, so as part of
  40. * context swapout, also kill all bindings of a context, so that they are
  41. * already killed if a resource to which a binding points
  42. * needs to be swapped out.
  43. *
  44. * Note that a resource can be pointed to by bindings from multiple contexts,
  45. * Therefore we can't easily protect this data by a per context mutex
  46. * (unless we use deadlock-safe WW mutexes). So we use a global binding_mutex
  47. * to protect all binding manager data.
  48. *
  49. * Finally, any association between a context and a global resource
  50. * (surface, shader or even DX query) is conceptually a context binding that
  51. * needs to be tracked by this code.
  52. */
  53. #include "vmwgfx_drv.h"
  54. #include "vmwgfx_binding.h"
  55. #include "device_include/svga3d_reg.h"
  56. #define VMW_BINDING_RT_BIT 0
  57. #define VMW_BINDING_PS_BIT 1
  58. #define VMW_BINDING_SO_BIT 2
  59. #define VMW_BINDING_VB_BIT 3
  60. #define VMW_BINDING_NUM_BITS 4
  61. #define VMW_BINDING_PS_SR_BIT 0
  62. /**
  63. * struct vmw_ctx_binding_state - per context binding state
  64. *
  65. * @dev_priv: Pointer to device private structure.
  66. * @list: linked list of individual active bindings.
  67. * @render_targets: Render target bindings.
  68. * @texture_units: Texture units bindings.
  69. * @ds_view: Depth-stencil view binding.
  70. * @so_targets: StreamOutput target bindings.
  71. * @vertex_buffers: Vertex buffer bindings.
  72. * @index_buffer: Index buffer binding.
  73. * @per_shader: Per shader-type bindings.
  74. * @dirty: Bitmap tracking per binding-type changes that have not yet
  75. * been emitted to the device.
  76. * @dirty_vb: Bitmap tracking individual vertex buffer binding changes that
  77. * have not yet been emitted to the device.
  78. * @bind_cmd_buffer: Scratch space used to construct binding commands.
  79. * @bind_cmd_count: Number of binding command data entries in @bind_cmd_buffer
  80. * @bind_first_slot: Used together with @bind_cmd_buffer to indicate the
  81. * device binding slot of the first command data entry in @bind_cmd_buffer.
  82. *
  83. * Note that this structure also provides storage space for the individual
  84. * struct vmw_ctx_binding objects, so that no dynamic allocation is needed
  85. * for individual bindings.
  86. *
  87. */
  88. struct vmw_ctx_binding_state {
  89. struct vmw_private *dev_priv;
  90. struct list_head list;
  91. struct vmw_ctx_bindinfo_view render_targets[SVGA3D_RT_MAX];
  92. struct vmw_ctx_bindinfo_tex texture_units[SVGA3D_NUM_TEXTURE_UNITS];
  93. struct vmw_ctx_bindinfo_view ds_view;
  94. struct vmw_ctx_bindinfo_so so_targets[SVGA3D_DX_MAX_SOTARGETS];
  95. struct vmw_ctx_bindinfo_vb vertex_buffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
  96. struct vmw_ctx_bindinfo_ib index_buffer;
  97. struct vmw_dx_shader_bindings per_shader[SVGA3D_NUM_SHADERTYPE_DX10];
  98. unsigned long dirty;
  99. DECLARE_BITMAP(dirty_vb, SVGA3D_DX_MAX_VERTEXBUFFERS);
  100. u32 bind_cmd_buffer[VMW_MAX_VIEW_BINDINGS];
  101. u32 bind_cmd_count;
  102. u32 bind_first_slot;
  103. };
  104. static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind);
  105. static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
  106. bool rebind);
  107. static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, bool rebind);
  108. static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind);
  109. static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind);
  110. static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind);
  111. static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind);
  112. static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs);
  113. static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi,
  114. bool rebind);
  115. static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind);
  116. static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind);
  117. static void vmw_binding_build_asserts(void) __attribute__ ((unused));
  118. typedef int (*vmw_scrub_func)(struct vmw_ctx_bindinfo *, bool);
  119. /**
  120. * struct vmw_binding_info - Per binding type information for the binding
  121. * manager
  122. *
  123. * @size: The size of the struct binding derived from a struct vmw_ctx_bindinfo.
  124. * @offsets: array[shader_slot] of offsets to the array[slot]
  125. * of struct bindings for the binding type.
  126. * @scrub_func: Pointer to the scrub function for this binding type.
  127. *
  128. * Holds static information to help optimize the binding manager and avoid
  129. * an excessive amount of switch statements.
  130. */
  131. struct vmw_binding_info {
  132. size_t size;
  133. const size_t *offsets;
  134. vmw_scrub_func scrub_func;
  135. };
  136. /*
  137. * A number of static variables that help determine the scrub func and the
  138. * location of the struct vmw_ctx_bindinfo slots for each binding type.
  139. */
  140. static const size_t vmw_binding_shader_offsets[] = {
  141. offsetof(struct vmw_ctx_binding_state, per_shader[0].shader),
  142. offsetof(struct vmw_ctx_binding_state, per_shader[1].shader),
  143. offsetof(struct vmw_ctx_binding_state, per_shader[2].shader),
  144. };
  145. static const size_t vmw_binding_rt_offsets[] = {
  146. offsetof(struct vmw_ctx_binding_state, render_targets),
  147. };
  148. static const size_t vmw_binding_tex_offsets[] = {
  149. offsetof(struct vmw_ctx_binding_state, texture_units),
  150. };
  151. static const size_t vmw_binding_cb_offsets[] = {
  152. offsetof(struct vmw_ctx_binding_state, per_shader[0].const_buffers),
  153. offsetof(struct vmw_ctx_binding_state, per_shader[1].const_buffers),
  154. offsetof(struct vmw_ctx_binding_state, per_shader[2].const_buffers),
  155. };
  156. static const size_t vmw_binding_dx_ds_offsets[] = {
  157. offsetof(struct vmw_ctx_binding_state, ds_view),
  158. };
  159. static const size_t vmw_binding_sr_offsets[] = {
  160. offsetof(struct vmw_ctx_binding_state, per_shader[0].shader_res),
  161. offsetof(struct vmw_ctx_binding_state, per_shader[1].shader_res),
  162. offsetof(struct vmw_ctx_binding_state, per_shader[2].shader_res),
  163. };
  164. static const size_t vmw_binding_so_offsets[] = {
  165. offsetof(struct vmw_ctx_binding_state, so_targets),
  166. };
  167. static const size_t vmw_binding_vb_offsets[] = {
  168. offsetof(struct vmw_ctx_binding_state, vertex_buffers),
  169. };
  170. static const size_t vmw_binding_ib_offsets[] = {
  171. offsetof(struct vmw_ctx_binding_state, index_buffer),
  172. };
  173. static const struct vmw_binding_info vmw_binding_infos[] = {
  174. [vmw_ctx_binding_shader] = {
  175. .size = sizeof(struct vmw_ctx_bindinfo_shader),
  176. .offsets = vmw_binding_shader_offsets,
  177. .scrub_func = vmw_binding_scrub_shader},
  178. [vmw_ctx_binding_rt] = {
  179. .size = sizeof(struct vmw_ctx_bindinfo_view),
  180. .offsets = vmw_binding_rt_offsets,
  181. .scrub_func = vmw_binding_scrub_render_target},
  182. [vmw_ctx_binding_tex] = {
  183. .size = sizeof(struct vmw_ctx_bindinfo_tex),
  184. .offsets = vmw_binding_tex_offsets,
  185. .scrub_func = vmw_binding_scrub_texture},
  186. [vmw_ctx_binding_cb] = {
  187. .size = sizeof(struct vmw_ctx_bindinfo_cb),
  188. .offsets = vmw_binding_cb_offsets,
  189. .scrub_func = vmw_binding_scrub_cb},
  190. [vmw_ctx_binding_dx_shader] = {
  191. .size = sizeof(struct vmw_ctx_bindinfo_shader),
  192. .offsets = vmw_binding_shader_offsets,
  193. .scrub_func = vmw_binding_scrub_dx_shader},
  194. [vmw_ctx_binding_dx_rt] = {
  195. .size = sizeof(struct vmw_ctx_bindinfo_view),
  196. .offsets = vmw_binding_rt_offsets,
  197. .scrub_func = vmw_binding_scrub_dx_rt},
  198. [vmw_ctx_binding_sr] = {
  199. .size = sizeof(struct vmw_ctx_bindinfo_view),
  200. .offsets = vmw_binding_sr_offsets,
  201. .scrub_func = vmw_binding_scrub_sr},
  202. [vmw_ctx_binding_ds] = {
  203. .size = sizeof(struct vmw_ctx_bindinfo_view),
  204. .offsets = vmw_binding_dx_ds_offsets,
  205. .scrub_func = vmw_binding_scrub_dx_rt},
  206. [vmw_ctx_binding_so] = {
  207. .size = sizeof(struct vmw_ctx_bindinfo_so),
  208. .offsets = vmw_binding_so_offsets,
  209. .scrub_func = vmw_binding_scrub_so},
  210. [vmw_ctx_binding_vb] = {
  211. .size = sizeof(struct vmw_ctx_bindinfo_vb),
  212. .offsets = vmw_binding_vb_offsets,
  213. .scrub_func = vmw_binding_scrub_vb},
  214. [vmw_ctx_binding_ib] = {
  215. .size = sizeof(struct vmw_ctx_bindinfo_ib),
  216. .offsets = vmw_binding_ib_offsets,
  217. .scrub_func = vmw_binding_scrub_ib},
  218. };
  219. /**
  220. * vmw_cbs_context - Return a pointer to the context resource of a
  221. * context binding state tracker.
  222. *
  223. * @cbs: The context binding state tracker.
  224. *
  225. * Provided there are any active bindings, this function will return an
  226. * unreferenced pointer to the context resource that owns the context
  227. * binding state tracker. If there are no active bindings, this function
  228. * will return NULL. Note that the caller must somehow ensure that a reference
  229. * is held on the context resource prior to calling this function.
  230. */
  231. static const struct vmw_resource *
  232. vmw_cbs_context(const struct vmw_ctx_binding_state *cbs)
  233. {
  234. if (list_empty(&cbs->list))
  235. return NULL;
  236. return list_first_entry(&cbs->list, struct vmw_ctx_bindinfo,
  237. ctx_list)->ctx;
  238. }
  239. /**
  240. * vmw_binding_loc - determine the struct vmw_ctx_bindinfo slot location.
  241. *
  242. * @cbs: Pointer to a struct vmw_ctx_binding state which holds the slot.
  243. * @bt: The binding type.
  244. * @shader_slot: The shader slot of the binding. If none, then set to 0.
  245. * @slot: The slot of the binding.
  246. */
  247. static struct vmw_ctx_bindinfo *
  248. vmw_binding_loc(struct vmw_ctx_binding_state *cbs,
  249. enum vmw_ctx_binding_type bt, u32 shader_slot, u32 slot)
  250. {
  251. const struct vmw_binding_info *b = &vmw_binding_infos[bt];
  252. size_t offset = b->offsets[shader_slot] + b->size*slot;
  253. return (struct vmw_ctx_bindinfo *)((u8 *) cbs + offset);
  254. }
  255. /**
  256. * vmw_binding_drop: Stop tracking a context binding
  257. *
  258. * @bi: Pointer to binding tracker storage.
  259. *
  260. * Stops tracking a context binding, and re-initializes its storage.
  261. * Typically used when the context binding is replaced with a binding to
  262. * another (or the same, for that matter) resource.
  263. */
  264. static void vmw_binding_drop(struct vmw_ctx_bindinfo *bi)
  265. {
  266. list_del(&bi->ctx_list);
  267. if (!list_empty(&bi->res_list))
  268. list_del(&bi->res_list);
  269. bi->ctx = NULL;
  270. }
  271. /**
  272. * vmw_binding_add: Start tracking a context binding
  273. *
  274. * @cbs: Pointer to the context binding state tracker.
  275. * @bi: Information about the binding to track.
  276. *
  277. * Starts tracking the binding in the context binding
  278. * state structure @cbs.
  279. */
  280. void vmw_binding_add(struct vmw_ctx_binding_state *cbs,
  281. const struct vmw_ctx_bindinfo *bi,
  282. u32 shader_slot, u32 slot)
  283. {
  284. struct vmw_ctx_bindinfo *loc =
  285. vmw_binding_loc(cbs, bi->bt, shader_slot, slot);
  286. const struct vmw_binding_info *b = &vmw_binding_infos[bi->bt];
  287. if (loc->ctx != NULL)
  288. vmw_binding_drop(loc);
  289. memcpy(loc, bi, b->size);
  290. loc->scrubbed = false;
  291. list_add(&loc->ctx_list, &cbs->list);
  292. INIT_LIST_HEAD(&loc->res_list);
  293. }
  294. /**
  295. * vmw_binding_transfer: Transfer a context binding tracking entry.
  296. *
  297. * @cbs: Pointer to the persistent context binding state tracker.
  298. * @bi: Information about the binding to track.
  299. *
  300. */
  301. static void vmw_binding_transfer(struct vmw_ctx_binding_state *cbs,
  302. const struct vmw_ctx_binding_state *from,
  303. const struct vmw_ctx_bindinfo *bi)
  304. {
  305. size_t offset = (unsigned long)bi - (unsigned long)from;
  306. struct vmw_ctx_bindinfo *loc = (struct vmw_ctx_bindinfo *)
  307. ((unsigned long) cbs + offset);
  308. if (loc->ctx != NULL) {
  309. WARN_ON(bi->scrubbed);
  310. vmw_binding_drop(loc);
  311. }
  312. if (bi->res != NULL) {
  313. memcpy(loc, bi, vmw_binding_infos[bi->bt].size);
  314. list_add_tail(&loc->ctx_list, &cbs->list);
  315. list_add_tail(&loc->res_list, &loc->res->binding_head);
  316. }
  317. }
  318. /**
  319. * vmw_binding_state_kill - Kill all bindings associated with a
  320. * struct vmw_ctx_binding state structure, and re-initialize the structure.
  321. *
  322. * @cbs: Pointer to the context binding state tracker.
  323. *
  324. * Emits commands to scrub all bindings associated with the
  325. * context binding state tracker. Then re-initializes the whole structure.
  326. */
  327. void vmw_binding_state_kill(struct vmw_ctx_binding_state *cbs)
  328. {
  329. struct vmw_ctx_bindinfo *entry, *next;
  330. vmw_binding_state_scrub(cbs);
  331. list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
  332. vmw_binding_drop(entry);
  333. }
  334. /**
  335. * vmw_binding_state_scrub - Scrub all bindings associated with a
  336. * struct vmw_ctx_binding state structure.
  337. *
  338. * @cbs: Pointer to the context binding state tracker.
  339. *
  340. * Emits commands to scrub all bindings associated with the
  341. * context binding state tracker.
  342. */
  343. void vmw_binding_state_scrub(struct vmw_ctx_binding_state *cbs)
  344. {
  345. struct vmw_ctx_bindinfo *entry;
  346. list_for_each_entry(entry, &cbs->list, ctx_list) {
  347. if (!entry->scrubbed) {
  348. (void) vmw_binding_infos[entry->bt].scrub_func
  349. (entry, false);
  350. entry->scrubbed = true;
  351. }
  352. }
  353. (void) vmw_binding_emit_dirty(cbs);
  354. }
  355. /**
  356. * vmw_binding_res_list_kill - Kill all bindings on a
  357. * resource binding list
  358. *
  359. * @head: list head of resource binding list
  360. *
  361. * Kills all bindings associated with a specific resource. Typically
  362. * called before the resource is destroyed.
  363. */
  364. void vmw_binding_res_list_kill(struct list_head *head)
  365. {
  366. struct vmw_ctx_bindinfo *entry, *next;
  367. vmw_binding_res_list_scrub(head);
  368. list_for_each_entry_safe(entry, next, head, res_list)
  369. vmw_binding_drop(entry);
  370. }
  371. /**
  372. * vmw_binding_res_list_scrub - Scrub all bindings on a
  373. * resource binding list
  374. *
  375. * @head: list head of resource binding list
  376. *
  377. * Scrub all bindings associated with a specific resource. Typically
  378. * called before the resource is evicted.
  379. */
  380. void vmw_binding_res_list_scrub(struct list_head *head)
  381. {
  382. struct vmw_ctx_bindinfo *entry;
  383. list_for_each_entry(entry, head, res_list) {
  384. if (!entry->scrubbed) {
  385. (void) vmw_binding_infos[entry->bt].scrub_func
  386. (entry, false);
  387. entry->scrubbed = true;
  388. }
  389. }
  390. list_for_each_entry(entry, head, res_list) {
  391. struct vmw_ctx_binding_state *cbs =
  392. vmw_context_binding_state(entry->ctx);
  393. (void) vmw_binding_emit_dirty(cbs);
  394. }
  395. }
  396. /**
  397. * vmw_binding_state_commit - Commit staged binding info
  398. *
  399. * @ctx: Pointer to context to commit the staged binding info to.
  400. * @from: Staged binding info built during execbuf.
  401. * @scrubbed: Transfer only scrubbed bindings.
  402. *
  403. * Transfers binding info from a temporary structure
  404. * (typically used by execbuf) to the persistent
  405. * structure in the context. This can be done once commands have been
  406. * submitted to hardware
  407. */
  408. void vmw_binding_state_commit(struct vmw_ctx_binding_state *to,
  409. struct vmw_ctx_binding_state *from)
  410. {
  411. struct vmw_ctx_bindinfo *entry, *next;
  412. list_for_each_entry_safe(entry, next, &from->list, ctx_list) {
  413. vmw_binding_transfer(to, from, entry);
  414. vmw_binding_drop(entry);
  415. }
  416. }
  417. /**
  418. * vmw_binding_rebind_all - Rebind all scrubbed bindings of a context
  419. *
  420. * @ctx: The context resource
  421. *
  422. * Walks through the context binding list and rebinds all scrubbed
  423. * resources.
  424. */
  425. int vmw_binding_rebind_all(struct vmw_ctx_binding_state *cbs)
  426. {
  427. struct vmw_ctx_bindinfo *entry;
  428. int ret;
  429. list_for_each_entry(entry, &cbs->list, ctx_list) {
  430. if (likely(!entry->scrubbed))
  431. continue;
  432. if ((entry->res == NULL || entry->res->id ==
  433. SVGA3D_INVALID_ID))
  434. continue;
  435. ret = vmw_binding_infos[entry->bt].scrub_func(entry, true);
  436. if (unlikely(ret != 0))
  437. return ret;
  438. entry->scrubbed = false;
  439. }
  440. return vmw_binding_emit_dirty(cbs);
  441. }
  442. /**
  443. * vmw_binding_scrub_shader - scrub a shader binding from a context.
  444. *
  445. * @bi: single binding information.
  446. * @rebind: Whether to issue a bind instead of scrub command.
  447. */
  448. static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
  449. {
  450. struct vmw_ctx_bindinfo_shader *binding =
  451. container_of(bi, typeof(*binding), bi);
  452. struct vmw_private *dev_priv = bi->ctx->dev_priv;
  453. struct {
  454. SVGA3dCmdHeader header;
  455. SVGA3dCmdSetShader body;
  456. } *cmd;
  457. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  458. if (unlikely(cmd == NULL)) {
  459. DRM_ERROR("Failed reserving FIFO space for shader "
  460. "unbinding.\n");
  461. return -ENOMEM;
  462. }
  463. cmd->header.id = SVGA_3D_CMD_SET_SHADER;
  464. cmd->header.size = sizeof(cmd->body);
  465. cmd->body.cid = bi->ctx->id;
  466. cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
  467. cmd->body.shid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
  468. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  469. return 0;
  470. }
  471. /**
  472. * vmw_binding_scrub_render_target - scrub a render target binding
  473. * from a context.
  474. *
  475. * @bi: single binding information.
  476. * @rebind: Whether to issue a bind instead of scrub command.
  477. */
  478. static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
  479. bool rebind)
  480. {
  481. struct vmw_ctx_bindinfo_view *binding =
  482. container_of(bi, typeof(*binding), bi);
  483. struct vmw_private *dev_priv = bi->ctx->dev_priv;
  484. struct {
  485. SVGA3dCmdHeader header;
  486. SVGA3dCmdSetRenderTarget body;
  487. } *cmd;
  488. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  489. if (unlikely(cmd == NULL)) {
  490. DRM_ERROR("Failed reserving FIFO space for render target "
  491. "unbinding.\n");
  492. return -ENOMEM;
  493. }
  494. cmd->header.id = SVGA_3D_CMD_SETRENDERTARGET;
  495. cmd->header.size = sizeof(cmd->body);
  496. cmd->body.cid = bi->ctx->id;
  497. cmd->body.type = binding->slot;
  498. cmd->body.target.sid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
  499. cmd->body.target.face = 0;
  500. cmd->body.target.mipmap = 0;
  501. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  502. return 0;
  503. }
  504. /**
  505. * vmw_binding_scrub_texture - scrub a texture binding from a context.
  506. *
  507. * @bi: single binding information.
  508. * @rebind: Whether to issue a bind instead of scrub command.
  509. *
  510. * TODO: Possibly complement this function with a function that takes
  511. * a list of texture bindings and combines them to a single command.
  512. */
  513. static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi,
  514. bool rebind)
  515. {
  516. struct vmw_ctx_bindinfo_tex *binding =
  517. container_of(bi, typeof(*binding), bi);
  518. struct vmw_private *dev_priv = bi->ctx->dev_priv;
  519. struct {
  520. SVGA3dCmdHeader header;
  521. struct {
  522. SVGA3dCmdSetTextureState c;
  523. SVGA3dTextureState s1;
  524. } body;
  525. } *cmd;
  526. cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
  527. if (unlikely(cmd == NULL)) {
  528. DRM_ERROR("Failed reserving FIFO space for texture "
  529. "unbinding.\n");
  530. return -ENOMEM;
  531. }
  532. cmd->header.id = SVGA_3D_CMD_SETTEXTURESTATE;
  533. cmd->header.size = sizeof(cmd->body);
  534. cmd->body.c.cid = bi->ctx->id;
  535. cmd->body.s1.stage = binding->texture_stage;
  536. cmd->body.s1.name = SVGA3D_TS_BIND_TEXTURE;
  537. cmd->body.s1.value = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
  538. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  539. return 0;
  540. }
  541. /**
  542. * vmw_binding_scrub_dx_shader - scrub a dx shader binding from a context.
  543. *
  544. * @bi: single binding information.
  545. * @rebind: Whether to issue a bind instead of scrub command.
  546. */
  547. static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
  548. {
  549. struct vmw_ctx_bindinfo_shader *binding =
  550. container_of(bi, typeof(*binding), bi);
  551. struct vmw_private *dev_priv = bi->ctx->dev_priv;
  552. struct {
  553. SVGA3dCmdHeader header;
  554. SVGA3dCmdDXSetShader body;
  555. } *cmd;
  556. cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd), bi->ctx->id);
  557. if (unlikely(cmd == NULL)) {
  558. DRM_ERROR("Failed reserving FIFO space for DX shader "
  559. "unbinding.\n");
  560. return -ENOMEM;
  561. }
  562. cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER;
  563. cmd->header.size = sizeof(cmd->body);
  564. cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
  565. cmd->body.shaderId = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
  566. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  567. return 0;
  568. }
  569. /**
  570. * vmw_binding_scrub_cb - scrub a constant buffer binding from a context.
  571. *
  572. * @bi: single binding information.
  573. * @rebind: Whether to issue a bind instead of scrub command.
  574. */
  575. static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind)
  576. {
  577. struct vmw_ctx_bindinfo_cb *binding =
  578. container_of(bi, typeof(*binding), bi);
  579. struct vmw_private *dev_priv = bi->ctx->dev_priv;
  580. struct {
  581. SVGA3dCmdHeader header;
  582. SVGA3dCmdDXSetSingleConstantBuffer body;
  583. } *cmd;
  584. cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd), bi->ctx->id);
  585. if (unlikely(cmd == NULL)) {
  586. DRM_ERROR("Failed reserving FIFO space for DX shader "
  587. "unbinding.\n");
  588. return -ENOMEM;
  589. }
  590. cmd->header.id = SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER;
  591. cmd->header.size = sizeof(cmd->body);
  592. cmd->body.slot = binding->slot;
  593. cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
  594. if (rebind) {
  595. cmd->body.offsetInBytes = binding->offset;
  596. cmd->body.sizeInBytes = binding->size;
  597. cmd->body.sid = bi->res->id;
  598. } else {
  599. cmd->body.offsetInBytes = 0;
  600. cmd->body.sizeInBytes = 0;
  601. cmd->body.sid = SVGA3D_INVALID_ID;
  602. }
  603. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  604. return 0;
  605. }
  606. /**
  607. * vmw_collect_view_ids - Build view id data for a view binding command
  608. * without checking which bindings actually need to be emitted
  609. *
  610. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  611. * @bi: Pointer to where the binding info array is stored in @cbs
  612. * @max_num: Maximum number of entries in the @bi array.
  613. *
  614. * Scans the @bi array for bindings and builds a buffer of view id data.
  615. * Stops at the first non-existing binding in the @bi array.
  616. * On output, @cbs->bind_cmd_count contains the number of bindings to be
  617. * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
  618. * contains the command data.
  619. */
  620. static void vmw_collect_view_ids(struct vmw_ctx_binding_state *cbs,
  621. const struct vmw_ctx_bindinfo *bi,
  622. u32 max_num)
  623. {
  624. const struct vmw_ctx_bindinfo_view *biv =
  625. container_of(bi, struct vmw_ctx_bindinfo_view, bi);
  626. unsigned long i;
  627. cbs->bind_cmd_count = 0;
  628. cbs->bind_first_slot = 0;
  629. for (i = 0; i < max_num; ++i, ++biv) {
  630. if (!biv->bi.ctx)
  631. break;
  632. cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
  633. ((biv->bi.scrubbed) ?
  634. SVGA3D_INVALID_ID : biv->bi.res->id);
  635. }
  636. }
  637. /**
  638. * vmw_collect_dirty_view_ids - Build view id data for a view binding command
  639. *
  640. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  641. * @bi: Pointer to where the binding info array is stored in @cbs
  642. * @dirty: Bitmap indicating which bindings need to be emitted.
  643. * @max_num: Maximum number of entries in the @bi array.
  644. *
  645. * Scans the @bi array for bindings that need to be emitted and
  646. * builds a buffer of view id data.
  647. * On output, @cbs->bind_cmd_count contains the number of bindings to be
  648. * emitted, @cbs->bind_first_slot indicates the index of the first emitted
  649. * binding, and @cbs->bind_cmd_buffer contains the command data.
  650. */
  651. static void vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state *cbs,
  652. const struct vmw_ctx_bindinfo *bi,
  653. unsigned long *dirty,
  654. u32 max_num)
  655. {
  656. const struct vmw_ctx_bindinfo_view *biv =
  657. container_of(bi, struct vmw_ctx_bindinfo_view, bi);
  658. unsigned long i, next_bit;
  659. cbs->bind_cmd_count = 0;
  660. i = find_first_bit(dirty, max_num);
  661. next_bit = i;
  662. cbs->bind_first_slot = i;
  663. biv += i;
  664. for (; i < max_num; ++i, ++biv) {
  665. cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
  666. ((!biv->bi.ctx || biv->bi.scrubbed) ?
  667. SVGA3D_INVALID_ID : biv->bi.res->id);
  668. if (next_bit == i) {
  669. next_bit = find_next_bit(dirty, max_num, i + 1);
  670. if (next_bit >= max_num)
  671. break;
  672. }
  673. }
  674. }
  675. /**
  676. * vmw_binding_emit_set_sr - Issue delayed DX shader resource binding commands
  677. *
  678. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  679. */
  680. static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs,
  681. int shader_slot)
  682. {
  683. const struct vmw_ctx_bindinfo *loc =
  684. &cbs->per_shader[shader_slot].shader_res[0].bi;
  685. struct {
  686. SVGA3dCmdHeader header;
  687. SVGA3dCmdDXSetShaderResources body;
  688. } *cmd;
  689. size_t cmd_size, view_id_size;
  690. const struct vmw_resource *ctx = vmw_cbs_context(cbs);
  691. vmw_collect_dirty_view_ids(cbs, loc,
  692. cbs->per_shader[shader_slot].dirty_sr,
  693. SVGA3D_DX_MAX_SRVIEWS);
  694. if (cbs->bind_cmd_count == 0)
  695. return 0;
  696. view_id_size = cbs->bind_cmd_count*sizeof(uint32);
  697. cmd_size = sizeof(*cmd) + view_id_size;
  698. cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
  699. if (unlikely(cmd == NULL)) {
  700. DRM_ERROR("Failed reserving FIFO space for DX shader"
  701. " resource binding.\n");
  702. return -ENOMEM;
  703. }
  704. cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER_RESOURCES;
  705. cmd->header.size = sizeof(cmd->body) + view_id_size;
  706. cmd->body.type = shader_slot + SVGA3D_SHADERTYPE_MIN;
  707. cmd->body.startView = cbs->bind_first_slot;
  708. memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
  709. vmw_fifo_commit(ctx->dev_priv, cmd_size);
  710. bitmap_clear(cbs->per_shader[shader_slot].dirty_sr,
  711. cbs->bind_first_slot, cbs->bind_cmd_count);
  712. return 0;
  713. }
  714. /**
  715. * vmw_binding_emit_set_rt - Issue delayed DX rendertarget binding commands
  716. *
  717. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  718. */
  719. static int vmw_emit_set_rt(struct vmw_ctx_binding_state *cbs)
  720. {
  721. const struct vmw_ctx_bindinfo *loc = &cbs->render_targets[0].bi;
  722. struct {
  723. SVGA3dCmdHeader header;
  724. SVGA3dCmdDXSetRenderTargets body;
  725. } *cmd;
  726. size_t cmd_size, view_id_size;
  727. const struct vmw_resource *ctx = vmw_cbs_context(cbs);
  728. vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS);
  729. view_id_size = cbs->bind_cmd_count*sizeof(uint32);
  730. cmd_size = sizeof(*cmd) + view_id_size;
  731. cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
  732. if (unlikely(cmd == NULL)) {
  733. DRM_ERROR("Failed reserving FIFO space for DX render-target"
  734. " binding.\n");
  735. return -ENOMEM;
  736. }
  737. cmd->header.id = SVGA_3D_CMD_DX_SET_RENDERTARGETS;
  738. cmd->header.size = sizeof(cmd->body) + view_id_size;
  739. if (cbs->ds_view.bi.ctx && !cbs->ds_view.bi.scrubbed)
  740. cmd->body.depthStencilViewId = cbs->ds_view.bi.res->id;
  741. else
  742. cmd->body.depthStencilViewId = SVGA3D_INVALID_ID;
  743. memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
  744. vmw_fifo_commit(ctx->dev_priv, cmd_size);
  745. return 0;
  746. }
  747. /**
  748. * vmw_collect_so_targets - Build SVGA3dSoTarget data for a binding command
  749. * without checking which bindings actually need to be emitted
  750. *
  751. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  752. * @bi: Pointer to where the binding info array is stored in @cbs
  753. * @max_num: Maximum number of entries in the @bi array.
  754. *
  755. * Scans the @bi array for bindings and builds a buffer of SVGA3dSoTarget data.
  756. * Stops at the first non-existing binding in the @bi array.
  757. * On output, @cbs->bind_cmd_count contains the number of bindings to be
  758. * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
  759. * contains the command data.
  760. */
  761. static void vmw_collect_so_targets(struct vmw_ctx_binding_state *cbs,
  762. const struct vmw_ctx_bindinfo *bi,
  763. u32 max_num)
  764. {
  765. const struct vmw_ctx_bindinfo_so *biso =
  766. container_of(bi, struct vmw_ctx_bindinfo_so, bi);
  767. unsigned long i;
  768. SVGA3dSoTarget *so_buffer = (SVGA3dSoTarget *) cbs->bind_cmd_buffer;
  769. cbs->bind_cmd_count = 0;
  770. cbs->bind_first_slot = 0;
  771. for (i = 0; i < max_num; ++i, ++biso, ++so_buffer,
  772. ++cbs->bind_cmd_count) {
  773. if (!biso->bi.ctx)
  774. break;
  775. if (!biso->bi.scrubbed) {
  776. so_buffer->sid = biso->bi.res->id;
  777. so_buffer->offset = biso->offset;
  778. so_buffer->sizeInBytes = biso->size;
  779. } else {
  780. so_buffer->sid = SVGA3D_INVALID_ID;
  781. so_buffer->offset = 0;
  782. so_buffer->sizeInBytes = 0;
  783. }
  784. }
  785. }
  786. /**
  787. * vmw_binding_emit_set_so - Issue delayed streamout binding commands
  788. *
  789. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  790. */
  791. static int vmw_emit_set_so(struct vmw_ctx_binding_state *cbs)
  792. {
  793. const struct vmw_ctx_bindinfo *loc = &cbs->so_targets[0].bi;
  794. struct {
  795. SVGA3dCmdHeader header;
  796. SVGA3dCmdDXSetSOTargets body;
  797. } *cmd;
  798. size_t cmd_size, so_target_size;
  799. const struct vmw_resource *ctx = vmw_cbs_context(cbs);
  800. vmw_collect_so_targets(cbs, loc, SVGA3D_DX_MAX_SOTARGETS);
  801. if (cbs->bind_cmd_count == 0)
  802. return 0;
  803. so_target_size = cbs->bind_cmd_count*sizeof(SVGA3dSoTarget);
  804. cmd_size = sizeof(*cmd) + so_target_size;
  805. cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
  806. if (unlikely(cmd == NULL)) {
  807. DRM_ERROR("Failed reserving FIFO space for DX SO target"
  808. " binding.\n");
  809. return -ENOMEM;
  810. }
  811. cmd->header.id = SVGA_3D_CMD_DX_SET_SOTARGETS;
  812. cmd->header.size = sizeof(cmd->body) + so_target_size;
  813. memcpy(&cmd[1], cbs->bind_cmd_buffer, so_target_size);
  814. vmw_fifo_commit(ctx->dev_priv, cmd_size);
  815. return 0;
  816. }
  817. /**
  818. * vmw_binding_emit_dirty_ps - Issue delayed per shader binding commands
  819. *
  820. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  821. *
  822. */
  823. static int vmw_binding_emit_dirty_ps(struct vmw_ctx_binding_state *cbs)
  824. {
  825. struct vmw_dx_shader_bindings *sb = &cbs->per_shader[0];
  826. u32 i;
  827. int ret;
  828. for (i = 0; i < SVGA3D_NUM_SHADERTYPE_DX10; ++i, ++sb) {
  829. if (!test_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty))
  830. continue;
  831. ret = vmw_emit_set_sr(cbs, i);
  832. if (ret)
  833. break;
  834. __clear_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty);
  835. }
  836. return 0;
  837. }
  838. /**
  839. * vmw_collect_dirty_vbs - Build SVGA3dVertexBuffer data for a
  840. * SVGA3dCmdDXSetVertexBuffers command
  841. *
  842. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  843. * @bi: Pointer to where the binding info array is stored in @cbs
  844. * @dirty: Bitmap indicating which bindings need to be emitted.
  845. * @max_num: Maximum number of entries in the @bi array.
  846. *
  847. * Scans the @bi array for bindings that need to be emitted and
  848. * builds a buffer of SVGA3dVertexBuffer data.
  849. * On output, @cbs->bind_cmd_count contains the number of bindings to be
  850. * emitted, @cbs->bind_first_slot indicates the index of the first emitted
  851. * binding, and @cbs->bind_cmd_buffer contains the command data.
  852. */
  853. static void vmw_collect_dirty_vbs(struct vmw_ctx_binding_state *cbs,
  854. const struct vmw_ctx_bindinfo *bi,
  855. unsigned long *dirty,
  856. u32 max_num)
  857. {
  858. const struct vmw_ctx_bindinfo_vb *biv =
  859. container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
  860. unsigned long i, next_bit;
  861. SVGA3dVertexBuffer *vbs = (SVGA3dVertexBuffer *) &cbs->bind_cmd_buffer;
  862. cbs->bind_cmd_count = 0;
  863. i = find_first_bit(dirty, max_num);
  864. next_bit = i;
  865. cbs->bind_first_slot = i;
  866. biv += i;
  867. for (; i < max_num; ++i, ++biv, ++vbs) {
  868. if (!biv->bi.ctx || biv->bi.scrubbed) {
  869. vbs->sid = SVGA3D_INVALID_ID;
  870. vbs->stride = 0;
  871. vbs->offset = 0;
  872. } else {
  873. vbs->sid = biv->bi.res->id;
  874. vbs->stride = biv->stride;
  875. vbs->offset = biv->offset;
  876. }
  877. cbs->bind_cmd_count++;
  878. if (next_bit == i) {
  879. next_bit = find_next_bit(dirty, max_num, i + 1);
  880. if (next_bit >= max_num)
  881. break;
  882. }
  883. }
  884. }
  885. /**
  886. * vmw_binding_emit_set_vb - Issue delayed vertex buffer binding commands
  887. *
  888. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  889. *
  890. */
  891. static int vmw_emit_set_vb(struct vmw_ctx_binding_state *cbs)
  892. {
  893. const struct vmw_ctx_bindinfo *loc =
  894. &cbs->vertex_buffers[0].bi;
  895. struct {
  896. SVGA3dCmdHeader header;
  897. SVGA3dCmdDXSetVertexBuffers body;
  898. } *cmd;
  899. size_t cmd_size, set_vb_size;
  900. const struct vmw_resource *ctx = vmw_cbs_context(cbs);
  901. vmw_collect_dirty_vbs(cbs, loc, cbs->dirty_vb,
  902. SVGA3D_DX_MAX_VERTEXBUFFERS);
  903. if (cbs->bind_cmd_count == 0)
  904. return 0;
  905. set_vb_size = cbs->bind_cmd_count*sizeof(SVGA3dVertexBuffer);
  906. cmd_size = sizeof(*cmd) + set_vb_size;
  907. cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
  908. if (unlikely(cmd == NULL)) {
  909. DRM_ERROR("Failed reserving FIFO space for DX vertex buffer"
  910. " binding.\n");
  911. return -ENOMEM;
  912. }
  913. cmd->header.id = SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS;
  914. cmd->header.size = sizeof(cmd->body) + set_vb_size;
  915. cmd->body.startBuffer = cbs->bind_first_slot;
  916. memcpy(&cmd[1], cbs->bind_cmd_buffer, set_vb_size);
  917. vmw_fifo_commit(ctx->dev_priv, cmd_size);
  918. bitmap_clear(cbs->dirty_vb,
  919. cbs->bind_first_slot, cbs->bind_cmd_count);
  920. return 0;
  921. }
  922. /**
  923. * vmw_binding_emit_dirty - Issue delayed binding commands
  924. *
  925. * @cbs: Pointer to the context's struct vmw_ctx_binding_state
  926. *
  927. * This function issues the delayed binding commands that arise from
  928. * previous scrub / unscrub calls. These binding commands are typically
  929. * commands that batch a number of bindings and therefore it makes sense
  930. * to delay them.
  931. */
  932. static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs)
  933. {
  934. int ret = 0;
  935. unsigned long hit = 0;
  936. while ((hit = find_next_bit(&cbs->dirty, VMW_BINDING_NUM_BITS, hit))
  937. < VMW_BINDING_NUM_BITS) {
  938. switch (hit) {
  939. case VMW_BINDING_RT_BIT:
  940. ret = vmw_emit_set_rt(cbs);
  941. break;
  942. case VMW_BINDING_PS_BIT:
  943. ret = vmw_binding_emit_dirty_ps(cbs);
  944. break;
  945. case VMW_BINDING_SO_BIT:
  946. ret = vmw_emit_set_so(cbs);
  947. break;
  948. case VMW_BINDING_VB_BIT:
  949. ret = vmw_emit_set_vb(cbs);
  950. break;
  951. default:
  952. BUG();
  953. }
  954. if (ret)
  955. return ret;
  956. __clear_bit(hit, &cbs->dirty);
  957. hit++;
  958. }
  959. return 0;
  960. }
  961. /**
  962. * vmw_binding_scrub_sr - Schedule a dx shaderresource binding
  963. * scrub from a context
  964. *
  965. * @bi: single binding information.
  966. * @rebind: Whether to issue a bind instead of scrub command.
  967. */
  968. static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind)
  969. {
  970. struct vmw_ctx_bindinfo_view *biv =
  971. container_of(bi, struct vmw_ctx_bindinfo_view, bi);
  972. struct vmw_ctx_binding_state *cbs =
  973. vmw_context_binding_state(bi->ctx);
  974. __set_bit(biv->slot, cbs->per_shader[biv->shader_slot].dirty_sr);
  975. __set_bit(VMW_BINDING_PS_SR_BIT,
  976. &cbs->per_shader[biv->shader_slot].dirty);
  977. __set_bit(VMW_BINDING_PS_BIT, &cbs->dirty);
  978. return 0;
  979. }
  980. /**
  981. * vmw_binding_scrub_dx_rt - Schedule a dx rendertarget binding
  982. * scrub from a context
  983. *
  984. * @bi: single binding information.
  985. * @rebind: Whether to issue a bind instead of scrub command.
  986. */
  987. static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind)
  988. {
  989. struct vmw_ctx_binding_state *cbs =
  990. vmw_context_binding_state(bi->ctx);
  991. __set_bit(VMW_BINDING_RT_BIT, &cbs->dirty);
  992. return 0;
  993. }
  994. /**
  995. * vmw_binding_scrub_so - Schedule a dx streamoutput buffer binding
  996. * scrub from a context
  997. *
  998. * @bi: single binding information.
  999. * @rebind: Whether to issue a bind instead of scrub command.
  1000. */
  1001. static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind)
  1002. {
  1003. struct vmw_ctx_binding_state *cbs =
  1004. vmw_context_binding_state(bi->ctx);
  1005. __set_bit(VMW_BINDING_SO_BIT, &cbs->dirty);
  1006. return 0;
  1007. }
  1008. /**
  1009. * vmw_binding_scrub_vb - Schedule a dx vertex buffer binding
  1010. * scrub from a context
  1011. *
  1012. * @bi: single binding information.
  1013. * @rebind: Whether to issue a bind instead of scrub command.
  1014. */
  1015. static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind)
  1016. {
  1017. struct vmw_ctx_bindinfo_vb *bivb =
  1018. container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
  1019. struct vmw_ctx_binding_state *cbs =
  1020. vmw_context_binding_state(bi->ctx);
  1021. __set_bit(bivb->slot, cbs->dirty_vb);
  1022. __set_bit(VMW_BINDING_VB_BIT, &cbs->dirty);
  1023. return 0;
  1024. }
  1025. /**
  1026. * vmw_binding_scrub_ib - scrub a dx index buffer binding from a context
  1027. *
  1028. * @bi: single binding information.
  1029. * @rebind: Whether to issue a bind instead of scrub command.
  1030. */
  1031. static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind)
  1032. {
  1033. struct vmw_ctx_bindinfo_ib *binding =
  1034. container_of(bi, typeof(*binding), bi);
  1035. struct vmw_private *dev_priv = bi->ctx->dev_priv;
  1036. struct {
  1037. SVGA3dCmdHeader header;
  1038. SVGA3dCmdDXSetIndexBuffer body;
  1039. } *cmd;
  1040. cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd), bi->ctx->id);
  1041. if (unlikely(cmd == NULL)) {
  1042. DRM_ERROR("Failed reserving FIFO space for DX index buffer "
  1043. "binding.\n");
  1044. return -ENOMEM;
  1045. }
  1046. cmd->header.id = SVGA_3D_CMD_DX_SET_INDEX_BUFFER;
  1047. cmd->header.size = sizeof(cmd->body);
  1048. if (rebind) {
  1049. cmd->body.sid = bi->res->id;
  1050. cmd->body.format = binding->format;
  1051. cmd->body.offset = binding->offset;
  1052. } else {
  1053. cmd->body.sid = SVGA3D_INVALID_ID;
  1054. cmd->body.format = 0;
  1055. cmd->body.offset = 0;
  1056. }
  1057. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  1058. return 0;
  1059. }
  1060. /**
  1061. * vmw_binding_state_alloc - Allocate a struct vmw_ctx_binding_state with
  1062. * memory accounting.
  1063. *
  1064. * @dev_priv: Pointer to a device private structure.
  1065. *
  1066. * Returns a pointer to a newly allocated struct or an error pointer on error.
  1067. */
  1068. struct vmw_ctx_binding_state *
  1069. vmw_binding_state_alloc(struct vmw_private *dev_priv)
  1070. {
  1071. struct vmw_ctx_binding_state *cbs;
  1072. int ret;
  1073. ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), sizeof(*cbs),
  1074. false, false);
  1075. if (ret)
  1076. return ERR_PTR(ret);
  1077. cbs = vzalloc(sizeof(*cbs));
  1078. if (!cbs) {
  1079. ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
  1080. return ERR_PTR(-ENOMEM);
  1081. }
  1082. cbs->dev_priv = dev_priv;
  1083. INIT_LIST_HEAD(&cbs->list);
  1084. return cbs;
  1085. }
  1086. /**
  1087. * vmw_binding_state_free - Free a struct vmw_ctx_binding_state and its
  1088. * memory accounting info.
  1089. *
  1090. * @cbs: Pointer to the struct vmw_ctx_binding_state to be freed.
  1091. */
  1092. void vmw_binding_state_free(struct vmw_ctx_binding_state *cbs)
  1093. {
  1094. struct vmw_private *dev_priv = cbs->dev_priv;
  1095. vfree(cbs);
  1096. ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
  1097. }
  1098. /**
  1099. * vmw_binding_state_list - Get the binding list of a
  1100. * struct vmw_ctx_binding_state
  1101. *
  1102. * @cbs: Pointer to the struct vmw_ctx_binding_state
  1103. *
  1104. * Returns the binding list which can be used to traverse through the bindings
  1105. * and access the resource information of all bindings.
  1106. */
  1107. struct list_head *vmw_binding_state_list(struct vmw_ctx_binding_state *cbs)
  1108. {
  1109. return &cbs->list;
  1110. }
  1111. /**
  1112. * vmwgfx_binding_state_reset - clear a struct vmw_ctx_binding_state
  1113. *
  1114. * @cbs: Pointer to the struct vmw_ctx_binding_state to be cleared
  1115. *
  1116. * Drops all bindings registered in @cbs. No device binding actions are
  1117. * performed.
  1118. */
  1119. void vmw_binding_state_reset(struct vmw_ctx_binding_state *cbs)
  1120. {
  1121. struct vmw_ctx_bindinfo *entry, *next;
  1122. list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
  1123. vmw_binding_drop(entry);
  1124. }
  1125. /*
  1126. * This function is unused at run-time, and only used to hold various build
  1127. * asserts important for code optimization assumptions.
  1128. */
  1129. static void vmw_binding_build_asserts(void)
  1130. {
  1131. BUILD_BUG_ON(SVGA3D_NUM_SHADERTYPE_DX10 != 3);
  1132. BUILD_BUG_ON(SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS > SVGA3D_RT_MAX);
  1133. BUILD_BUG_ON(sizeof(uint32) != sizeof(u32));
  1134. /*
  1135. * struct vmw_ctx_binding_state::bind_cmd_buffer is used for various
  1136. * view id arrays.
  1137. */
  1138. BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_RT_MAX);
  1139. BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_SRVIEWS);
  1140. BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_CONSTBUFFERS);
  1141. /*
  1142. * struct vmw_ctx_binding_state::bind_cmd_buffer is used for
  1143. * u32 view ids, SVGA3dSoTargets and SVGA3dVertexBuffers
  1144. */
  1145. BUILD_BUG_ON(SVGA3D_DX_MAX_SOTARGETS*sizeof(SVGA3dSoTarget) >
  1146. VMW_MAX_VIEW_BINDINGS*sizeof(u32));
  1147. BUILD_BUG_ON(SVGA3D_DX_MAX_VERTEXBUFFERS*sizeof(SVGA3dVertexBuffer) >
  1148. VMW_MAX_VIEW_BINDINGS*sizeof(u32));
  1149. }