mtk_drm_mmp.c 14 KB

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  1. /*
  2. * Copyright (C) 2015 MediaTek Inc.
  3. *
  4. * This program is free software: you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <drm/drm_crtc.h>
  14. #include "mtk_drm_mmp.h"
  15. #include "mtk_drm_crtc.h"
  16. #include "mtk_drm_fb.h"
  17. #include "mtk_log.h"
  18. #define DISP_REG_OVL_L0_PITCH (0x044UL)
  19. #define L_PITCH_FLD_SRC_PITCH REG_FLD_MSB_LSB(15, 0)
  20. static struct DRM_MMP_Events g_DRM_MMP_Events;
  21. static struct CRTC_MMP_Events g_CRTC_MMP_Events[MMP_CRTC_NUM];
  22. /* need to update if add new mmp_event in DRM_MMP_Events */
  23. void init_drm_mmp_event(void)
  24. {
  25. int i;
  26. if (g_DRM_MMP_Events.drm)
  27. return;
  28. g_DRM_MMP_Events.drm = mmprofile_register_event(MMP_ROOT_EVENT, "DRM");
  29. /* init DRM mmp events */
  30. g_DRM_MMP_Events.IRQ =
  31. mmprofile_register_event(g_DRM_MMP_Events.drm, "IRQ");
  32. g_DRM_MMP_Events.ovl =
  33. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "OVL");
  34. g_DRM_MMP_Events.ovl0 =
  35. mmprofile_register_event(g_DRM_MMP_Events.ovl, "OVL0");
  36. g_DRM_MMP_Events.ovl1 =
  37. mmprofile_register_event(g_DRM_MMP_Events.ovl, "OVL1");
  38. g_DRM_MMP_Events.ovl0_2l =
  39. mmprofile_register_event(g_DRM_MMP_Events.ovl, "OVL0_2L");
  40. g_DRM_MMP_Events.ovl1_2l =
  41. mmprofile_register_event(g_DRM_MMP_Events.ovl, "OVL1_2L");
  42. g_DRM_MMP_Events.ovl2_2l =
  43. mmprofile_register_event(g_DRM_MMP_Events.ovl, "OVL2_2L");
  44. g_DRM_MMP_Events.ovl3_2l =
  45. mmprofile_register_event(g_DRM_MMP_Events.ovl, "OVL3_2L");
  46. g_DRM_MMP_Events.rdma =
  47. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "RDMA");
  48. g_DRM_MMP_Events.rdma0 =
  49. mmprofile_register_event(g_DRM_MMP_Events.rdma, "RDMA0");
  50. g_DRM_MMP_Events.rdma1 =
  51. mmprofile_register_event(g_DRM_MMP_Events.rdma, "RDMA1");
  52. g_DRM_MMP_Events.rdma4 =
  53. mmprofile_register_event(g_DRM_MMP_Events.rdma, "RDMA4");
  54. g_DRM_MMP_Events.rdma5 =
  55. mmprofile_register_event(g_DRM_MMP_Events.rdma, "RDMA5");
  56. g_DRM_MMP_Events.wdma =
  57. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "WDMA");
  58. g_DRM_MMP_Events.wdma0 =
  59. mmprofile_register_event(g_DRM_MMP_Events.wdma, "WDMA0");
  60. g_DRM_MMP_Events.dsi =
  61. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "DSI");
  62. g_DRM_MMP_Events.dsi0 =
  63. mmprofile_register_event(g_DRM_MMP_Events.dsi, "DSI0");
  64. g_DRM_MMP_Events.dsi1 =
  65. mmprofile_register_event(g_DRM_MMP_Events.dsi, "DSI1");
  66. g_DRM_MMP_Events.pmqos =
  67. mmprofile_register_event(g_DRM_MMP_Events.drm, "PMQOS");
  68. g_DRM_MMP_Events.hrt_bw =
  69. mmprofile_register_event(g_DRM_MMP_Events.drm, "HRT_BW");
  70. g_DRM_MMP_Events.mutex_lock =
  71. mmprofile_register_event(g_DRM_MMP_Events.drm, "LOCK");
  72. g_DRM_MMP_Events.layering =
  73. mmprofile_register_event(g_DRM_MMP_Events.drm, "HRT");
  74. g_DRM_MMP_Events.dma_alloc =
  75. mmprofile_register_event(g_DRM_MMP_Events.drm, "D_ALLOC");
  76. g_DRM_MMP_Events.dma_free =
  77. mmprofile_register_event(g_DRM_MMP_Events.drm, "D_FREE");
  78. g_DRM_MMP_Events.dma_get =
  79. mmprofile_register_event(g_DRM_MMP_Events.drm, "D_GET");
  80. g_DRM_MMP_Events.dma_put =
  81. mmprofile_register_event(g_DRM_MMP_Events.drm, "D_PUT");
  82. g_DRM_MMP_Events.ion_import_dma =
  83. mmprofile_register_event(g_DRM_MMP_Events.drm, "I_DMA");
  84. g_DRM_MMP_Events.ion_import_fd =
  85. mmprofile_register_event(g_DRM_MMP_Events.drm, "I_FD");
  86. g_DRM_MMP_Events.ion_import_free =
  87. mmprofile_register_event(g_DRM_MMP_Events.drm, "I_FREE");
  88. g_DRM_MMP_Events.set_mode =
  89. mmprofile_register_event(g_DRM_MMP_Events.drm, "SET_MODE");
  90. g_DRM_MMP_Events.ddp =
  91. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "MUTEX");
  92. for (i = 0; i < DISP_MUTEX_DDP_COUNT; i++) {
  93. char name[32];
  94. snprintf(name, sizeof(name), "MUTEX%d", i);
  95. g_DRM_MMP_Events.mutex[i] =
  96. mmprofile_register_event(g_DRM_MMP_Events.ddp, name);
  97. }
  98. g_DRM_MMP_Events.postmask =
  99. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "POSTMASK");
  100. g_DRM_MMP_Events.postmask0 = mmprofile_register_event(
  101. g_DRM_MMP_Events.postmask, "POSTMASK0");
  102. g_DRM_MMP_Events.abnormal_irq =
  103. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "ABNORMAL_IRQ");
  104. g_DRM_MMP_Events.dp_intf0 =
  105. mmprofile_register_event(g_DRM_MMP_Events.IRQ, "dp_intf0");
  106. }
  107. /* need to update if add new mmp_event in CRTC_MMP_Events */
  108. void init_crtc_mmp_event(void)
  109. {
  110. int i = 0;
  111. int r = 0;
  112. for (i = 0; i < MMP_CRTC_NUM; i++) {
  113. char name[32];
  114. mmp_event crtc_mmp_root;
  115. /* create i th root of CRTC mmp events */
  116. r = snprintf(name, sizeof(name), "crtc%d", i);
  117. if (r < 0) {
  118. /* Handle snprintf() error */
  119. DDPPR_ERR("%s:snprintf error\n", __func__);
  120. return;
  121. }
  122. crtc_mmp_root =
  123. mmprofile_register_event(g_DRM_MMP_Events.drm, name);
  124. g_DRM_MMP_Events.crtc[i] = crtc_mmp_root;
  125. /* init CRTC mmp events */
  126. g_CRTC_MMP_Events[i].trig_loop_done = mmprofile_register_event(
  127. crtc_mmp_root, "trig_loop_done");
  128. g_CRTC_MMP_Events[i].enable =
  129. mmprofile_register_event(crtc_mmp_root, "enable");
  130. g_CRTC_MMP_Events[i].disable =
  131. mmprofile_register_event(crtc_mmp_root, "disable");
  132. g_CRTC_MMP_Events[i].release_fence = mmprofile_register_event(
  133. crtc_mmp_root, "release_fence");
  134. g_CRTC_MMP_Events[i].update_present_fence =
  135. mmprofile_register_event(crtc_mmp_root,
  136. "update_present_fence");
  137. g_CRTC_MMP_Events[i].release_present_fence =
  138. mmprofile_register_event(crtc_mmp_root,
  139. "release_present_fence");
  140. g_CRTC_MMP_Events[i].atomic_begin = mmprofile_register_event(
  141. crtc_mmp_root, "atomic_begin");
  142. g_CRTC_MMP_Events[i].atomic_flush = mmprofile_register_event(
  143. crtc_mmp_root, "atomic_flush");
  144. g_CRTC_MMP_Events[i].enable_vblank = mmprofile_register_event(
  145. crtc_mmp_root, "enable_vblank");
  146. g_CRTC_MMP_Events[i].disable_vblank = mmprofile_register_event(
  147. crtc_mmp_root, "disable_vblank");
  148. g_CRTC_MMP_Events[i].esd_check =
  149. mmprofile_register_event(crtc_mmp_root, "ESD check");
  150. g_CRTC_MMP_Events[i].esd_recovery =
  151. mmprofile_register_event(crtc_mmp_root, "ESD recovery");
  152. g_CRTC_MMP_Events[i].leave_idle = mmprofile_register_event(
  153. crtc_mmp_root, "leave_idle");
  154. g_CRTC_MMP_Events[i].enter_idle = mmprofile_register_event(
  155. crtc_mmp_root, "enter_idle");
  156. g_CRTC_MMP_Events[i].frame_cfg =
  157. mmprofile_register_event(crtc_mmp_root, "frame cfg");
  158. g_CRTC_MMP_Events[i].suspend = mmprofile_register_event(
  159. crtc_mmp_root, "suspend");
  160. g_CRTC_MMP_Events[i].resume = mmprofile_register_event(
  161. crtc_mmp_root, "resume");
  162. g_CRTC_MMP_Events[i].dsi_suspend = mmprofile_register_event(
  163. crtc_mmp_root, "dsi_suspend");
  164. g_CRTC_MMP_Events[i].dsi_resume = mmprofile_register_event(
  165. crtc_mmp_root, "dsi_resume");
  166. g_CRTC_MMP_Events[i].backlight = mmprofile_register_event(
  167. crtc_mmp_root, "backlight");
  168. g_CRTC_MMP_Events[i].backlight_grp = mmprofile_register_event(
  169. crtc_mmp_root, "backlight_grp");
  170. g_CRTC_MMP_Events[i].ddic_send_cmd = mmprofile_register_event(
  171. crtc_mmp_root, "ddic_send_cmd");
  172. g_CRTC_MMP_Events[i].ddic_read_cmd = mmprofile_register_event(
  173. crtc_mmp_root, "ddic_read_cmd");
  174. g_CRTC_MMP_Events[i].path_switch = mmprofile_register_event(
  175. crtc_mmp_root, "path_switch");
  176. g_CRTC_MMP_Events[i].user_cmd = mmprofile_register_event(
  177. crtc_mmp_root, "user_cmd");
  178. g_CRTC_MMP_Events[i].check_trigger = mmprofile_register_event(
  179. crtc_mmp_root, "check_trigger");
  180. g_CRTC_MMP_Events[i].kick_trigger = mmprofile_register_event(
  181. crtc_mmp_root, "kick_trigger");
  182. g_CRTC_MMP_Events[i].atomic_commit = mmprofile_register_event(
  183. crtc_mmp_root, "atomic_commit");
  184. g_CRTC_MMP_Events[i].user_cmd_cb =
  185. mmprofile_register_event(crtc_mmp_root, "user_cmd_cb");
  186. g_CRTC_MMP_Events[i].bl_cb =
  187. mmprofile_register_event(crtc_mmp_root, "bl_cb");
  188. g_CRTC_MMP_Events[i].clk_change = mmprofile_register_event(
  189. crtc_mmp_root, "clk_change");
  190. g_CRTC_MMP_Events[i].layerBmpDump =
  191. mmprofile_register_event(
  192. crtc_mmp_root, "LayerBmpDump");
  193. g_CRTC_MMP_Events[i].layer_dump[0] =
  194. mmprofile_register_event(
  195. g_CRTC_MMP_Events[i].layerBmpDump,
  196. "layer0_dump");
  197. g_CRTC_MMP_Events[i].layer_dump[1] =
  198. mmprofile_register_event(
  199. g_CRTC_MMP_Events[i].layerBmpDump,
  200. "layer1_dump");
  201. g_CRTC_MMP_Events[i].layer_dump[2] =
  202. mmprofile_register_event(
  203. g_CRTC_MMP_Events[i].layerBmpDump,
  204. "layer2_dump");
  205. g_CRTC_MMP_Events[i].layer_dump[3] =
  206. mmprofile_register_event(
  207. g_CRTC_MMP_Events[i].layerBmpDump,
  208. "layer3_dump");
  209. g_CRTC_MMP_Events[i].layer_dump[4] =
  210. mmprofile_register_event(
  211. g_CRTC_MMP_Events[i].layerBmpDump,
  212. "layer4_dump");
  213. g_CRTC_MMP_Events[i].layer_dump[5] =
  214. mmprofile_register_event(
  215. g_CRTC_MMP_Events[i].layerBmpDump,
  216. "layer5_dump");
  217. }
  218. }
  219. void drm_mmp_init(void)
  220. {
  221. DDPMSG("%s\n", __func__);
  222. mmprofile_enable(1);
  223. /* init mmp events */
  224. init_drm_mmp_event();
  225. init_crtc_mmp_event();
  226. /* enable all mmp events */
  227. mmprofile_enable_event_recursive(g_DRM_MMP_Events.drm, 1);
  228. mmprofile_start(1);
  229. }
  230. struct DRM_MMP_Events *get_drm_mmp_events(void)
  231. {
  232. return &g_DRM_MMP_Events;
  233. }
  234. struct CRTC_MMP_Events *get_crtc_mmp_events(unsigned long id)
  235. {
  236. return &g_CRTC_MMP_Events[id];
  237. }
  238. #ifdef CONFIG_MTK_IOMMU_V2
  239. #include <mtk_iommu_ext.h>
  240. #endif
  241. #include <mtk_drm_drv.h>
  242. #define DISP_PAGE_MASK 0xfffL
  243. int crtc_mva_map_kernel(unsigned int mva, unsigned int size,
  244. unsigned long *map_va, unsigned int *map_size)
  245. {
  246. #ifdef CONFIG_MTK_IOMMU_V2
  247. struct disp_iommu_device *disp_dev = disp_get_iommu_dev();
  248. if ((disp_dev != NULL) && (disp_dev->iommu_pdev != NULL) && (mva != 0))
  249. mtk_iommu_iova_to_va(&(disp_dev->iommu_pdev->dev),
  250. mva, map_va, size);
  251. else
  252. DDPINFO("%s, %d, disp_dev is null\n", __func__, __LINE__);
  253. #endif
  254. return 0;
  255. }
  256. int crtc_mva_unmap_kernel(unsigned int mva, unsigned int size,
  257. unsigned long map_va)
  258. {
  259. #ifdef CONFIG_MTK_IOMMU_V2
  260. vunmap((void *)(map_va & (~DISP_PAGE_MASK)));
  261. #endif
  262. return 0;
  263. }
  264. int mtk_drm_mmp_ovl_layer(struct mtk_plane_state *state,
  265. u32 downSampleX, u32 downSampleY)
  266. {
  267. struct mtk_plane_pending_state *pending = &state->pending;
  268. struct drm_crtc *crtc = state->crtc;
  269. int crtc_idx = drm_crtc_index(crtc);
  270. struct mmp_metadata_bitmap_t bitmap;
  271. struct mmp_metadata_t meta;
  272. unsigned int fmt = pending->format;
  273. int raw = 0;
  274. int yuv = 0;
  275. if (!pending->enable) {
  276. DDPINFO("[MMP]layer is not disable\n");
  277. return -1;
  278. }
  279. if (pending->prop_val[PLANE_PROP_COMPRESS]) {
  280. DDPINFO("[MMP]layer is compress\n");
  281. return -1;
  282. }
  283. memset(&bitmap, 0, sizeof(struct mmp_metadata_bitmap_t));
  284. bitmap.data1 = 0;
  285. bitmap.width = pending->width;
  286. bitmap.height = pending->height;
  287. if (fmt == DRM_FORMAT_RGB565 || fmt == DRM_FORMAT_BGR565) {
  288. bitmap.format = MMPROFILE_BITMAP_RGB565;
  289. bitmap.bpp = 16;
  290. } else if (fmt == DRM_FORMAT_RGB888 || fmt == DRM_FORMAT_BGR888 ||
  291. fmt == DRM_FORMAT_C8) {
  292. bitmap.format = MMPROFILE_BITMAP_RGB888;
  293. bitmap.bpp = 24;
  294. } else if (fmt == DRM_FORMAT_BGRA8888 || fmt == DRM_FORMAT_BGRX8888) {
  295. bitmap.format = MMPROFILE_BITMAP_BGRA8888;
  296. bitmap.bpp = 32;
  297. } else if (fmt == DRM_FORMAT_RGBA8888 ||
  298. fmt == DRM_FORMAT_RGBX8888 ||
  299. fmt == DRM_FORMAT_XRGB8888 ||
  300. fmt == DRM_FORMAT_ARGB8888 ||
  301. fmt == DRM_FORMAT_XBGR8888 ||
  302. fmt == DRM_FORMAT_ABGR8888 ||
  303. fmt == DRM_FORMAT_ABGR2101010 ||
  304. fmt == DRM_FORMAT_ABGRFP16) {
  305. bitmap.format = MMPROFILE_BITMAP_RGBA8888;
  306. bitmap.bpp = 32;
  307. } else if (fmt == DRM_FORMAT_BGRA8888 ||
  308. fmt == DRM_FORMAT_BGRX8888){
  309. bitmap.format = MMPROFILE_BITMAP_BGRA8888;
  310. bitmap.bpp = 32;
  311. } else if (fmt == DRM_FORMAT_YUYV) {
  312. bitmap.format = MMPROFILE_BITMAP_RGB888;
  313. bitmap.bpp = 16;
  314. bitmap.data2 = MMPROFILE_BITMAP_YUYV;
  315. yuv = 1;
  316. } else if (fmt == DRM_FORMAT_YVYU) {
  317. bitmap.format = MMPROFILE_BITMAP_RGB888;
  318. bitmap.bpp = 16;
  319. bitmap.data2 = MMPROFILE_BITMAP_YVYU;
  320. yuv = 1;
  321. } else if (fmt == DRM_FORMAT_UYVY) {
  322. bitmap.format = MMPROFILE_BITMAP_RGB888;
  323. bitmap.bpp = 16;
  324. bitmap.data2 = MMPROFILE_BITMAP_UYVY;
  325. yuv = 1;
  326. } else if (fmt == DRM_FORMAT_VYUY) {
  327. bitmap.format = MMPROFILE_BITMAP_RGB888;
  328. bitmap.bpp = 16;
  329. bitmap.data2 = MMPROFILE_BITMAP_VYUY;
  330. yuv = 1;
  331. } else {
  332. DDPINFO("[MMP]unknown fmt\n");
  333. raw = 1;
  334. }
  335. CRTC_MMP_EVENT_START(crtc_idx, layerBmpDump,
  336. state->comp_state.lye_id, pending->enable);
  337. if (!raw) {
  338. mmp_event *event_base = NULL;
  339. bitmap.pitch = pending->pitch;
  340. bitmap.start_pos = 0;
  341. bitmap.data_size = bitmap.pitch * bitmap.height;
  342. bitmap.down_sample_x = downSampleX;
  343. bitmap.down_sample_y = downSampleY;
  344. if (!pending->addr || crtc_mva_map_kernel(pending->addr, bitmap.data_size,
  345. (unsigned long *)&bitmap.p_data,
  346. &bitmap.data_size) != 0) {
  347. DDPINFO("%s,fail to dump rgb\n", __func__);
  348. goto end;
  349. }
  350. event_base = g_CRTC_MMP_Events[crtc_idx].layer_dump;
  351. if (event_base) {
  352. if (!yuv)
  353. mmprofile_log_meta_bitmap(
  354. event_base[state->comp_state.lye_id],
  355. MMPROFILE_FLAG_PULSE,
  356. &bitmap);
  357. else
  358. mmprofile_log_meta_yuv_bitmap(
  359. event_base[state->comp_state.lye_id],
  360. MMPROFILE_FLAG_PULSE,
  361. &bitmap);
  362. }
  363. crtc_mva_unmap_kernel(pending->addr, bitmap.data_size,
  364. (unsigned long)bitmap.p_data);
  365. } else {
  366. mmp_event *event_base = NULL;
  367. meta.data_type = MMPROFILE_META_RAW;
  368. meta.size = pending->pitch * pending->height;
  369. if (crtc_mva_map_kernel(pending->addr, bitmap.data_size,
  370. (unsigned long *)&meta.p_data,
  371. &meta.size) != 0) {
  372. DDPINFO("%s,fail to dump rgb\n", __func__);
  373. goto end;
  374. }
  375. event_base = g_CRTC_MMP_Events[crtc_idx].layer_dump;
  376. if (event_base)
  377. mmprofile_log_meta(
  378. event_base[state->comp_state.lye_id],
  379. MMPROFILE_FLAG_PULSE, &meta);
  380. crtc_mva_unmap_kernel(pending->addr, meta.size,
  381. (unsigned long)meta.p_data);
  382. }
  383. end:
  384. CRTC_MMP_EVENT_END(crtc_idx, layerBmpDump,
  385. pending->addr, pending->format);
  386. return 0;
  387. }