fsl_dcu_drm_drv.c 9.7 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * Freescale DCU drm device driver
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/clk-provider.h>
  13. #include <linux/console.h>
  14. #include <linux/io.h>
  15. #include <linux/mfd/syscon.h>
  16. #include <linux/mm.h>
  17. #include <linux/module.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/pm.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/regmap.h>
  23. #include <drm/drmP.h>
  24. #include <drm/drm_atomic_helper.h>
  25. #include <drm/drm_crtc_helper.h>
  26. #include <drm/drm_fb_cma_helper.h>
  27. #include <drm/drm_gem_cma_helper.h>
  28. #include "fsl_dcu_drm_crtc.h"
  29. #include "fsl_dcu_drm_drv.h"
  30. #include "fsl_tcon.h"
  31. static int legacyfb_depth = 24;
  32. module_param(legacyfb_depth, int, 0444);
  33. static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
  34. {
  35. if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
  36. return true;
  37. return false;
  38. }
  39. static const struct regmap_config fsl_dcu_regmap_config = {
  40. .reg_bits = 32,
  41. .reg_stride = 4,
  42. .val_bits = 32,
  43. .volatile_reg = fsl_dcu_drm_is_volatile_reg,
  44. };
  45. static void fsl_dcu_irq_uninstall(struct drm_device *dev)
  46. {
  47. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  48. regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
  49. regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
  50. }
  51. static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
  52. {
  53. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  54. int ret;
  55. ret = fsl_dcu_drm_modeset_init(fsl_dev);
  56. if (ret < 0) {
  57. dev_err(dev->dev, "failed to initialize mode setting\n");
  58. return ret;
  59. }
  60. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  61. if (ret < 0) {
  62. dev_err(dev->dev, "failed to initialize vblank\n");
  63. goto done;
  64. }
  65. ret = drm_irq_install(dev, fsl_dev->irq);
  66. if (ret < 0) {
  67. dev_err(dev->dev, "failed to install IRQ handler\n");
  68. goto done;
  69. }
  70. if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
  71. legacyfb_depth != 32) {
  72. dev_warn(dev->dev,
  73. "Invalid legacyfb_depth. Defaulting to 24bpp\n");
  74. legacyfb_depth = 24;
  75. }
  76. fsl_dev->fbdev = drm_fbdev_cma_init(dev, legacyfb_depth, 1);
  77. if (IS_ERR(fsl_dev->fbdev)) {
  78. ret = PTR_ERR(fsl_dev->fbdev);
  79. fsl_dev->fbdev = NULL;
  80. goto done;
  81. }
  82. return 0;
  83. done:
  84. drm_kms_helper_poll_fini(dev);
  85. if (fsl_dev->fbdev)
  86. drm_fbdev_cma_fini(fsl_dev->fbdev);
  87. drm_mode_config_cleanup(dev);
  88. drm_irq_uninstall(dev);
  89. dev->dev_private = NULL;
  90. return ret;
  91. }
  92. static void fsl_dcu_unload(struct drm_device *dev)
  93. {
  94. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  95. drm_atomic_helper_shutdown(dev);
  96. drm_kms_helper_poll_fini(dev);
  97. if (fsl_dev->fbdev)
  98. drm_fbdev_cma_fini(fsl_dev->fbdev);
  99. drm_mode_config_cleanup(dev);
  100. drm_irq_uninstall(dev);
  101. dev->dev_private = NULL;
  102. }
  103. static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
  104. {
  105. struct drm_device *dev = arg;
  106. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  107. unsigned int int_status;
  108. int ret;
  109. ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
  110. if (ret) {
  111. dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
  112. return IRQ_NONE;
  113. }
  114. if (int_status & DCU_INT_STATUS_VBLANK)
  115. drm_handle_vblank(dev, 0);
  116. regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
  117. return IRQ_HANDLED;
  118. }
  119. static void fsl_dcu_drm_lastclose(struct drm_device *dev)
  120. {
  121. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  122. drm_fbdev_cma_restore_mode(fsl_dev->fbdev);
  123. }
  124. DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops);
  125. static struct drm_driver fsl_dcu_drm_driver = {
  126. .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
  127. | DRIVER_PRIME | DRIVER_ATOMIC,
  128. .lastclose = fsl_dcu_drm_lastclose,
  129. .load = fsl_dcu_load,
  130. .unload = fsl_dcu_unload,
  131. .irq_handler = fsl_dcu_drm_irq,
  132. .irq_preinstall = fsl_dcu_irq_uninstall,
  133. .irq_uninstall = fsl_dcu_irq_uninstall,
  134. .gem_free_object_unlocked = drm_gem_cma_free_object,
  135. .gem_vm_ops = &drm_gem_cma_vm_ops,
  136. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  137. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  138. .gem_prime_import = drm_gem_prime_import,
  139. .gem_prime_export = drm_gem_prime_export,
  140. .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
  141. .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
  142. .gem_prime_vmap = drm_gem_cma_prime_vmap,
  143. .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
  144. .gem_prime_mmap = drm_gem_cma_prime_mmap,
  145. .dumb_create = drm_gem_cma_dumb_create,
  146. .fops = &fsl_dcu_drm_fops,
  147. .name = "fsl-dcu-drm",
  148. .desc = "Freescale DCU DRM",
  149. .date = "20160425",
  150. .major = 1,
  151. .minor = 1,
  152. };
  153. #ifdef CONFIG_PM_SLEEP
  154. static int fsl_dcu_drm_pm_suspend(struct device *dev)
  155. {
  156. struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
  157. if (!fsl_dev)
  158. return 0;
  159. disable_irq(fsl_dev->irq);
  160. drm_kms_helper_poll_disable(fsl_dev->drm);
  161. console_lock();
  162. drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 1);
  163. console_unlock();
  164. fsl_dev->state = drm_atomic_helper_suspend(fsl_dev->drm);
  165. if (IS_ERR(fsl_dev->state)) {
  166. console_lock();
  167. drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0);
  168. console_unlock();
  169. drm_kms_helper_poll_enable(fsl_dev->drm);
  170. enable_irq(fsl_dev->irq);
  171. return PTR_ERR(fsl_dev->state);
  172. }
  173. clk_disable_unprepare(fsl_dev->clk);
  174. return 0;
  175. }
  176. static int fsl_dcu_drm_pm_resume(struct device *dev)
  177. {
  178. struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
  179. int ret;
  180. if (!fsl_dev)
  181. return 0;
  182. ret = clk_prepare_enable(fsl_dev->clk);
  183. if (ret < 0) {
  184. dev_err(dev, "failed to enable dcu clk\n");
  185. return ret;
  186. }
  187. if (fsl_dev->tcon)
  188. fsl_tcon_bypass_enable(fsl_dev->tcon);
  189. fsl_dcu_drm_init_planes(fsl_dev->drm);
  190. enable_irq(fsl_dev->irq);
  191. drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state);
  192. console_lock();
  193. drm_fbdev_cma_set_suspend(fsl_dev->fbdev, 0);
  194. console_unlock();
  195. drm_kms_helper_poll_enable(fsl_dev->drm);
  196. return 0;
  197. }
  198. #endif
  199. static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
  200. SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
  201. };
  202. static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
  203. .name = "ls1021a",
  204. .total_layer = 16,
  205. .max_layer = 4,
  206. .layer_regs = LS1021A_LAYER_REG_NUM,
  207. };
  208. static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
  209. .name = "vf610",
  210. .total_layer = 64,
  211. .max_layer = 6,
  212. .layer_regs = VF610_LAYER_REG_NUM,
  213. };
  214. static const struct of_device_id fsl_dcu_of_match[] = {
  215. {
  216. .compatible = "fsl,ls1021a-dcu",
  217. .data = &fsl_dcu_ls1021a_data,
  218. }, {
  219. .compatible = "fsl,vf610-dcu",
  220. .data = &fsl_dcu_vf610_data,
  221. }, {
  222. },
  223. };
  224. MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
  225. static int fsl_dcu_drm_probe(struct platform_device *pdev)
  226. {
  227. struct fsl_dcu_drm_device *fsl_dev;
  228. struct drm_device *drm;
  229. struct device *dev = &pdev->dev;
  230. struct resource *res;
  231. void __iomem *base;
  232. struct drm_driver *driver = &fsl_dcu_drm_driver;
  233. struct clk *pix_clk_in;
  234. char pix_clk_name[32];
  235. const char *pix_clk_in_name;
  236. const struct of_device_id *id;
  237. int ret;
  238. u8 div_ratio_shift = 0;
  239. fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
  240. if (!fsl_dev)
  241. return -ENOMEM;
  242. id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
  243. if (!id)
  244. return -ENODEV;
  245. fsl_dev->soc = id->data;
  246. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  247. base = devm_ioremap_resource(dev, res);
  248. if (IS_ERR(base)) {
  249. ret = PTR_ERR(base);
  250. return ret;
  251. }
  252. fsl_dev->irq = platform_get_irq(pdev, 0);
  253. if (fsl_dev->irq < 0) {
  254. dev_err(dev, "failed to get irq\n");
  255. return fsl_dev->irq;
  256. }
  257. fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
  258. &fsl_dcu_regmap_config);
  259. if (IS_ERR(fsl_dev->regmap)) {
  260. dev_err(dev, "regmap init failed\n");
  261. return PTR_ERR(fsl_dev->regmap);
  262. }
  263. fsl_dev->clk = devm_clk_get(dev, "dcu");
  264. if (IS_ERR(fsl_dev->clk)) {
  265. dev_err(dev, "failed to get dcu clock\n");
  266. return PTR_ERR(fsl_dev->clk);
  267. }
  268. ret = clk_prepare_enable(fsl_dev->clk);
  269. if (ret < 0) {
  270. dev_err(dev, "failed to enable dcu clk\n");
  271. return ret;
  272. }
  273. pix_clk_in = devm_clk_get(dev, "pix");
  274. if (IS_ERR(pix_clk_in)) {
  275. /* legancy binding, use dcu clock as pixel clock input */
  276. pix_clk_in = fsl_dev->clk;
  277. }
  278. if (of_property_read_bool(dev->of_node, "big-endian"))
  279. div_ratio_shift = 24;
  280. pix_clk_in_name = __clk_get_name(pix_clk_in);
  281. snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
  282. fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
  283. pix_clk_in_name, 0, base + DCU_DIV_RATIO,
  284. div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
  285. if (IS_ERR(fsl_dev->pix_clk)) {
  286. dev_err(dev, "failed to register pix clk\n");
  287. ret = PTR_ERR(fsl_dev->pix_clk);
  288. goto disable_clk;
  289. }
  290. fsl_dev->tcon = fsl_tcon_init(dev);
  291. drm = drm_dev_alloc(driver, dev);
  292. if (IS_ERR(drm)) {
  293. ret = PTR_ERR(drm);
  294. goto unregister_pix_clk;
  295. }
  296. fsl_dev->dev = dev;
  297. fsl_dev->drm = drm;
  298. fsl_dev->np = dev->of_node;
  299. drm->dev_private = fsl_dev;
  300. dev_set_drvdata(dev, fsl_dev);
  301. ret = drm_dev_register(drm, 0);
  302. if (ret < 0)
  303. goto unref;
  304. return 0;
  305. unref:
  306. drm_dev_unref(drm);
  307. unregister_pix_clk:
  308. clk_unregister(fsl_dev->pix_clk);
  309. disable_clk:
  310. clk_disable_unprepare(fsl_dev->clk);
  311. return ret;
  312. }
  313. static int fsl_dcu_drm_remove(struct platform_device *pdev)
  314. {
  315. struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
  316. drm_dev_unregister(fsl_dev->drm);
  317. drm_dev_unref(fsl_dev->drm);
  318. clk_disable_unprepare(fsl_dev->clk);
  319. clk_unregister(fsl_dev->pix_clk);
  320. return 0;
  321. }
  322. static struct platform_driver fsl_dcu_drm_platform_driver = {
  323. .probe = fsl_dcu_drm_probe,
  324. .remove = fsl_dcu_drm_remove,
  325. .driver = {
  326. .name = "fsl-dcu",
  327. .pm = &fsl_dcu_drm_pm_ops,
  328. .of_match_table = fsl_dcu_of_match,
  329. },
  330. };
  331. module_platform_driver(fsl_dcu_drm_platform_driver);
  332. MODULE_DESCRIPTION("Freescale DCU DRM Driver");
  333. MODULE_LICENSE("GPL");