fsl_dcu_drm_crtc.c 6.0 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * Freescale DCU drm device driver
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/regmap.h>
  13. #include <drm/drmP.h>
  14. #include <drm/drm_atomic.h>
  15. #include <drm/drm_atomic_helper.h>
  16. #include <drm/drm_crtc.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include "fsl_dcu_drm_crtc.h"
  19. #include "fsl_dcu_drm_drv.h"
  20. #include "fsl_dcu_drm_plane.h"
  21. static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc,
  22. struct drm_crtc_state *old_crtc_state)
  23. {
  24. struct drm_device *dev = crtc->dev;
  25. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  26. struct drm_pending_vblank_event *event = crtc->state->event;
  27. regmap_write(fsl_dev->regmap,
  28. DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG);
  29. if (event) {
  30. crtc->state->event = NULL;
  31. spin_lock_irq(&crtc->dev->event_lock);
  32. if (drm_crtc_vblank_get(crtc) == 0)
  33. drm_crtc_arm_vblank_event(crtc, event);
  34. else
  35. drm_crtc_send_vblank_event(crtc, event);
  36. spin_unlock_irq(&crtc->dev->event_lock);
  37. }
  38. }
  39. static void fsl_dcu_drm_crtc_atomic_disable(struct drm_crtc *crtc,
  40. struct drm_crtc_state *old_crtc_state)
  41. {
  42. struct drm_device *dev = crtc->dev;
  43. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  44. /* always disable planes on the CRTC */
  45. drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, true);
  46. drm_crtc_vblank_off(crtc);
  47. regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
  48. DCU_MODE_DCU_MODE_MASK,
  49. DCU_MODE_DCU_MODE(DCU_MODE_OFF));
  50. regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
  51. DCU_UPDATE_MODE_READREG);
  52. clk_disable_unprepare(fsl_dev->pix_clk);
  53. }
  54. static void fsl_dcu_drm_crtc_atomic_enable(struct drm_crtc *crtc,
  55. struct drm_crtc_state *old_state)
  56. {
  57. struct drm_device *dev = crtc->dev;
  58. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  59. clk_prepare_enable(fsl_dev->pix_clk);
  60. regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
  61. DCU_MODE_DCU_MODE_MASK,
  62. DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
  63. regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,
  64. DCU_UPDATE_MODE_READREG);
  65. drm_crtc_vblank_on(crtc);
  66. }
  67. static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
  68. {
  69. struct drm_device *dev = crtc->dev;
  70. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  71. struct drm_connector *con = &fsl_dev->connector.base;
  72. struct drm_display_mode *mode = &crtc->state->mode;
  73. unsigned int hbp, hfp, hsw, vbp, vfp, vsw, index, pol = 0;
  74. index = drm_crtc_index(crtc);
  75. clk_set_rate(fsl_dev->pix_clk, mode->clock * 1000);
  76. /* Configure timings: */
  77. hbp = mode->htotal - mode->hsync_end;
  78. hfp = mode->hsync_start - mode->hdisplay;
  79. hsw = mode->hsync_end - mode->hsync_start;
  80. vbp = mode->vtotal - mode->vsync_end;
  81. vfp = mode->vsync_start - mode->vdisplay;
  82. vsw = mode->vsync_end - mode->vsync_start;
  83. /* INV_PXCK as default (most display sample data on rising edge) */
  84. if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE))
  85. pol |= DCU_SYN_POL_INV_PXCK;
  86. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  87. pol |= DCU_SYN_POL_INV_HS_LOW;
  88. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  89. pol |= DCU_SYN_POL_INV_VS_LOW;
  90. regmap_write(fsl_dev->regmap, DCU_HSYN_PARA,
  91. DCU_HSYN_PARA_BP(hbp) |
  92. DCU_HSYN_PARA_PW(hsw) |
  93. DCU_HSYN_PARA_FP(hfp));
  94. regmap_write(fsl_dev->regmap, DCU_VSYN_PARA,
  95. DCU_VSYN_PARA_BP(vbp) |
  96. DCU_VSYN_PARA_PW(vsw) |
  97. DCU_VSYN_PARA_FP(vfp));
  98. regmap_write(fsl_dev->regmap, DCU_DISP_SIZE,
  99. DCU_DISP_SIZE_DELTA_Y(mode->vdisplay) |
  100. DCU_DISP_SIZE_DELTA_X(mode->hdisplay));
  101. regmap_write(fsl_dev->regmap, DCU_SYN_POL, pol);
  102. regmap_write(fsl_dev->regmap, DCU_BGND, DCU_BGND_R(0) |
  103. DCU_BGND_G(0) | DCU_BGND_B(0));
  104. regmap_write(fsl_dev->regmap, DCU_DCU_MODE,
  105. DCU_MODE_BLEND_ITER(1) | DCU_MODE_RASTER_EN);
  106. regmap_write(fsl_dev->regmap, DCU_THRESHOLD,
  107. DCU_THRESHOLD_LS_BF_VS(BF_VS_VAL) |
  108. DCU_THRESHOLD_OUT_BUF_HIGH(BUF_MAX_VAL) |
  109. DCU_THRESHOLD_OUT_BUF_LOW(BUF_MIN_VAL));
  110. return;
  111. }
  112. static const struct drm_crtc_helper_funcs fsl_dcu_drm_crtc_helper_funcs = {
  113. .atomic_disable = fsl_dcu_drm_crtc_atomic_disable,
  114. .atomic_flush = fsl_dcu_drm_crtc_atomic_flush,
  115. .atomic_enable = fsl_dcu_drm_crtc_atomic_enable,
  116. .mode_set_nofb = fsl_dcu_drm_crtc_mode_set_nofb,
  117. };
  118. static int fsl_dcu_drm_crtc_enable_vblank(struct drm_crtc *crtc)
  119. {
  120. struct drm_device *dev = crtc->dev;
  121. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  122. unsigned int value;
  123. regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
  124. value &= ~DCU_INT_MASK_VBLANK;
  125. regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
  126. return 0;
  127. }
  128. static void fsl_dcu_drm_crtc_disable_vblank(struct drm_crtc *crtc)
  129. {
  130. struct drm_device *dev = crtc->dev;
  131. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  132. unsigned int value;
  133. regmap_read(fsl_dev->regmap, DCU_INT_MASK, &value);
  134. value |= DCU_INT_MASK_VBLANK;
  135. regmap_write(fsl_dev->regmap, DCU_INT_MASK, value);
  136. }
  137. static const struct drm_crtc_funcs fsl_dcu_drm_crtc_funcs = {
  138. .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
  139. .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
  140. .destroy = drm_crtc_cleanup,
  141. .page_flip = drm_atomic_helper_page_flip,
  142. .reset = drm_atomic_helper_crtc_reset,
  143. .set_config = drm_atomic_helper_set_config,
  144. .enable_vblank = fsl_dcu_drm_crtc_enable_vblank,
  145. .disable_vblank = fsl_dcu_drm_crtc_disable_vblank,
  146. };
  147. int fsl_dcu_drm_crtc_create(struct fsl_dcu_drm_device *fsl_dev)
  148. {
  149. struct drm_plane *primary;
  150. struct drm_crtc *crtc = &fsl_dev->crtc;
  151. int ret;
  152. fsl_dcu_drm_init_planes(fsl_dev->drm);
  153. primary = fsl_dcu_drm_primary_create_plane(fsl_dev->drm);
  154. if (!primary)
  155. return -ENOMEM;
  156. ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL,
  157. &fsl_dcu_drm_crtc_funcs, NULL);
  158. if (ret) {
  159. primary->funcs->destroy(primary);
  160. return ret;
  161. }
  162. drm_crtc_helper_add(crtc, &fsl_dcu_drm_crtc_helper_funcs);
  163. return 0;
  164. }