exynos_drm_ipp.c 43 KB

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  1. /*
  2. * Copyright (C) 2012 Samsung Electronics Co.Ltd
  3. * Authors:
  4. * Eunchul Kim <chulspro.kim@samsung.com>
  5. * Jinyoung Jeon <jy0.jeon@samsung.com>
  6. * Sangmin Lee <lsmin.lee@samsung.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/types.h>
  17. #include <linux/clk.h>
  18. #include <linux/pm_runtime.h>
  19. #include <drm/drmP.h>
  20. #include <drm/exynos_drm.h>
  21. #include "exynos_drm_drv.h"
  22. #include "exynos_drm_gem.h"
  23. #include "exynos_drm_ipp.h"
  24. #include "exynos_drm_iommu.h"
  25. /*
  26. * IPP stands for Image Post Processing and
  27. * supports image scaler/rotator and input/output DMA operations.
  28. * using FIMC, GSC, Rotator, so on.
  29. * IPP is integration device driver of same attribute h/w
  30. */
  31. /*
  32. * TODO
  33. * 1. expand command control id.
  34. * 2. integrate property and config.
  35. * 3. removed send_event id check routine.
  36. * 4. compare send_event id if needed.
  37. * 5. free subdrv_remove notifier callback list if needed.
  38. * 6. need to check subdrv_open about multi-open.
  39. * 7. need to power_on implement power and sysmmu ctrl.
  40. */
  41. #define get_ipp_context(dev) platform_get_drvdata(to_platform_device(dev))
  42. #define ipp_is_m2m_cmd(c) (c == IPP_CMD_M2M)
  43. /*
  44. * A structure of event.
  45. *
  46. * @base: base of event.
  47. * @event: ipp event.
  48. */
  49. struct drm_exynos_ipp_send_event {
  50. struct drm_pending_event base;
  51. struct drm_exynos_ipp_event event;
  52. };
  53. /*
  54. * A structure of memory node.
  55. *
  56. * @list: list head to memory queue information.
  57. * @ops_id: id of operations.
  58. * @prop_id: id of property.
  59. * @buf_id: id of buffer.
  60. * @buf_info: gem objects and dma address, size.
  61. * @filp: a pointer to drm_file.
  62. */
  63. struct drm_exynos_ipp_mem_node {
  64. struct list_head list;
  65. enum drm_exynos_ops_id ops_id;
  66. u32 prop_id;
  67. u32 buf_id;
  68. struct drm_exynos_ipp_buf_info buf_info;
  69. };
  70. /*
  71. * A structure of ipp context.
  72. *
  73. * @subdrv: prepare initialization using subdrv.
  74. * @ipp_lock: lock for synchronization of access to ipp_idr.
  75. * @prop_lock: lock for synchronization of access to prop_idr.
  76. * @ipp_idr: ipp driver idr.
  77. * @prop_idr: property idr.
  78. * @event_workq: event work queue.
  79. * @cmd_workq: command work queue.
  80. */
  81. struct ipp_context {
  82. struct exynos_drm_subdrv subdrv;
  83. struct mutex ipp_lock;
  84. struct mutex prop_lock;
  85. struct idr ipp_idr;
  86. struct idr prop_idr;
  87. struct workqueue_struct *event_workq;
  88. struct workqueue_struct *cmd_workq;
  89. };
  90. static LIST_HEAD(exynos_drm_ippdrv_list);
  91. static DEFINE_MUTEX(exynos_drm_ippdrv_lock);
  92. static BLOCKING_NOTIFIER_HEAD(exynos_drm_ippnb_list);
  93. int exynos_drm_ippdrv_register(struct exynos_drm_ippdrv *ippdrv)
  94. {
  95. mutex_lock(&exynos_drm_ippdrv_lock);
  96. list_add_tail(&ippdrv->drv_list, &exynos_drm_ippdrv_list);
  97. mutex_unlock(&exynos_drm_ippdrv_lock);
  98. return 0;
  99. }
  100. int exynos_drm_ippdrv_unregister(struct exynos_drm_ippdrv *ippdrv)
  101. {
  102. mutex_lock(&exynos_drm_ippdrv_lock);
  103. list_del(&ippdrv->drv_list);
  104. mutex_unlock(&exynos_drm_ippdrv_lock);
  105. return 0;
  106. }
  107. static int ipp_create_id(struct idr *id_idr, struct mutex *lock, void *obj)
  108. {
  109. int ret;
  110. mutex_lock(lock);
  111. ret = idr_alloc(id_idr, obj, 1, 0, GFP_KERNEL);
  112. mutex_unlock(lock);
  113. return ret;
  114. }
  115. static void ipp_remove_id(struct idr *id_idr, struct mutex *lock, u32 id)
  116. {
  117. mutex_lock(lock);
  118. idr_remove(id_idr, id);
  119. mutex_unlock(lock);
  120. }
  121. static void *ipp_find_obj(struct idr *id_idr, struct mutex *lock, u32 id)
  122. {
  123. void *obj;
  124. mutex_lock(lock);
  125. obj = idr_find(id_idr, id);
  126. mutex_unlock(lock);
  127. return obj;
  128. }
  129. static int ipp_check_driver(struct exynos_drm_ippdrv *ippdrv,
  130. struct drm_exynos_ipp_property *property)
  131. {
  132. if (ippdrv->dedicated || (!ipp_is_m2m_cmd(property->cmd) &&
  133. !pm_runtime_suspended(ippdrv->dev)))
  134. return -EBUSY;
  135. if (ippdrv->check_property &&
  136. ippdrv->check_property(ippdrv->dev, property))
  137. return -EINVAL;
  138. return 0;
  139. }
  140. static struct exynos_drm_ippdrv *ipp_find_driver(struct ipp_context *ctx,
  141. struct drm_exynos_ipp_property *property)
  142. {
  143. struct exynos_drm_ippdrv *ippdrv;
  144. u32 ipp_id = property->ipp_id;
  145. int ret;
  146. if (ipp_id) {
  147. ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock, ipp_id);
  148. if (!ippdrv) {
  149. DRM_DEBUG("ipp%d driver not found\n", ipp_id);
  150. return ERR_PTR(-ENODEV);
  151. }
  152. ret = ipp_check_driver(ippdrv, property);
  153. if (ret < 0) {
  154. DRM_DEBUG("ipp%d driver check error %d\n", ipp_id, ret);
  155. return ERR_PTR(ret);
  156. }
  157. return ippdrv;
  158. } else {
  159. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  160. ret = ipp_check_driver(ippdrv, property);
  161. if (ret == 0)
  162. return ippdrv;
  163. }
  164. DRM_DEBUG("cannot find driver suitable for given property.\n");
  165. }
  166. return ERR_PTR(-ENODEV);
  167. }
  168. static struct exynos_drm_ippdrv *ipp_find_drv_by_handle(u32 prop_id)
  169. {
  170. struct exynos_drm_ippdrv *ippdrv;
  171. struct drm_exynos_ipp_cmd_node *c_node;
  172. int count = 0;
  173. DRM_DEBUG_KMS("prop_id[%d]\n", prop_id);
  174. /*
  175. * This case is search ipp driver by prop_id handle.
  176. * sometimes, ipp subsystem find driver by prop_id.
  177. * e.g PAUSE state, queue buf, command control.
  178. */
  179. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  180. DRM_DEBUG_KMS("count[%d]ippdrv[%pK]\n", count++, ippdrv);
  181. mutex_lock(&ippdrv->cmd_lock);
  182. list_for_each_entry(c_node, &ippdrv->cmd_list, list) {
  183. if (c_node->property.prop_id == prop_id) {
  184. mutex_unlock(&ippdrv->cmd_lock);
  185. return ippdrv;
  186. }
  187. }
  188. mutex_unlock(&ippdrv->cmd_lock);
  189. }
  190. return ERR_PTR(-ENODEV);
  191. }
  192. int exynos_drm_ipp_get_property(struct drm_device *drm_dev, void *data,
  193. struct drm_file *file)
  194. {
  195. struct drm_exynos_file_private *file_priv = file->driver_priv;
  196. struct device *dev = file_priv->ipp_dev;
  197. struct ipp_context *ctx = get_ipp_context(dev);
  198. struct drm_exynos_ipp_prop_list *prop_list = data;
  199. struct exynos_drm_ippdrv *ippdrv;
  200. int count = 0;
  201. if (!ctx) {
  202. DRM_ERROR("invalid context.\n");
  203. return -EINVAL;
  204. }
  205. if (!prop_list) {
  206. DRM_ERROR("invalid property parameter.\n");
  207. return -EINVAL;
  208. }
  209. DRM_DEBUG_KMS("ipp_id[%d]\n", prop_list->ipp_id);
  210. if (!prop_list->ipp_id) {
  211. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list)
  212. count++;
  213. /*
  214. * Supports ippdrv list count for user application.
  215. * First step user application getting ippdrv count.
  216. * and second step getting ippdrv capability using ipp_id.
  217. */
  218. prop_list->count = count;
  219. } else {
  220. /*
  221. * Getting ippdrv capability by ipp_id.
  222. * some device not supported wb, output interface.
  223. * so, user application detect correct ipp driver
  224. * using this ioctl.
  225. */
  226. ippdrv = ipp_find_obj(&ctx->ipp_idr, &ctx->ipp_lock,
  227. prop_list->ipp_id);
  228. if (!ippdrv) {
  229. DRM_ERROR("not found ipp%d driver.\n",
  230. prop_list->ipp_id);
  231. return -ENODEV;
  232. }
  233. *prop_list = ippdrv->prop_list;
  234. }
  235. return 0;
  236. }
  237. static void ipp_print_property(struct drm_exynos_ipp_property *property,
  238. int idx)
  239. {
  240. struct drm_exynos_ipp_config *config = &property->config[idx];
  241. struct drm_exynos_pos *pos = &config->pos;
  242. struct drm_exynos_sz *sz = &config->sz;
  243. DRM_DEBUG_KMS("prop_id[%d]ops[%s]fmt[0x%x]\n",
  244. property->prop_id, idx ? "dst" : "src", config->fmt);
  245. DRM_DEBUG_KMS("pos[%d %d %d %d]sz[%d %d]f[%d]r[%d]\n",
  246. pos->x, pos->y, pos->w, pos->h,
  247. sz->hsize, sz->vsize, config->flip, config->degree);
  248. }
  249. static struct drm_exynos_ipp_cmd_work *ipp_create_cmd_work(void)
  250. {
  251. struct drm_exynos_ipp_cmd_work *cmd_work;
  252. cmd_work = kzalloc(sizeof(*cmd_work), GFP_KERNEL);
  253. if (!cmd_work)
  254. return ERR_PTR(-ENOMEM);
  255. INIT_WORK((struct work_struct *)cmd_work, ipp_sched_cmd);
  256. return cmd_work;
  257. }
  258. static struct drm_exynos_ipp_event_work *ipp_create_event_work(void)
  259. {
  260. struct drm_exynos_ipp_event_work *event_work;
  261. event_work = kzalloc(sizeof(*event_work), GFP_KERNEL);
  262. if (!event_work)
  263. return ERR_PTR(-ENOMEM);
  264. INIT_WORK(&event_work->work, ipp_sched_event);
  265. return event_work;
  266. }
  267. int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data,
  268. struct drm_file *file)
  269. {
  270. struct drm_exynos_file_private *file_priv = file->driver_priv;
  271. struct device *dev = file_priv->ipp_dev;
  272. struct ipp_context *ctx = get_ipp_context(dev);
  273. struct drm_exynos_ipp_property *property = data;
  274. struct exynos_drm_ippdrv *ippdrv;
  275. struct drm_exynos_ipp_cmd_node *c_node;
  276. u32 prop_id;
  277. int ret, i;
  278. if (!ctx) {
  279. DRM_ERROR("invalid context.\n");
  280. return -EINVAL;
  281. }
  282. if (!property) {
  283. DRM_ERROR("invalid property parameter.\n");
  284. return -EINVAL;
  285. }
  286. prop_id = property->prop_id;
  287. /*
  288. * This is log print for user application property.
  289. * user application set various property.
  290. */
  291. for_each_ipp_ops(i)
  292. ipp_print_property(property, i);
  293. /*
  294. * In case prop_id is not zero try to set existing property.
  295. */
  296. if (prop_id) {
  297. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock, prop_id);
  298. if (!c_node || c_node->filp != file) {
  299. DRM_DEBUG_KMS("prop_id[%d] not found\n", prop_id);
  300. return -EINVAL;
  301. }
  302. if (c_node->state != IPP_STATE_STOP) {
  303. DRM_DEBUG_KMS("prop_id[%d] not stopped\n", prop_id);
  304. return -EINVAL;
  305. }
  306. c_node->property = *property;
  307. return 0;
  308. }
  309. /* find ipp driver using ipp id */
  310. ippdrv = ipp_find_driver(ctx, property);
  311. if (IS_ERR(ippdrv)) {
  312. DRM_ERROR("failed to get ipp driver.\n");
  313. return -EINVAL;
  314. }
  315. /* allocate command node */
  316. c_node = kzalloc(sizeof(*c_node), GFP_KERNEL);
  317. if (!c_node)
  318. return -ENOMEM;
  319. ret = ipp_create_id(&ctx->prop_idr, &ctx->prop_lock, c_node);
  320. if (ret < 0) {
  321. DRM_ERROR("failed to create id.\n");
  322. goto err_clear;
  323. }
  324. property->prop_id = ret;
  325. DRM_DEBUG_KMS("created prop_id[%d]cmd[%d]ippdrv[%pK]\n",
  326. property->prop_id, property->cmd, ippdrv);
  327. /* stored property information and ippdrv in private data */
  328. c_node->property = *property;
  329. c_node->state = IPP_STATE_IDLE;
  330. c_node->filp = file;
  331. c_node->start_work = ipp_create_cmd_work();
  332. if (IS_ERR(c_node->start_work)) {
  333. DRM_ERROR("failed to create start work.\n");
  334. ret = PTR_ERR(c_node->start_work);
  335. goto err_remove_id;
  336. }
  337. c_node->stop_work = ipp_create_cmd_work();
  338. if (IS_ERR(c_node->stop_work)) {
  339. DRM_ERROR("failed to create stop work.\n");
  340. ret = PTR_ERR(c_node->stop_work);
  341. goto err_free_start;
  342. }
  343. c_node->event_work = ipp_create_event_work();
  344. if (IS_ERR(c_node->event_work)) {
  345. DRM_ERROR("failed to create event work.\n");
  346. ret = PTR_ERR(c_node->event_work);
  347. goto err_free_stop;
  348. }
  349. mutex_init(&c_node->lock);
  350. mutex_init(&c_node->mem_lock);
  351. mutex_init(&c_node->event_lock);
  352. init_completion(&c_node->start_complete);
  353. init_completion(&c_node->stop_complete);
  354. for_each_ipp_ops(i)
  355. INIT_LIST_HEAD(&c_node->mem_list[i]);
  356. INIT_LIST_HEAD(&c_node->event_list);
  357. mutex_lock(&ippdrv->cmd_lock);
  358. list_add_tail(&c_node->list, &ippdrv->cmd_list);
  359. mutex_unlock(&ippdrv->cmd_lock);
  360. /* make dedicated state without m2m */
  361. if (!ipp_is_m2m_cmd(property->cmd))
  362. ippdrv->dedicated = true;
  363. return 0;
  364. err_free_stop:
  365. kfree(c_node->stop_work);
  366. err_free_start:
  367. kfree(c_node->start_work);
  368. err_remove_id:
  369. ipp_remove_id(&ctx->prop_idr, &ctx->prop_lock, property->prop_id);
  370. err_clear:
  371. kfree(c_node);
  372. return ret;
  373. }
  374. static int ipp_validate_mem_node(struct drm_device *drm_dev,
  375. struct drm_exynos_ipp_mem_node *m_node,
  376. struct drm_exynos_ipp_cmd_node *c_node)
  377. {
  378. struct drm_exynos_ipp_config *ipp_cfg;
  379. unsigned int num_plane;
  380. unsigned long size, buf_size = 0, plane_size, img_size = 0;
  381. unsigned int bpp, width, height;
  382. int i;
  383. ipp_cfg = &c_node->property.config[m_node->ops_id];
  384. num_plane = drm_format_num_planes(ipp_cfg->fmt);
  385. /**
  386. * This is a rather simplified validation of a memory node.
  387. * It basically verifies provided gem object handles
  388. * and the buffer sizes with respect to current configuration.
  389. * This is not the best that can be done
  390. * but it seems more than enough
  391. */
  392. for (i = 0; i < num_plane; ++i) {
  393. width = ipp_cfg->sz.hsize;
  394. height = ipp_cfg->sz.vsize;
  395. bpp = drm_format_plane_cpp(ipp_cfg->fmt, i);
  396. /*
  397. * The result of drm_format_plane_cpp() for chroma planes must
  398. * be used with drm_format_xxxx_chroma_subsampling() for
  399. * correct result.
  400. */
  401. if (i > 0) {
  402. width /= drm_format_horz_chroma_subsampling(
  403. ipp_cfg->fmt);
  404. height /= drm_format_vert_chroma_subsampling(
  405. ipp_cfg->fmt);
  406. }
  407. plane_size = width * height * bpp;
  408. img_size += plane_size;
  409. if (m_node->buf_info.handles[i]) {
  410. size = exynos_drm_gem_get_size(drm_dev,
  411. m_node->buf_info.handles[i],
  412. c_node->filp);
  413. if (plane_size > size) {
  414. DRM_ERROR(
  415. "buffer %d is smaller than required\n",
  416. i);
  417. return -EINVAL;
  418. }
  419. buf_size += size;
  420. }
  421. }
  422. if (buf_size < img_size) {
  423. DRM_ERROR("size of buffers(%lu) is smaller than image(%lu)\n",
  424. buf_size, img_size);
  425. return -EINVAL;
  426. }
  427. return 0;
  428. }
  429. static int ipp_put_mem_node(struct drm_device *drm_dev,
  430. struct drm_exynos_ipp_cmd_node *c_node,
  431. struct drm_exynos_ipp_mem_node *m_node)
  432. {
  433. int i;
  434. DRM_DEBUG_KMS("node[%pK]\n", m_node);
  435. if (!m_node) {
  436. DRM_ERROR("invalid dequeue node.\n");
  437. return -EFAULT;
  438. }
  439. DRM_DEBUG_KMS("ops_id[%d]\n", m_node->ops_id);
  440. /* put gem buffer */
  441. for_each_ipp_planar(i) {
  442. unsigned long handle = m_node->buf_info.handles[i];
  443. if (handle)
  444. exynos_drm_gem_put_dma_addr(drm_dev, handle,
  445. c_node->filp);
  446. }
  447. list_del(&m_node->list);
  448. kfree(m_node);
  449. return 0;
  450. }
  451. static struct drm_exynos_ipp_mem_node
  452. *ipp_get_mem_node(struct drm_device *drm_dev,
  453. struct drm_exynos_ipp_cmd_node *c_node,
  454. struct drm_exynos_ipp_queue_buf *qbuf)
  455. {
  456. struct drm_exynos_ipp_mem_node *m_node;
  457. struct drm_exynos_ipp_buf_info *buf_info;
  458. int i;
  459. m_node = kzalloc(sizeof(*m_node), GFP_KERNEL);
  460. if (!m_node)
  461. return ERR_PTR(-ENOMEM);
  462. buf_info = &m_node->buf_info;
  463. /* operations, buffer id */
  464. m_node->ops_id = qbuf->ops_id;
  465. m_node->prop_id = qbuf->prop_id;
  466. m_node->buf_id = qbuf->buf_id;
  467. INIT_LIST_HEAD(&m_node->list);
  468. DRM_DEBUG_KMS("m_node[%pK]ops_id[%d]\n", m_node, qbuf->ops_id);
  469. DRM_DEBUG_KMS("prop_id[%d]buf_id[%d]\n", qbuf->prop_id, m_node->buf_id);
  470. for_each_ipp_planar(i) {
  471. DRM_DEBUG_KMS("i[%d]handle[0x%x]\n", i, qbuf->handle[i]);
  472. /* get dma address by handle */
  473. if (qbuf->handle[i]) {
  474. dma_addr_t *addr;
  475. addr = exynos_drm_gem_get_dma_addr(drm_dev,
  476. qbuf->handle[i], c_node->filp);
  477. if (IS_ERR(addr)) {
  478. DRM_ERROR("failed to get addr.\n");
  479. ipp_put_mem_node(drm_dev, c_node, m_node);
  480. return ERR_PTR(-EFAULT);
  481. }
  482. buf_info->handles[i] = qbuf->handle[i];
  483. buf_info->base[i] = *addr;
  484. DRM_DEBUG_KMS("i[%d]base[%pad]hd[0x%lx]\n", i,
  485. &buf_info->base[i], buf_info->handles[i]);
  486. }
  487. }
  488. mutex_lock(&c_node->mem_lock);
  489. if (ipp_validate_mem_node(drm_dev, m_node, c_node)) {
  490. ipp_put_mem_node(drm_dev, c_node, m_node);
  491. mutex_unlock(&c_node->mem_lock);
  492. return ERR_PTR(-EFAULT);
  493. }
  494. list_add_tail(&m_node->list, &c_node->mem_list[qbuf->ops_id]);
  495. mutex_unlock(&c_node->mem_lock);
  496. return m_node;
  497. }
  498. static void ipp_clean_mem_nodes(struct drm_device *drm_dev,
  499. struct drm_exynos_ipp_cmd_node *c_node, int ops)
  500. {
  501. struct drm_exynos_ipp_mem_node *m_node, *tm_node;
  502. struct list_head *head = &c_node->mem_list[ops];
  503. mutex_lock(&c_node->mem_lock);
  504. list_for_each_entry_safe(m_node, tm_node, head, list) {
  505. int ret;
  506. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  507. if (ret)
  508. DRM_ERROR("failed to put m_node.\n");
  509. }
  510. mutex_unlock(&c_node->mem_lock);
  511. }
  512. static int ipp_get_event(struct drm_device *drm_dev,
  513. struct drm_exynos_ipp_cmd_node *c_node,
  514. struct drm_exynos_ipp_queue_buf *qbuf)
  515. {
  516. struct drm_exynos_ipp_send_event *e;
  517. int ret;
  518. DRM_DEBUG_KMS("ops_id[%d]buf_id[%d]\n", qbuf->ops_id, qbuf->buf_id);
  519. e = kzalloc(sizeof(*e), GFP_KERNEL);
  520. if (!e)
  521. return -ENOMEM;
  522. /* make event */
  523. e->event.base.type = DRM_EXYNOS_IPP_EVENT;
  524. e->event.base.length = sizeof(e->event);
  525. e->event.user_data = qbuf->user_data;
  526. e->event.prop_id = qbuf->prop_id;
  527. e->event.buf_id[EXYNOS_DRM_OPS_DST] = qbuf->buf_id;
  528. ret = drm_event_reserve_init(drm_dev, c_node->filp, &e->base, &e->event.base);
  529. if (ret) {
  530. kfree(e);
  531. return ret;
  532. }
  533. mutex_lock(&c_node->event_lock);
  534. list_add_tail(&e->base.link, &c_node->event_list);
  535. mutex_unlock(&c_node->event_lock);
  536. return 0;
  537. }
  538. static void ipp_put_event(struct drm_exynos_ipp_cmd_node *c_node,
  539. struct drm_exynos_ipp_queue_buf *qbuf)
  540. {
  541. struct drm_exynos_ipp_send_event *e, *te;
  542. int count = 0;
  543. mutex_lock(&c_node->event_lock);
  544. list_for_each_entry_safe(e, te, &c_node->event_list, base.link) {
  545. DRM_DEBUG_KMS("count[%d]e[%pK]\n", count++, e);
  546. /*
  547. * qbuf == NULL condition means all event deletion.
  548. * stop operations want to delete all event list.
  549. * another case delete only same buf id.
  550. */
  551. if (!qbuf) {
  552. /* delete list */
  553. list_del(&e->base.link);
  554. kfree(e);
  555. }
  556. /* compare buffer id */
  557. if (qbuf && (qbuf->buf_id ==
  558. e->event.buf_id[EXYNOS_DRM_OPS_DST])) {
  559. /* delete list */
  560. list_del(&e->base.link);
  561. kfree(e);
  562. goto out_unlock;
  563. }
  564. }
  565. out_unlock:
  566. mutex_unlock(&c_node->event_lock);
  567. return;
  568. }
  569. static void ipp_clean_cmd_node(struct ipp_context *ctx,
  570. struct drm_exynos_ipp_cmd_node *c_node)
  571. {
  572. int i;
  573. /* cancel works */
  574. cancel_work_sync(&c_node->start_work->work);
  575. cancel_work_sync(&c_node->stop_work->work);
  576. cancel_work_sync(&c_node->event_work->work);
  577. /* put event */
  578. ipp_put_event(c_node, NULL);
  579. for_each_ipp_ops(i)
  580. ipp_clean_mem_nodes(ctx->subdrv.drm_dev, c_node, i);
  581. /* delete list */
  582. list_del(&c_node->list);
  583. ipp_remove_id(&ctx->prop_idr, &ctx->prop_lock,
  584. c_node->property.prop_id);
  585. /* destroy mutex */
  586. mutex_destroy(&c_node->lock);
  587. mutex_destroy(&c_node->mem_lock);
  588. mutex_destroy(&c_node->event_lock);
  589. /* free command node */
  590. kfree(c_node->start_work);
  591. kfree(c_node->stop_work);
  592. kfree(c_node->event_work);
  593. kfree(c_node);
  594. }
  595. static bool ipp_check_mem_list(struct drm_exynos_ipp_cmd_node *c_node)
  596. {
  597. switch (c_node->property.cmd) {
  598. case IPP_CMD_WB:
  599. return !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_DST]);
  600. case IPP_CMD_OUTPUT:
  601. return !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_SRC]);
  602. case IPP_CMD_M2M:
  603. default:
  604. return !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_SRC]) &&
  605. !list_empty(&c_node->mem_list[EXYNOS_DRM_OPS_DST]);
  606. }
  607. }
  608. static struct drm_exynos_ipp_mem_node
  609. *ipp_find_mem_node(struct drm_exynos_ipp_cmd_node *c_node,
  610. struct drm_exynos_ipp_queue_buf *qbuf)
  611. {
  612. struct drm_exynos_ipp_mem_node *m_node;
  613. struct list_head *head;
  614. int count = 0;
  615. DRM_DEBUG_KMS("buf_id[%d]\n", qbuf->buf_id);
  616. /* source/destination memory list */
  617. head = &c_node->mem_list[qbuf->ops_id];
  618. /* find memory node from memory list */
  619. list_for_each_entry(m_node, head, list) {
  620. DRM_DEBUG_KMS("count[%d]m_node[%pK]\n", count++, m_node);
  621. /* compare buffer id */
  622. if (m_node->buf_id == qbuf->buf_id)
  623. return m_node;
  624. }
  625. return NULL;
  626. }
  627. static int ipp_set_mem_node(struct exynos_drm_ippdrv *ippdrv,
  628. struct drm_exynos_ipp_cmd_node *c_node,
  629. struct drm_exynos_ipp_mem_node *m_node)
  630. {
  631. struct exynos_drm_ipp_ops *ops = NULL;
  632. int ret = 0;
  633. DRM_DEBUG_KMS("node[%pK]\n", m_node);
  634. if (!m_node) {
  635. DRM_ERROR("invalid queue node.\n");
  636. return -EFAULT;
  637. }
  638. DRM_DEBUG_KMS("ops_id[%d]\n", m_node->ops_id);
  639. /* get operations callback */
  640. ops = ippdrv->ops[m_node->ops_id];
  641. if (!ops) {
  642. DRM_ERROR("not support ops.\n");
  643. return -EFAULT;
  644. }
  645. /* set address and enable irq */
  646. if (ops->set_addr) {
  647. ret = ops->set_addr(ippdrv->dev, &m_node->buf_info,
  648. m_node->buf_id, IPP_BUF_ENQUEUE);
  649. if (ret) {
  650. DRM_ERROR("failed to set addr.\n");
  651. return ret;
  652. }
  653. }
  654. return ret;
  655. }
  656. static void ipp_handle_cmd_work(struct device *dev,
  657. struct exynos_drm_ippdrv *ippdrv,
  658. struct drm_exynos_ipp_cmd_work *cmd_work,
  659. struct drm_exynos_ipp_cmd_node *c_node)
  660. {
  661. struct ipp_context *ctx = get_ipp_context(dev);
  662. cmd_work->ippdrv = ippdrv;
  663. cmd_work->c_node = c_node;
  664. queue_work(ctx->cmd_workq, &cmd_work->work);
  665. }
  666. static int ipp_queue_buf_with_run(struct device *dev,
  667. struct drm_exynos_ipp_cmd_node *c_node,
  668. struct drm_exynos_ipp_mem_node *m_node,
  669. struct drm_exynos_ipp_queue_buf *qbuf)
  670. {
  671. struct exynos_drm_ippdrv *ippdrv;
  672. struct drm_exynos_ipp_property *property;
  673. struct exynos_drm_ipp_ops *ops;
  674. int ret;
  675. ippdrv = ipp_find_drv_by_handle(qbuf->prop_id);
  676. if (IS_ERR(ippdrv)) {
  677. DRM_ERROR("failed to get ipp driver.\n");
  678. return -EFAULT;
  679. }
  680. ops = ippdrv->ops[qbuf->ops_id];
  681. if (!ops) {
  682. DRM_ERROR("failed to get ops.\n");
  683. return -EFAULT;
  684. }
  685. property = &c_node->property;
  686. if (c_node->state != IPP_STATE_START) {
  687. DRM_DEBUG_KMS("bypass for invalid state.\n");
  688. return 0;
  689. }
  690. mutex_lock(&c_node->mem_lock);
  691. if (!ipp_check_mem_list(c_node)) {
  692. mutex_unlock(&c_node->mem_lock);
  693. DRM_DEBUG_KMS("empty memory.\n");
  694. return 0;
  695. }
  696. /*
  697. * If set destination buffer and enabled clock,
  698. * then m2m operations need start operations at queue_buf
  699. */
  700. if (ipp_is_m2m_cmd(property->cmd)) {
  701. struct drm_exynos_ipp_cmd_work *cmd_work = c_node->start_work;
  702. cmd_work->ctrl = IPP_CTRL_PLAY;
  703. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  704. } else {
  705. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  706. if (ret) {
  707. mutex_unlock(&c_node->mem_lock);
  708. DRM_ERROR("failed to set m node.\n");
  709. return ret;
  710. }
  711. }
  712. mutex_unlock(&c_node->mem_lock);
  713. return 0;
  714. }
  715. static void ipp_clean_queue_buf(struct drm_device *drm_dev,
  716. struct drm_exynos_ipp_cmd_node *c_node,
  717. struct drm_exynos_ipp_queue_buf *qbuf)
  718. {
  719. struct drm_exynos_ipp_mem_node *m_node, *tm_node;
  720. /* delete list */
  721. mutex_lock(&c_node->mem_lock);
  722. list_for_each_entry_safe(m_node, tm_node,
  723. &c_node->mem_list[qbuf->ops_id], list) {
  724. if (m_node->buf_id == qbuf->buf_id &&
  725. m_node->ops_id == qbuf->ops_id)
  726. ipp_put_mem_node(drm_dev, c_node, m_node);
  727. }
  728. mutex_unlock(&c_node->mem_lock);
  729. }
  730. int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev, void *data,
  731. struct drm_file *file)
  732. {
  733. struct drm_exynos_file_private *file_priv = file->driver_priv;
  734. struct device *dev = file_priv->ipp_dev;
  735. struct ipp_context *ctx = get_ipp_context(dev);
  736. struct drm_exynos_ipp_queue_buf *qbuf = data;
  737. struct drm_exynos_ipp_cmd_node *c_node;
  738. struct drm_exynos_ipp_mem_node *m_node;
  739. int ret;
  740. if (!qbuf) {
  741. DRM_ERROR("invalid buf parameter.\n");
  742. return -EINVAL;
  743. }
  744. if (qbuf->ops_id >= EXYNOS_DRM_OPS_MAX) {
  745. DRM_ERROR("invalid ops parameter.\n");
  746. return -EINVAL;
  747. }
  748. DRM_DEBUG_KMS("prop_id[%d]ops_id[%s]buf_id[%d]buf_type[%d]\n",
  749. qbuf->prop_id, qbuf->ops_id ? "dst" : "src",
  750. qbuf->buf_id, qbuf->buf_type);
  751. /* find command node */
  752. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock,
  753. qbuf->prop_id);
  754. if (!c_node || c_node->filp != file) {
  755. DRM_ERROR("failed to get command node.\n");
  756. return -ENODEV;
  757. }
  758. /* buffer control */
  759. switch (qbuf->buf_type) {
  760. case IPP_BUF_ENQUEUE:
  761. /* get memory node */
  762. m_node = ipp_get_mem_node(drm_dev, c_node, qbuf);
  763. if (IS_ERR(m_node)) {
  764. DRM_ERROR("failed to get m_node.\n");
  765. return PTR_ERR(m_node);
  766. }
  767. /*
  768. * first step get event for destination buffer.
  769. * and second step when M2M case run with destination buffer
  770. * if needed.
  771. */
  772. if (qbuf->ops_id == EXYNOS_DRM_OPS_DST) {
  773. /* get event for destination buffer */
  774. ret = ipp_get_event(drm_dev, c_node, qbuf);
  775. if (ret) {
  776. DRM_ERROR("failed to get event.\n");
  777. goto err_clean_node;
  778. }
  779. /*
  780. * M2M case run play control for streaming feature.
  781. * other case set address and waiting.
  782. */
  783. ret = ipp_queue_buf_with_run(dev, c_node, m_node, qbuf);
  784. if (ret) {
  785. DRM_ERROR("failed to run command.\n");
  786. goto err_clean_node;
  787. }
  788. }
  789. break;
  790. case IPP_BUF_DEQUEUE:
  791. mutex_lock(&c_node->lock);
  792. /* put event for destination buffer */
  793. if (qbuf->ops_id == EXYNOS_DRM_OPS_DST)
  794. ipp_put_event(c_node, qbuf);
  795. ipp_clean_queue_buf(drm_dev, c_node, qbuf);
  796. mutex_unlock(&c_node->lock);
  797. break;
  798. default:
  799. DRM_ERROR("invalid buffer control.\n");
  800. return -EINVAL;
  801. }
  802. return 0;
  803. err_clean_node:
  804. DRM_ERROR("clean memory nodes.\n");
  805. ipp_clean_queue_buf(drm_dev, c_node, qbuf);
  806. return ret;
  807. }
  808. static bool exynos_drm_ipp_check_valid(struct device *dev,
  809. enum drm_exynos_ipp_ctrl ctrl, enum drm_exynos_ipp_state state)
  810. {
  811. if (ctrl != IPP_CTRL_PLAY) {
  812. if (pm_runtime_suspended(dev)) {
  813. DRM_ERROR("pm:runtime_suspended.\n");
  814. goto err_status;
  815. }
  816. }
  817. switch (ctrl) {
  818. case IPP_CTRL_PLAY:
  819. if (state != IPP_STATE_IDLE)
  820. goto err_status;
  821. break;
  822. case IPP_CTRL_STOP:
  823. if (state == IPP_STATE_STOP)
  824. goto err_status;
  825. break;
  826. case IPP_CTRL_PAUSE:
  827. if (state != IPP_STATE_START)
  828. goto err_status;
  829. break;
  830. case IPP_CTRL_RESUME:
  831. if (state != IPP_STATE_STOP)
  832. goto err_status;
  833. break;
  834. default:
  835. DRM_ERROR("invalid state.\n");
  836. goto err_status;
  837. }
  838. return true;
  839. err_status:
  840. DRM_ERROR("invalid status:ctrl[%d]state[%d]\n", ctrl, state);
  841. return false;
  842. }
  843. int exynos_drm_ipp_cmd_ctrl(struct drm_device *drm_dev, void *data,
  844. struct drm_file *file)
  845. {
  846. struct drm_exynos_file_private *file_priv = file->driver_priv;
  847. struct exynos_drm_ippdrv *ippdrv = NULL;
  848. struct device *dev = file_priv->ipp_dev;
  849. struct ipp_context *ctx = get_ipp_context(dev);
  850. struct drm_exynos_ipp_cmd_ctrl *cmd_ctrl = data;
  851. struct drm_exynos_ipp_cmd_work *cmd_work;
  852. struct drm_exynos_ipp_cmd_node *c_node;
  853. if (!ctx) {
  854. DRM_ERROR("invalid context.\n");
  855. return -EINVAL;
  856. }
  857. if (!cmd_ctrl) {
  858. DRM_ERROR("invalid control parameter.\n");
  859. return -EINVAL;
  860. }
  861. DRM_DEBUG_KMS("ctrl[%d]prop_id[%d]\n",
  862. cmd_ctrl->ctrl, cmd_ctrl->prop_id);
  863. ippdrv = ipp_find_drv_by_handle(cmd_ctrl->prop_id);
  864. if (IS_ERR(ippdrv)) {
  865. DRM_ERROR("failed to get ipp driver.\n");
  866. return PTR_ERR(ippdrv);
  867. }
  868. c_node = ipp_find_obj(&ctx->prop_idr, &ctx->prop_lock,
  869. cmd_ctrl->prop_id);
  870. if (!c_node || c_node->filp != file) {
  871. DRM_ERROR("invalid command node list.\n");
  872. return -ENODEV;
  873. }
  874. if (!exynos_drm_ipp_check_valid(ippdrv->dev, cmd_ctrl->ctrl,
  875. c_node->state)) {
  876. DRM_ERROR("invalid state.\n");
  877. return -EINVAL;
  878. }
  879. switch (cmd_ctrl->ctrl) {
  880. case IPP_CTRL_PLAY:
  881. if (pm_runtime_suspended(ippdrv->dev))
  882. pm_runtime_get_sync(ippdrv->dev);
  883. c_node->state = IPP_STATE_START;
  884. cmd_work = c_node->start_work;
  885. cmd_work->ctrl = cmd_ctrl->ctrl;
  886. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  887. break;
  888. case IPP_CTRL_STOP:
  889. cmd_work = c_node->stop_work;
  890. cmd_work->ctrl = cmd_ctrl->ctrl;
  891. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  892. if (!wait_for_completion_timeout(&c_node->stop_complete,
  893. msecs_to_jiffies(300))) {
  894. DRM_ERROR("timeout stop:prop_id[%d]\n",
  895. c_node->property.prop_id);
  896. }
  897. c_node->state = IPP_STATE_STOP;
  898. ippdrv->dedicated = false;
  899. mutex_lock(&ippdrv->cmd_lock);
  900. ipp_clean_cmd_node(ctx, c_node);
  901. if (list_empty(&ippdrv->cmd_list))
  902. pm_runtime_put_sync(ippdrv->dev);
  903. mutex_unlock(&ippdrv->cmd_lock);
  904. break;
  905. case IPP_CTRL_PAUSE:
  906. cmd_work = c_node->stop_work;
  907. cmd_work->ctrl = cmd_ctrl->ctrl;
  908. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  909. if (!wait_for_completion_timeout(&c_node->stop_complete,
  910. msecs_to_jiffies(200))) {
  911. DRM_ERROR("timeout stop:prop_id[%d]\n",
  912. c_node->property.prop_id);
  913. }
  914. c_node->state = IPP_STATE_STOP;
  915. break;
  916. case IPP_CTRL_RESUME:
  917. c_node->state = IPP_STATE_START;
  918. cmd_work = c_node->start_work;
  919. cmd_work->ctrl = cmd_ctrl->ctrl;
  920. ipp_handle_cmd_work(dev, ippdrv, cmd_work, c_node);
  921. break;
  922. default:
  923. DRM_ERROR("could not support this state currently.\n");
  924. return -EINVAL;
  925. }
  926. DRM_DEBUG_KMS("done ctrl[%d]prop_id[%d]\n",
  927. cmd_ctrl->ctrl, cmd_ctrl->prop_id);
  928. return 0;
  929. }
  930. int exynos_drm_ippnb_register(struct notifier_block *nb)
  931. {
  932. return blocking_notifier_chain_register(
  933. &exynos_drm_ippnb_list, nb);
  934. }
  935. int exynos_drm_ippnb_unregister(struct notifier_block *nb)
  936. {
  937. return blocking_notifier_chain_unregister(
  938. &exynos_drm_ippnb_list, nb);
  939. }
  940. int exynos_drm_ippnb_send_event(unsigned long val, void *v)
  941. {
  942. return blocking_notifier_call_chain(
  943. &exynos_drm_ippnb_list, val, v);
  944. }
  945. static int ipp_set_property(struct exynos_drm_ippdrv *ippdrv,
  946. struct drm_exynos_ipp_property *property)
  947. {
  948. struct exynos_drm_ipp_ops *ops = NULL;
  949. bool swap = false;
  950. int ret, i;
  951. if (!property) {
  952. DRM_ERROR("invalid property parameter.\n");
  953. return -EINVAL;
  954. }
  955. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  956. /* reset h/w block */
  957. if (ippdrv->reset &&
  958. ippdrv->reset(ippdrv->dev)) {
  959. return -EINVAL;
  960. }
  961. /* set source,destination operations */
  962. for_each_ipp_ops(i) {
  963. struct drm_exynos_ipp_config *config =
  964. &property->config[i];
  965. ops = ippdrv->ops[i];
  966. if (!ops || !config) {
  967. DRM_ERROR("not support ops and config.\n");
  968. return -EINVAL;
  969. }
  970. /* set format */
  971. if (ops->set_fmt) {
  972. ret = ops->set_fmt(ippdrv->dev, config->fmt);
  973. if (ret)
  974. return ret;
  975. }
  976. /* set transform for rotation, flip */
  977. if (ops->set_transf) {
  978. ret = ops->set_transf(ippdrv->dev, config->degree,
  979. config->flip, &swap);
  980. if (ret)
  981. return ret;
  982. }
  983. /* set size */
  984. if (ops->set_size) {
  985. ret = ops->set_size(ippdrv->dev, swap, &config->pos,
  986. &config->sz);
  987. if (ret)
  988. return ret;
  989. }
  990. }
  991. return 0;
  992. }
  993. static int ipp_start_property(struct exynos_drm_ippdrv *ippdrv,
  994. struct drm_exynos_ipp_cmd_node *c_node)
  995. {
  996. struct drm_exynos_ipp_mem_node *m_node;
  997. struct drm_exynos_ipp_property *property = &c_node->property;
  998. struct list_head *head;
  999. int ret, i;
  1000. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  1001. /* store command info in ippdrv */
  1002. ippdrv->c_node = c_node;
  1003. mutex_lock(&c_node->mem_lock);
  1004. if (!ipp_check_mem_list(c_node)) {
  1005. DRM_DEBUG_KMS("empty memory.\n");
  1006. ret = -ENOMEM;
  1007. goto err_unlock;
  1008. }
  1009. /* set current property in ippdrv */
  1010. ret = ipp_set_property(ippdrv, property);
  1011. if (ret) {
  1012. DRM_ERROR("failed to set property.\n");
  1013. ippdrv->c_node = NULL;
  1014. goto err_unlock;
  1015. }
  1016. /* check command */
  1017. switch (property->cmd) {
  1018. case IPP_CMD_M2M:
  1019. for_each_ipp_ops(i) {
  1020. /* source/destination memory list */
  1021. head = &c_node->mem_list[i];
  1022. m_node = list_first_entry(head,
  1023. struct drm_exynos_ipp_mem_node, list);
  1024. DRM_DEBUG_KMS("m_node[%pK]\n", m_node);
  1025. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1026. if (ret) {
  1027. DRM_ERROR("failed to set m node.\n");
  1028. goto err_unlock;
  1029. }
  1030. }
  1031. break;
  1032. case IPP_CMD_WB:
  1033. /* destination memory list */
  1034. head = &c_node->mem_list[EXYNOS_DRM_OPS_DST];
  1035. list_for_each_entry(m_node, head, list) {
  1036. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1037. if (ret) {
  1038. DRM_ERROR("failed to set m node.\n");
  1039. goto err_unlock;
  1040. }
  1041. }
  1042. break;
  1043. case IPP_CMD_OUTPUT:
  1044. /* source memory list */
  1045. head = &c_node->mem_list[EXYNOS_DRM_OPS_SRC];
  1046. list_for_each_entry(m_node, head, list) {
  1047. ret = ipp_set_mem_node(ippdrv, c_node, m_node);
  1048. if (ret) {
  1049. DRM_ERROR("failed to set m node.\n");
  1050. goto err_unlock;
  1051. }
  1052. }
  1053. break;
  1054. default:
  1055. DRM_ERROR("invalid operations.\n");
  1056. ret = -EINVAL;
  1057. goto err_unlock;
  1058. }
  1059. mutex_unlock(&c_node->mem_lock);
  1060. DRM_DEBUG_KMS("cmd[%d]\n", property->cmd);
  1061. /* start operations */
  1062. if (ippdrv->start) {
  1063. ret = ippdrv->start(ippdrv->dev, property->cmd);
  1064. if (ret) {
  1065. DRM_ERROR("failed to start ops.\n");
  1066. ippdrv->c_node = NULL;
  1067. return ret;
  1068. }
  1069. }
  1070. return 0;
  1071. err_unlock:
  1072. mutex_unlock(&c_node->mem_lock);
  1073. ippdrv->c_node = NULL;
  1074. return ret;
  1075. }
  1076. static int ipp_stop_property(struct drm_device *drm_dev,
  1077. struct exynos_drm_ippdrv *ippdrv,
  1078. struct drm_exynos_ipp_cmd_node *c_node)
  1079. {
  1080. struct drm_exynos_ipp_property *property = &c_node->property;
  1081. int i;
  1082. DRM_DEBUG_KMS("prop_id[%d]\n", property->prop_id);
  1083. /* stop operations */
  1084. if (ippdrv->stop)
  1085. ippdrv->stop(ippdrv->dev, property->cmd);
  1086. /* check command */
  1087. switch (property->cmd) {
  1088. case IPP_CMD_M2M:
  1089. for_each_ipp_ops(i)
  1090. ipp_clean_mem_nodes(drm_dev, c_node, i);
  1091. break;
  1092. case IPP_CMD_WB:
  1093. ipp_clean_mem_nodes(drm_dev, c_node, EXYNOS_DRM_OPS_DST);
  1094. break;
  1095. case IPP_CMD_OUTPUT:
  1096. ipp_clean_mem_nodes(drm_dev, c_node, EXYNOS_DRM_OPS_SRC);
  1097. break;
  1098. default:
  1099. DRM_ERROR("invalid operations.\n");
  1100. return -EINVAL;
  1101. }
  1102. return 0;
  1103. }
  1104. void ipp_sched_cmd(struct work_struct *work)
  1105. {
  1106. struct drm_exynos_ipp_cmd_work *cmd_work =
  1107. container_of(work, struct drm_exynos_ipp_cmd_work, work);
  1108. struct exynos_drm_ippdrv *ippdrv;
  1109. struct drm_exynos_ipp_cmd_node *c_node;
  1110. struct drm_exynos_ipp_property *property;
  1111. int ret;
  1112. ippdrv = cmd_work->ippdrv;
  1113. if (!ippdrv) {
  1114. DRM_ERROR("invalid ippdrv list.\n");
  1115. return;
  1116. }
  1117. c_node = cmd_work->c_node;
  1118. if (!c_node) {
  1119. DRM_ERROR("invalid command node list.\n");
  1120. return;
  1121. }
  1122. mutex_lock(&c_node->lock);
  1123. property = &c_node->property;
  1124. switch (cmd_work->ctrl) {
  1125. case IPP_CTRL_PLAY:
  1126. case IPP_CTRL_RESUME:
  1127. ret = ipp_start_property(ippdrv, c_node);
  1128. if (ret) {
  1129. DRM_ERROR("failed to start property:prop_id[%d]\n",
  1130. c_node->property.prop_id);
  1131. goto err_unlock;
  1132. }
  1133. /*
  1134. * M2M case supports wait_completion of transfer.
  1135. * because M2M case supports single unit operation
  1136. * with multiple queue.
  1137. * M2M need to wait completion of data transfer.
  1138. */
  1139. if (ipp_is_m2m_cmd(property->cmd)) {
  1140. if (!wait_for_completion_timeout
  1141. (&c_node->start_complete, msecs_to_jiffies(200))) {
  1142. DRM_ERROR("timeout event:prop_id[%d]\n",
  1143. c_node->property.prop_id);
  1144. goto err_unlock;
  1145. }
  1146. }
  1147. break;
  1148. case IPP_CTRL_STOP:
  1149. case IPP_CTRL_PAUSE:
  1150. ret = ipp_stop_property(ippdrv->drm_dev, ippdrv,
  1151. c_node);
  1152. if (ret) {
  1153. DRM_ERROR("failed to stop property.\n");
  1154. goto err_unlock;
  1155. }
  1156. complete(&c_node->stop_complete);
  1157. break;
  1158. default:
  1159. DRM_ERROR("unknown control type\n");
  1160. break;
  1161. }
  1162. DRM_DEBUG_KMS("ctrl[%d] done.\n", cmd_work->ctrl);
  1163. err_unlock:
  1164. mutex_unlock(&c_node->lock);
  1165. }
  1166. static int ipp_send_event(struct exynos_drm_ippdrv *ippdrv,
  1167. struct drm_exynos_ipp_cmd_node *c_node, int *buf_id)
  1168. {
  1169. struct drm_device *drm_dev = ippdrv->drm_dev;
  1170. struct drm_exynos_ipp_property *property = &c_node->property;
  1171. struct drm_exynos_ipp_mem_node *m_node;
  1172. struct drm_exynos_ipp_queue_buf qbuf;
  1173. struct drm_exynos_ipp_send_event *e;
  1174. struct list_head *head;
  1175. struct timeval now;
  1176. u32 tbuf_id[EXYNOS_DRM_OPS_MAX] = {0, };
  1177. int ret, i;
  1178. for_each_ipp_ops(i)
  1179. DRM_DEBUG_KMS("%s buf_id[%d]\n", i ? "dst" : "src", buf_id[i]);
  1180. if (!drm_dev) {
  1181. DRM_ERROR("failed to get drm_dev.\n");
  1182. return -EINVAL;
  1183. }
  1184. if (!property) {
  1185. DRM_ERROR("failed to get property.\n");
  1186. return -EINVAL;
  1187. }
  1188. mutex_lock(&c_node->event_lock);
  1189. if (list_empty(&c_node->event_list)) {
  1190. DRM_DEBUG_KMS("event list is empty.\n");
  1191. ret = 0;
  1192. goto err_event_unlock;
  1193. }
  1194. mutex_lock(&c_node->mem_lock);
  1195. if (!ipp_check_mem_list(c_node)) {
  1196. DRM_DEBUG_KMS("empty memory.\n");
  1197. ret = 0;
  1198. goto err_mem_unlock;
  1199. }
  1200. /* check command */
  1201. switch (property->cmd) {
  1202. case IPP_CMD_M2M:
  1203. for_each_ipp_ops(i) {
  1204. /* source/destination memory list */
  1205. head = &c_node->mem_list[i];
  1206. m_node = list_first_entry(head,
  1207. struct drm_exynos_ipp_mem_node, list);
  1208. tbuf_id[i] = m_node->buf_id;
  1209. DRM_DEBUG_KMS("%s buf_id[%d]\n",
  1210. i ? "dst" : "src", tbuf_id[i]);
  1211. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1212. if (ret)
  1213. DRM_ERROR("failed to put m_node.\n");
  1214. }
  1215. break;
  1216. case IPP_CMD_WB:
  1217. /* clear buf for finding */
  1218. memset(&qbuf, 0x0, sizeof(qbuf));
  1219. qbuf.ops_id = EXYNOS_DRM_OPS_DST;
  1220. qbuf.buf_id = buf_id[EXYNOS_DRM_OPS_DST];
  1221. /* get memory node entry */
  1222. m_node = ipp_find_mem_node(c_node, &qbuf);
  1223. if (!m_node) {
  1224. DRM_ERROR("empty memory node.\n");
  1225. ret = -ENOMEM;
  1226. goto err_mem_unlock;
  1227. }
  1228. tbuf_id[EXYNOS_DRM_OPS_DST] = m_node->buf_id;
  1229. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1230. if (ret)
  1231. DRM_ERROR("failed to put m_node.\n");
  1232. break;
  1233. case IPP_CMD_OUTPUT:
  1234. /* source memory list */
  1235. head = &c_node->mem_list[EXYNOS_DRM_OPS_SRC];
  1236. m_node = list_first_entry(head,
  1237. struct drm_exynos_ipp_mem_node, list);
  1238. tbuf_id[EXYNOS_DRM_OPS_SRC] = m_node->buf_id;
  1239. ret = ipp_put_mem_node(drm_dev, c_node, m_node);
  1240. if (ret)
  1241. DRM_ERROR("failed to put m_node.\n");
  1242. break;
  1243. default:
  1244. DRM_ERROR("invalid operations.\n");
  1245. ret = -EINVAL;
  1246. goto err_mem_unlock;
  1247. }
  1248. mutex_unlock(&c_node->mem_lock);
  1249. if (tbuf_id[EXYNOS_DRM_OPS_DST] != buf_id[EXYNOS_DRM_OPS_DST])
  1250. DRM_ERROR("failed to match buf_id[%d %d]prop_id[%d]\n",
  1251. tbuf_id[1], buf_id[1], property->prop_id);
  1252. /*
  1253. * command node have event list of destination buffer
  1254. * If destination buffer enqueue to mem list,
  1255. * then we make event and link to event list tail.
  1256. * so, we get first event for first enqueued buffer.
  1257. */
  1258. e = list_first_entry(&c_node->event_list,
  1259. struct drm_exynos_ipp_send_event, base.link);
  1260. do_gettimeofday(&now);
  1261. DRM_DEBUG_KMS("tv_sec[%ld]tv_usec[%ld]\n", now.tv_sec, now.tv_usec);
  1262. e->event.tv_sec = now.tv_sec;
  1263. e->event.tv_usec = now.tv_usec;
  1264. e->event.prop_id = property->prop_id;
  1265. /* set buffer id about source destination */
  1266. for_each_ipp_ops(i)
  1267. e->event.buf_id[i] = tbuf_id[i];
  1268. drm_send_event(drm_dev, &e->base);
  1269. mutex_unlock(&c_node->event_lock);
  1270. DRM_DEBUG_KMS("done cmd[%d]prop_id[%d]buf_id[%d]\n",
  1271. property->cmd, property->prop_id, tbuf_id[EXYNOS_DRM_OPS_DST]);
  1272. return 0;
  1273. err_mem_unlock:
  1274. mutex_unlock(&c_node->mem_lock);
  1275. err_event_unlock:
  1276. mutex_unlock(&c_node->event_lock);
  1277. return ret;
  1278. }
  1279. void ipp_sched_event(struct work_struct *work)
  1280. {
  1281. struct drm_exynos_ipp_event_work *event_work =
  1282. container_of(work, struct drm_exynos_ipp_event_work, work);
  1283. struct exynos_drm_ippdrv *ippdrv;
  1284. struct drm_exynos_ipp_cmd_node *c_node;
  1285. int ret;
  1286. if (!event_work) {
  1287. DRM_ERROR("failed to get event_work.\n");
  1288. return;
  1289. }
  1290. DRM_DEBUG_KMS("buf_id[%d]\n", event_work->buf_id[EXYNOS_DRM_OPS_DST]);
  1291. ippdrv = event_work->ippdrv;
  1292. if (!ippdrv) {
  1293. DRM_ERROR("failed to get ipp driver.\n");
  1294. return;
  1295. }
  1296. c_node = ippdrv->c_node;
  1297. if (!c_node) {
  1298. DRM_ERROR("failed to get command node.\n");
  1299. return;
  1300. }
  1301. /*
  1302. * IPP supports command thread, event thread synchronization.
  1303. * If IPP close immediately from user land, then IPP make
  1304. * synchronization with command thread, so make complete event.
  1305. * or going out operations.
  1306. */
  1307. if (c_node->state != IPP_STATE_START) {
  1308. DRM_DEBUG_KMS("bypass state[%d]prop_id[%d]\n",
  1309. c_node->state, c_node->property.prop_id);
  1310. goto err_completion;
  1311. }
  1312. ret = ipp_send_event(ippdrv, c_node, event_work->buf_id);
  1313. if (ret) {
  1314. DRM_ERROR("failed to send event.\n");
  1315. goto err_completion;
  1316. }
  1317. err_completion:
  1318. if (ipp_is_m2m_cmd(c_node->property.cmd))
  1319. complete(&c_node->start_complete);
  1320. }
  1321. static int ipp_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
  1322. {
  1323. struct ipp_context *ctx = get_ipp_context(dev);
  1324. struct exynos_drm_ippdrv *ippdrv;
  1325. int ret, count = 0;
  1326. /* get ipp driver entry */
  1327. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  1328. ippdrv->drm_dev = drm_dev;
  1329. ret = ipp_create_id(&ctx->ipp_idr, &ctx->ipp_lock, ippdrv);
  1330. if (ret < 0) {
  1331. DRM_ERROR("failed to create id.\n");
  1332. goto err;
  1333. }
  1334. ippdrv->prop_list.ipp_id = ret;
  1335. DRM_DEBUG_KMS("count[%d]ippdrv[%pK]ipp_id[%d]\n",
  1336. count++, ippdrv, ret);
  1337. /* store parent device for node */
  1338. ippdrv->parent_dev = dev;
  1339. /* store event work queue and handler */
  1340. ippdrv->event_workq = ctx->event_workq;
  1341. ippdrv->sched_event = ipp_sched_event;
  1342. INIT_LIST_HEAD(&ippdrv->cmd_list);
  1343. mutex_init(&ippdrv->cmd_lock);
  1344. ret = drm_iommu_attach_device(drm_dev, ippdrv->dev);
  1345. if (ret) {
  1346. DRM_ERROR("failed to activate iommu\n");
  1347. goto err;
  1348. }
  1349. }
  1350. return 0;
  1351. err:
  1352. /* get ipp driver entry */
  1353. list_for_each_entry_continue_reverse(ippdrv, &exynos_drm_ippdrv_list,
  1354. drv_list) {
  1355. drm_iommu_detach_device(drm_dev, ippdrv->dev);
  1356. ipp_remove_id(&ctx->ipp_idr, &ctx->ipp_lock,
  1357. ippdrv->prop_list.ipp_id);
  1358. }
  1359. return ret;
  1360. }
  1361. static void ipp_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
  1362. {
  1363. struct exynos_drm_ippdrv *ippdrv, *t;
  1364. struct ipp_context *ctx = get_ipp_context(dev);
  1365. /* get ipp driver entry */
  1366. list_for_each_entry_safe(ippdrv, t, &exynos_drm_ippdrv_list, drv_list) {
  1367. drm_iommu_detach_device(drm_dev, ippdrv->dev);
  1368. ipp_remove_id(&ctx->ipp_idr, &ctx->ipp_lock,
  1369. ippdrv->prop_list.ipp_id);
  1370. ippdrv->drm_dev = NULL;
  1371. exynos_drm_ippdrv_unregister(ippdrv);
  1372. }
  1373. }
  1374. static int ipp_subdrv_open(struct drm_device *drm_dev, struct device *dev,
  1375. struct drm_file *file)
  1376. {
  1377. struct drm_exynos_file_private *file_priv = file->driver_priv;
  1378. file_priv->ipp_dev = dev;
  1379. DRM_DEBUG_KMS("done priv[%pK]\n", dev);
  1380. return 0;
  1381. }
  1382. static void ipp_subdrv_close(struct drm_device *drm_dev, struct device *dev,
  1383. struct drm_file *file)
  1384. {
  1385. struct exynos_drm_ippdrv *ippdrv = NULL;
  1386. struct ipp_context *ctx = get_ipp_context(dev);
  1387. struct drm_exynos_ipp_cmd_node *c_node, *tc_node;
  1388. int count = 0;
  1389. list_for_each_entry(ippdrv, &exynos_drm_ippdrv_list, drv_list) {
  1390. mutex_lock(&ippdrv->cmd_lock);
  1391. list_for_each_entry_safe(c_node, tc_node,
  1392. &ippdrv->cmd_list, list) {
  1393. DRM_DEBUG_KMS("count[%d]ippdrv[%pK]\n",
  1394. count++, ippdrv);
  1395. if (c_node->filp == file) {
  1396. /*
  1397. * userland goto unnormal state. process killed.
  1398. * and close the file.
  1399. * so, IPP didn't called stop cmd ctrl.
  1400. * so, we are make stop operation in this state.
  1401. */
  1402. if (c_node->state == IPP_STATE_START) {
  1403. ipp_stop_property(drm_dev, ippdrv,
  1404. c_node);
  1405. c_node->state = IPP_STATE_STOP;
  1406. }
  1407. ippdrv->dedicated = false;
  1408. ipp_clean_cmd_node(ctx, c_node);
  1409. if (list_empty(&ippdrv->cmd_list))
  1410. pm_runtime_put_sync(ippdrv->dev);
  1411. }
  1412. }
  1413. mutex_unlock(&ippdrv->cmd_lock);
  1414. }
  1415. return;
  1416. }
  1417. static int ipp_probe(struct platform_device *pdev)
  1418. {
  1419. struct device *dev = &pdev->dev;
  1420. struct ipp_context *ctx;
  1421. struct exynos_drm_subdrv *subdrv;
  1422. int ret;
  1423. ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
  1424. if (!ctx)
  1425. return -ENOMEM;
  1426. mutex_init(&ctx->ipp_lock);
  1427. mutex_init(&ctx->prop_lock);
  1428. idr_init(&ctx->ipp_idr);
  1429. idr_init(&ctx->prop_idr);
  1430. /*
  1431. * create single thread for ipp event
  1432. * IPP supports event thread for IPP drivers.
  1433. * IPP driver send event_work to this thread.
  1434. * and IPP event thread send event to user process.
  1435. */
  1436. ctx->event_workq = create_singlethread_workqueue("ipp_event");
  1437. if (!ctx->event_workq) {
  1438. dev_err(dev, "failed to create event workqueue\n");
  1439. return -EINVAL;
  1440. }
  1441. /*
  1442. * create single thread for ipp command
  1443. * IPP supports command thread for user process.
  1444. * user process make command node using set property ioctl.
  1445. * and make start_work and send this work to command thread.
  1446. * and then this command thread start property.
  1447. */
  1448. ctx->cmd_workq = create_singlethread_workqueue("ipp_cmd");
  1449. if (!ctx->cmd_workq) {
  1450. dev_err(dev, "failed to create cmd workqueue\n");
  1451. ret = -EINVAL;
  1452. goto err_event_workq;
  1453. }
  1454. /* set sub driver informations */
  1455. subdrv = &ctx->subdrv;
  1456. subdrv->dev = dev;
  1457. subdrv->probe = ipp_subdrv_probe;
  1458. subdrv->remove = ipp_subdrv_remove;
  1459. subdrv->open = ipp_subdrv_open;
  1460. subdrv->close = ipp_subdrv_close;
  1461. platform_set_drvdata(pdev, ctx);
  1462. ret = exynos_drm_subdrv_register(subdrv);
  1463. if (ret < 0) {
  1464. DRM_ERROR("failed to register drm ipp device.\n");
  1465. goto err_cmd_workq;
  1466. }
  1467. dev_info(dev, "drm ipp registered successfully.\n");
  1468. return 0;
  1469. err_cmd_workq:
  1470. destroy_workqueue(ctx->cmd_workq);
  1471. err_event_workq:
  1472. destroy_workqueue(ctx->event_workq);
  1473. return ret;
  1474. }
  1475. static int ipp_remove(struct platform_device *pdev)
  1476. {
  1477. struct ipp_context *ctx = platform_get_drvdata(pdev);
  1478. /* unregister sub driver */
  1479. exynos_drm_subdrv_unregister(&ctx->subdrv);
  1480. /* remove,destroy ipp idr */
  1481. idr_destroy(&ctx->ipp_idr);
  1482. idr_destroy(&ctx->prop_idr);
  1483. mutex_destroy(&ctx->ipp_lock);
  1484. mutex_destroy(&ctx->prop_lock);
  1485. /* destroy command, event work queue */
  1486. destroy_workqueue(ctx->cmd_workq);
  1487. destroy_workqueue(ctx->event_workq);
  1488. return 0;
  1489. }
  1490. struct platform_driver ipp_driver = {
  1491. .probe = ipp_probe,
  1492. .remove = ipp_remove,
  1493. .driver = {
  1494. .name = "exynos-drm-ipp",
  1495. .owner = THIS_MODULE,
  1496. },
  1497. };