mxgpu_ai.h 1.8 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #ifndef __MXGPU_AI_H__
  24. #define __MXGPU_AI_H__
  25. #define AI_MAILBOX_TIMEDOUT 5000
  26. enum idh_request {
  27. IDH_REQ_GPU_INIT_ACCESS = 1,
  28. IDH_REL_GPU_INIT_ACCESS,
  29. IDH_REQ_GPU_FINI_ACCESS,
  30. IDH_REL_GPU_FINI_ACCESS,
  31. IDH_REQ_GPU_RESET_ACCESS,
  32. IDH_LOG_VF_ERROR = 200,
  33. };
  34. enum idh_event {
  35. IDH_CLR_MSG_BUF = 0,
  36. IDH_READY_TO_ACCESS_GPU,
  37. IDH_FLR_NOTIFICATION,
  38. IDH_FLR_NOTIFICATION_CMPL,
  39. IDH_EVENT_MAX
  40. };
  41. extern const struct amdgpu_virt_ops xgpu_ai_virt_ops;
  42. void xgpu_ai_mailbox_set_irq_funcs(struct amdgpu_device *adev);
  43. int xgpu_ai_mailbox_add_irq_id(struct amdgpu_device *adev);
  44. int xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev);
  45. void xgpu_ai_mailbox_put_irq(struct amdgpu_device *adev);
  46. #endif