fpga-region.c 16 KB

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  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/idr.h>
  21. #include <linux/kernel.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. /**
  28. * struct fpga_region - FPGA Region structure
  29. * @dev: FPGA Region device
  30. * @mutex: enforces exclusive reference to region
  31. * @bridge_list: list of FPGA bridges specified in region
  32. * @info: fpga image specific information
  33. */
  34. struct fpga_region {
  35. struct device dev;
  36. struct mutex mutex; /* for exclusive reference to region */
  37. struct list_head bridge_list;
  38. struct fpga_image_info *info;
  39. };
  40. #define to_fpga_region(d) container_of(d, struct fpga_region, dev)
  41. static DEFINE_IDA(fpga_region_ida);
  42. static struct class *fpga_region_class;
  43. static const struct of_device_id fpga_region_of_match[] = {
  44. { .compatible = "fpga-region", },
  45. {},
  46. };
  47. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  48. static int fpga_region_of_node_match(struct device *dev, const void *data)
  49. {
  50. return dev->of_node == data;
  51. }
  52. /**
  53. * fpga_region_find - find FPGA region
  54. * @np: device node of FPGA Region
  55. * Caller will need to put_device(&region->dev) when done.
  56. * Returns FPGA Region struct or NULL
  57. */
  58. static struct fpga_region *fpga_region_find(struct device_node *np)
  59. {
  60. struct device *dev;
  61. dev = class_find_device(fpga_region_class, NULL, np,
  62. fpga_region_of_node_match);
  63. if (!dev)
  64. return NULL;
  65. return to_fpga_region(dev);
  66. }
  67. /**
  68. * fpga_region_get - get an exclusive reference to a fpga region
  69. * @region: FPGA Region struct
  70. *
  71. * Caller should call fpga_region_put() when done with region.
  72. *
  73. * Return fpga_region struct if successful.
  74. * Return -EBUSY if someone already has a reference to the region.
  75. * Return -ENODEV if @np is not a FPGA Region.
  76. */
  77. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  78. {
  79. struct device *dev = &region->dev;
  80. if (!mutex_trylock(&region->mutex)) {
  81. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  82. return ERR_PTR(-EBUSY);
  83. }
  84. get_device(dev);
  85. of_node_get(dev->of_node);
  86. if (!try_module_get(dev->parent->driver->owner)) {
  87. of_node_put(dev->of_node);
  88. put_device(dev);
  89. mutex_unlock(&region->mutex);
  90. return ERR_PTR(-ENODEV);
  91. }
  92. dev_dbg(&region->dev, "get\n");
  93. return region;
  94. }
  95. /**
  96. * fpga_region_put - release a reference to a region
  97. *
  98. * @region: FPGA region
  99. */
  100. static void fpga_region_put(struct fpga_region *region)
  101. {
  102. struct device *dev = &region->dev;
  103. dev_dbg(&region->dev, "put\n");
  104. module_put(dev->parent->driver->owner);
  105. of_node_put(dev->of_node);
  106. put_device(dev);
  107. mutex_unlock(&region->mutex);
  108. }
  109. /**
  110. * fpga_region_get_manager - get exclusive reference for FPGA manager
  111. * @region: FPGA region
  112. *
  113. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  114. *
  115. * Caller should call fpga_mgr_put() when done with manager.
  116. *
  117. * Return: fpga manager struct or IS_ERR() condition containing error code.
  118. */
  119. static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region)
  120. {
  121. struct device *dev = &region->dev;
  122. struct device_node *np = dev->of_node;
  123. struct device_node *mgr_node;
  124. struct fpga_manager *mgr;
  125. of_node_get(np);
  126. while (np) {
  127. if (of_device_is_compatible(np, "fpga-region")) {
  128. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  129. if (mgr_node) {
  130. mgr = of_fpga_mgr_get(mgr_node);
  131. of_node_put(mgr_node);
  132. of_node_put(np);
  133. return mgr;
  134. }
  135. }
  136. np = of_get_next_parent(np);
  137. }
  138. of_node_put(np);
  139. return ERR_PTR(-EINVAL);
  140. }
  141. /**
  142. * fpga_region_get_bridges - create a list of bridges
  143. * @region: FPGA region
  144. * @overlay: device node of the overlay
  145. *
  146. * Create a list of bridges including the parent bridge and the bridges
  147. * specified by "fpga-bridges" property. Note that the
  148. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  149. * if that happens.
  150. *
  151. * Caller should call fpga_bridges_put(&region->bridge_list) when
  152. * done with the bridges.
  153. *
  154. * Return 0 for success (even if there are no bridges specified)
  155. * or -EBUSY if any of the bridges are in use.
  156. */
  157. static int fpga_region_get_bridges(struct fpga_region *region,
  158. struct device_node *overlay)
  159. {
  160. struct device *dev = &region->dev;
  161. struct device_node *region_np = dev->of_node;
  162. struct device_node *br, *np, *parent_br = NULL;
  163. int i, ret;
  164. /* If parent is a bridge, add to list */
  165. ret = fpga_bridge_get_to_list(region_np->parent, region->info,
  166. &region->bridge_list);
  167. if (ret == -EBUSY)
  168. return ret;
  169. if (!ret)
  170. parent_br = region_np->parent;
  171. /* If overlay has a list of bridges, use it. */
  172. br = of_parse_phandle(overlay, "fpga-bridges", 0);
  173. if (br) {
  174. of_node_put(br);
  175. np = overlay;
  176. } else {
  177. np = region_np;
  178. }
  179. for (i = 0; ; i++) {
  180. br = of_parse_phandle(np, "fpga-bridges", i);
  181. if (!br)
  182. break;
  183. /* If parent bridge is in list, skip it. */
  184. if (br == parent_br) {
  185. of_node_put(br);
  186. continue;
  187. }
  188. /* If node is a bridge, get it and add to list */
  189. ret = fpga_bridge_get_to_list(br, region->info,
  190. &region->bridge_list);
  191. of_node_put(br);
  192. /* If any of the bridges are in use, give up */
  193. if (ret == -EBUSY) {
  194. fpga_bridges_put(&region->bridge_list);
  195. return -EBUSY;
  196. }
  197. }
  198. return 0;
  199. }
  200. /**
  201. * fpga_region_program_fpga - program FPGA
  202. * @region: FPGA region
  203. * @firmware_name: name of FPGA image firmware file
  204. * @overlay: device node of the overlay
  205. * Program an FPGA using information in the device tree.
  206. * Function assumes that there is a firmware-name property.
  207. * Return 0 for success or negative error code.
  208. */
  209. static int fpga_region_program_fpga(struct fpga_region *region,
  210. const char *firmware_name,
  211. struct device_node *overlay)
  212. {
  213. struct fpga_manager *mgr;
  214. int ret;
  215. region = fpga_region_get(region);
  216. if (IS_ERR(region)) {
  217. pr_err("failed to get fpga region\n");
  218. return PTR_ERR(region);
  219. }
  220. mgr = fpga_region_get_manager(region);
  221. if (IS_ERR(mgr)) {
  222. pr_err("failed to get fpga region manager\n");
  223. ret = PTR_ERR(mgr);
  224. goto err_put_region;
  225. }
  226. ret = fpga_region_get_bridges(region, overlay);
  227. if (ret) {
  228. pr_err("failed to get fpga region bridges\n");
  229. goto err_put_mgr;
  230. }
  231. ret = fpga_bridges_disable(&region->bridge_list);
  232. if (ret) {
  233. pr_err("failed to disable region bridges\n");
  234. goto err_put_br;
  235. }
  236. ret = fpga_mgr_firmware_load(mgr, region->info, firmware_name);
  237. if (ret) {
  238. pr_err("failed to load fpga image\n");
  239. goto err_put_br;
  240. }
  241. ret = fpga_bridges_enable(&region->bridge_list);
  242. if (ret) {
  243. pr_err("failed to enable region bridges\n");
  244. goto err_put_br;
  245. }
  246. fpga_mgr_put(mgr);
  247. fpga_region_put(region);
  248. return 0;
  249. err_put_br:
  250. fpga_bridges_put(&region->bridge_list);
  251. err_put_mgr:
  252. fpga_mgr_put(mgr);
  253. err_put_region:
  254. fpga_region_put(region);
  255. return ret;
  256. }
  257. /**
  258. * child_regions_with_firmware
  259. * @overlay: device node of the overlay
  260. *
  261. * If the overlay adds child FPGA regions, they are not allowed to have
  262. * firmware-name property.
  263. *
  264. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  265. */
  266. static int child_regions_with_firmware(struct device_node *overlay)
  267. {
  268. struct device_node *child_region;
  269. const char *child_firmware_name;
  270. int ret = 0;
  271. of_node_get(overlay);
  272. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  273. while (child_region) {
  274. if (!of_property_read_string(child_region, "firmware-name",
  275. &child_firmware_name)) {
  276. ret = -EINVAL;
  277. break;
  278. }
  279. child_region = of_find_matching_node(child_region,
  280. fpga_region_of_match);
  281. }
  282. of_node_put(child_region);
  283. if (ret)
  284. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  285. child_region);
  286. return ret;
  287. }
  288. /**
  289. * fpga_region_notify_pre_apply - pre-apply overlay notification
  290. *
  291. * @region: FPGA region that the overlay was applied to
  292. * @nd: overlay notification data
  293. *
  294. * Called after when an overlay targeted to a FPGA Region is about to be
  295. * applied. Function will check the properties that will be added to the FPGA
  296. * region. If the checks pass, it will program the FPGA.
  297. *
  298. * The checks are:
  299. * The overlay must add either firmware-name or external-fpga-config property
  300. * to the FPGA Region.
  301. *
  302. * firmware-name : program the FPGA
  303. * external-fpga-config : FPGA is already programmed
  304. * encrypted-fpga-config : FPGA bitstream is encrypted
  305. *
  306. * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  307. * firmware-name property since those regions don't exist yet.
  308. *
  309. * If the overlay that breaks the rules, notifier returns an error and the
  310. * overlay is rejected before it goes into the main tree.
  311. *
  312. * Returns 0 for success or negative error code for failure.
  313. */
  314. static int fpga_region_notify_pre_apply(struct fpga_region *region,
  315. struct of_overlay_notify_data *nd)
  316. {
  317. const char *firmware_name = NULL;
  318. struct fpga_image_info *info;
  319. int ret;
  320. info = devm_kzalloc(&region->dev, sizeof(*info), GFP_KERNEL);
  321. if (!info)
  322. return -ENOMEM;
  323. region->info = info;
  324. /* Reject overlay if child FPGA Regions have firmware-name property */
  325. ret = child_regions_with_firmware(nd->overlay);
  326. if (ret)
  327. return ret;
  328. /* Read FPGA region properties from the overlay */
  329. if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
  330. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  331. if (of_property_read_bool(nd->overlay, "external-fpga-config"))
  332. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  333. if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
  334. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  335. of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
  336. of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
  337. &info->enable_timeout_us);
  338. of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
  339. &info->disable_timeout_us);
  340. of_property_read_u32(nd->overlay, "config-complete-timeout-us",
  341. &info->config_complete_timeout_us);
  342. /* If FPGA was externally programmed, don't specify firmware */
  343. if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
  344. pr_err("error: specified firmware and external-fpga-config");
  345. return -EINVAL;
  346. }
  347. /* FPGA is already configured externally. We're done. */
  348. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG)
  349. return 0;
  350. /* If we got this far, we should be programming the FPGA */
  351. if (!firmware_name) {
  352. pr_err("should specify firmware-name or external-fpga-config\n");
  353. return -EINVAL;
  354. }
  355. return fpga_region_program_fpga(region, firmware_name, nd->overlay);
  356. }
  357. /**
  358. * fpga_region_notify_post_remove - post-remove overlay notification
  359. *
  360. * @region: FPGA region that was targeted by the overlay that was removed
  361. * @nd: overlay notification data
  362. *
  363. * Called after an overlay has been removed if the overlay's target was a
  364. * FPGA region.
  365. */
  366. static void fpga_region_notify_post_remove(struct fpga_region *region,
  367. struct of_overlay_notify_data *nd)
  368. {
  369. fpga_bridges_disable(&region->bridge_list);
  370. fpga_bridges_put(&region->bridge_list);
  371. devm_kfree(&region->dev, region->info);
  372. region->info = NULL;
  373. }
  374. /**
  375. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  376. * @nb: notifier block
  377. * @action: notifier action
  378. * @arg: reconfig data
  379. *
  380. * This notifier handles programming a FPGA when a "firmware-name" property is
  381. * added to a fpga-region.
  382. *
  383. * Returns NOTIFY_OK or error if FPGA programming fails.
  384. */
  385. static int of_fpga_region_notify(struct notifier_block *nb,
  386. unsigned long action, void *arg)
  387. {
  388. struct of_overlay_notify_data *nd = arg;
  389. struct fpga_region *region;
  390. int ret;
  391. switch (action) {
  392. case OF_OVERLAY_PRE_APPLY:
  393. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  394. break;
  395. case OF_OVERLAY_POST_APPLY:
  396. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  397. return NOTIFY_OK; /* not for us */
  398. case OF_OVERLAY_PRE_REMOVE:
  399. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  400. return NOTIFY_OK; /* not for us */
  401. case OF_OVERLAY_POST_REMOVE:
  402. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  403. break;
  404. default: /* should not happen */
  405. return NOTIFY_OK;
  406. }
  407. region = fpga_region_find(nd->target);
  408. if (!region)
  409. return NOTIFY_OK;
  410. ret = 0;
  411. switch (action) {
  412. case OF_OVERLAY_PRE_APPLY:
  413. ret = fpga_region_notify_pre_apply(region, nd);
  414. break;
  415. case OF_OVERLAY_POST_REMOVE:
  416. fpga_region_notify_post_remove(region, nd);
  417. break;
  418. }
  419. put_device(&region->dev);
  420. if (ret)
  421. return notifier_from_errno(ret);
  422. return NOTIFY_OK;
  423. }
  424. static struct notifier_block fpga_region_of_nb = {
  425. .notifier_call = of_fpga_region_notify,
  426. };
  427. static int fpga_region_probe(struct platform_device *pdev)
  428. {
  429. struct device *dev = &pdev->dev;
  430. struct device_node *np = dev->of_node;
  431. struct fpga_region *region;
  432. int id, ret = 0;
  433. region = kzalloc(sizeof(*region), GFP_KERNEL);
  434. if (!region)
  435. return -ENOMEM;
  436. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  437. if (id < 0) {
  438. ret = id;
  439. goto err_kfree;
  440. }
  441. mutex_init(&region->mutex);
  442. INIT_LIST_HEAD(&region->bridge_list);
  443. device_initialize(&region->dev);
  444. region->dev.class = fpga_region_class;
  445. region->dev.parent = dev;
  446. region->dev.of_node = np;
  447. region->dev.id = id;
  448. dev_set_drvdata(dev, region);
  449. ret = dev_set_name(&region->dev, "region%d", id);
  450. if (ret)
  451. goto err_remove;
  452. ret = device_add(&region->dev);
  453. if (ret)
  454. goto err_remove;
  455. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  456. dev_info(dev, "FPGA Region probed\n");
  457. return 0;
  458. err_remove:
  459. ida_simple_remove(&fpga_region_ida, id);
  460. err_kfree:
  461. kfree(region);
  462. return ret;
  463. }
  464. static int fpga_region_remove(struct platform_device *pdev)
  465. {
  466. struct fpga_region *region = platform_get_drvdata(pdev);
  467. device_unregister(&region->dev);
  468. return 0;
  469. }
  470. static struct platform_driver fpga_region_driver = {
  471. .probe = fpga_region_probe,
  472. .remove = fpga_region_remove,
  473. .driver = {
  474. .name = "fpga-region",
  475. .of_match_table = of_match_ptr(fpga_region_of_match),
  476. },
  477. };
  478. static void fpga_region_dev_release(struct device *dev)
  479. {
  480. struct fpga_region *region = to_fpga_region(dev);
  481. ida_simple_remove(&fpga_region_ida, region->dev.id);
  482. kfree(region);
  483. }
  484. /**
  485. * fpga_region_init - init function for fpga_region class
  486. * Creates the fpga_region class and registers a reconfig notifier.
  487. */
  488. static int __init fpga_region_init(void)
  489. {
  490. int ret;
  491. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  492. if (IS_ERR(fpga_region_class))
  493. return PTR_ERR(fpga_region_class);
  494. fpga_region_class->dev_release = fpga_region_dev_release;
  495. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  496. if (ret)
  497. goto err_class;
  498. ret = platform_driver_register(&fpga_region_driver);
  499. if (ret)
  500. goto err_plat;
  501. return 0;
  502. err_plat:
  503. of_overlay_notifier_unregister(&fpga_region_of_nb);
  504. err_class:
  505. class_destroy(fpga_region_class);
  506. ida_destroy(&fpga_region_ida);
  507. return ret;
  508. }
  509. static void __exit fpga_region_exit(void)
  510. {
  511. platform_driver_unregister(&fpga_region_driver);
  512. of_overlay_notifier_unregister(&fpga_region_of_nb);
  513. class_destroy(fpga_region_class);
  514. ida_destroy(&fpga_region_ida);
  515. }
  516. subsys_initcall(fpga_region_init);
  517. module_exit(fpga_region_exit);
  518. MODULE_DESCRIPTION("FPGA Region");
  519. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  520. MODULE_LICENSE("GPL v2");