core-iso.c 10 KB

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  1. /*
  2. * Isochronous I/O functionality:
  3. * - Isochronous DMA context management
  4. * - Isochronous bus resource management (channels, bandwidth), client side
  5. *
  6. * Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  21. */
  22. #include <linux/dma-mapping.h>
  23. #include <linux/errno.h>
  24. #include <linux/firewire.h>
  25. #include <linux/firewire-constants.h>
  26. #include <linux/kernel.h>
  27. #include <linux/mm.h>
  28. #include <linux/slab.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/vmalloc.h>
  31. #include <linux/export.h>
  32. #include <asm/byteorder.h>
  33. #include "core.h"
  34. /*
  35. * Isochronous DMA context management
  36. */
  37. int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count)
  38. {
  39. int i;
  40. buffer->page_count = 0;
  41. buffer->page_count_mapped = 0;
  42. buffer->pages = kmalloc(page_count * sizeof(buffer->pages[0]),
  43. GFP_KERNEL);
  44. if (buffer->pages == NULL)
  45. return -ENOMEM;
  46. for (i = 0; i < page_count; i++) {
  47. buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
  48. if (buffer->pages[i] == NULL)
  49. break;
  50. }
  51. buffer->page_count = i;
  52. if (i < page_count) {
  53. fw_iso_buffer_destroy(buffer, NULL);
  54. return -ENOMEM;
  55. }
  56. return 0;
  57. }
  58. int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card,
  59. enum dma_data_direction direction)
  60. {
  61. dma_addr_t address;
  62. int i;
  63. buffer->direction = direction;
  64. for (i = 0; i < buffer->page_count; i++) {
  65. address = dma_map_page(card->device, buffer->pages[i],
  66. 0, PAGE_SIZE, direction);
  67. if (dma_mapping_error(card->device, address))
  68. break;
  69. set_page_private(buffer->pages[i], address);
  70. }
  71. buffer->page_count_mapped = i;
  72. if (i < buffer->page_count)
  73. return -ENOMEM;
  74. return 0;
  75. }
  76. int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,
  77. int page_count, enum dma_data_direction direction)
  78. {
  79. int ret;
  80. ret = fw_iso_buffer_alloc(buffer, page_count);
  81. if (ret < 0)
  82. return ret;
  83. ret = fw_iso_buffer_map_dma(buffer, card, direction);
  84. if (ret < 0)
  85. fw_iso_buffer_destroy(buffer, card);
  86. return ret;
  87. }
  88. EXPORT_SYMBOL(fw_iso_buffer_init);
  89. int fw_iso_buffer_map_vma(struct fw_iso_buffer *buffer,
  90. struct vm_area_struct *vma)
  91. {
  92. unsigned long uaddr;
  93. int i, err;
  94. uaddr = vma->vm_start;
  95. for (i = 0; i < buffer->page_count; i++) {
  96. err = vm_insert_page(vma, uaddr, buffer->pages[i]);
  97. if (err)
  98. return err;
  99. uaddr += PAGE_SIZE;
  100. }
  101. return 0;
  102. }
  103. void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,
  104. struct fw_card *card)
  105. {
  106. int i;
  107. dma_addr_t address;
  108. for (i = 0; i < buffer->page_count_mapped; i++) {
  109. address = page_private(buffer->pages[i]);
  110. dma_unmap_page(card->device, address,
  111. PAGE_SIZE, buffer->direction);
  112. }
  113. for (i = 0; i < buffer->page_count; i++)
  114. __free_page(buffer->pages[i]);
  115. kfree(buffer->pages);
  116. buffer->pages = NULL;
  117. buffer->page_count = 0;
  118. buffer->page_count_mapped = 0;
  119. }
  120. EXPORT_SYMBOL(fw_iso_buffer_destroy);
  121. /* Convert DMA address to offset into virtually contiguous buffer. */
  122. size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed)
  123. {
  124. size_t i;
  125. dma_addr_t address;
  126. ssize_t offset;
  127. for (i = 0; i < buffer->page_count; i++) {
  128. address = page_private(buffer->pages[i]);
  129. offset = (ssize_t)completed - (ssize_t)address;
  130. if (offset > 0 && offset <= PAGE_SIZE)
  131. return (i << PAGE_SHIFT) + offset;
  132. }
  133. return 0;
  134. }
  135. struct fw_iso_context *fw_iso_context_create(struct fw_card *card,
  136. int type, int channel, int speed, size_t header_size,
  137. fw_iso_callback_t callback, void *callback_data)
  138. {
  139. struct fw_iso_context *ctx;
  140. ctx = card->driver->allocate_iso_context(card,
  141. type, channel, header_size);
  142. if (IS_ERR(ctx))
  143. return ctx;
  144. ctx->card = card;
  145. ctx->type = type;
  146. ctx->channel = channel;
  147. ctx->speed = speed;
  148. ctx->header_size = header_size;
  149. ctx->callback.sc = callback;
  150. ctx->callback_data = callback_data;
  151. return ctx;
  152. }
  153. EXPORT_SYMBOL(fw_iso_context_create);
  154. void fw_iso_context_destroy(struct fw_iso_context *ctx)
  155. {
  156. ctx->card->driver->free_iso_context(ctx);
  157. }
  158. EXPORT_SYMBOL(fw_iso_context_destroy);
  159. int fw_iso_context_start(struct fw_iso_context *ctx,
  160. int cycle, int sync, int tags)
  161. {
  162. return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
  163. }
  164. EXPORT_SYMBOL(fw_iso_context_start);
  165. int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels)
  166. {
  167. return ctx->card->driver->set_iso_channels(ctx, channels);
  168. }
  169. int fw_iso_context_queue(struct fw_iso_context *ctx,
  170. struct fw_iso_packet *packet,
  171. struct fw_iso_buffer *buffer,
  172. unsigned long payload)
  173. {
  174. return ctx->card->driver->queue_iso(ctx, packet, buffer, payload);
  175. }
  176. EXPORT_SYMBOL(fw_iso_context_queue);
  177. void fw_iso_context_queue_flush(struct fw_iso_context *ctx)
  178. {
  179. ctx->card->driver->flush_queue_iso(ctx);
  180. }
  181. EXPORT_SYMBOL(fw_iso_context_queue_flush);
  182. int fw_iso_context_flush_completions(struct fw_iso_context *ctx)
  183. {
  184. return ctx->card->driver->flush_iso_completions(ctx);
  185. }
  186. EXPORT_SYMBOL(fw_iso_context_flush_completions);
  187. int fw_iso_context_stop(struct fw_iso_context *ctx)
  188. {
  189. return ctx->card->driver->stop_iso(ctx);
  190. }
  191. EXPORT_SYMBOL(fw_iso_context_stop);
  192. /*
  193. * Isochronous bus resource management (channels, bandwidth), client side
  194. */
  195. static int manage_bandwidth(struct fw_card *card, int irm_id, int generation,
  196. int bandwidth, bool allocate)
  197. {
  198. int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0;
  199. __be32 data[2];
  200. /*
  201. * On a 1394a IRM with low contention, try < 1 is enough.
  202. * On a 1394-1995 IRM, we need at least try < 2.
  203. * Let's just do try < 5.
  204. */
  205. for (try = 0; try < 5; try++) {
  206. new = allocate ? old - bandwidth : old + bandwidth;
  207. if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL)
  208. return -EBUSY;
  209. data[0] = cpu_to_be32(old);
  210. data[1] = cpu_to_be32(new);
  211. switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
  212. irm_id, generation, SCODE_100,
  213. CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE,
  214. data, 8)) {
  215. case RCODE_GENERATION:
  216. /* A generation change frees all bandwidth. */
  217. return allocate ? -EAGAIN : bandwidth;
  218. case RCODE_COMPLETE:
  219. if (be32_to_cpup(data) == old)
  220. return bandwidth;
  221. old = be32_to_cpup(data);
  222. /* Fall through. */
  223. }
  224. }
  225. return -EIO;
  226. }
  227. static int manage_channel(struct fw_card *card, int irm_id, int generation,
  228. u32 channels_mask, u64 offset, bool allocate)
  229. {
  230. __be32 bit, all, old;
  231. __be32 data[2];
  232. int channel, ret = -EIO, retry = 5;
  233. old = all = allocate ? cpu_to_be32(~0) : 0;
  234. for (channel = 0; channel < 32; channel++) {
  235. if (!(channels_mask & 1 << channel))
  236. continue;
  237. ret = -EBUSY;
  238. bit = cpu_to_be32(1 << (31 - channel));
  239. if ((old & bit) != (all & bit))
  240. continue;
  241. data[0] = old;
  242. data[1] = old ^ bit;
  243. switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
  244. irm_id, generation, SCODE_100,
  245. offset, data, 8)) {
  246. case RCODE_GENERATION:
  247. /* A generation change frees all channels. */
  248. return allocate ? -EAGAIN : channel;
  249. case RCODE_COMPLETE:
  250. if (data[0] == old)
  251. return channel;
  252. old = data[0];
  253. /* Is the IRM 1394a-2000 compliant? */
  254. if ((data[0] & bit) == (data[1] & bit))
  255. continue;
  256. /* 1394-1995 IRM, fall through to retry. */
  257. default:
  258. if (retry) {
  259. retry--;
  260. channel--;
  261. } else {
  262. ret = -EIO;
  263. }
  264. }
  265. }
  266. return ret;
  267. }
  268. static void deallocate_channel(struct fw_card *card, int irm_id,
  269. int generation, int channel)
  270. {
  271. u32 mask;
  272. u64 offset;
  273. mask = channel < 32 ? 1 << channel : 1 << (channel - 32);
  274. offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI :
  275. CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO;
  276. manage_channel(card, irm_id, generation, mask, offset, false);
  277. }
  278. /**
  279. * fw_iso_resource_manage() - Allocate or deallocate a channel and/or bandwidth
  280. *
  281. * In parameters: card, generation, channels_mask, bandwidth, allocate
  282. * Out parameters: channel, bandwidth
  283. * This function blocks (sleeps) during communication with the IRM.
  284. *
  285. * Allocates or deallocates at most one channel out of channels_mask.
  286. * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0.
  287. * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for
  288. * channel 0 and LSB for channel 63.)
  289. * Allocates or deallocates as many bandwidth allocation units as specified.
  290. *
  291. * Returns channel < 0 if no channel was allocated or deallocated.
  292. * Returns bandwidth = 0 if no bandwidth was allocated or deallocated.
  293. *
  294. * If generation is stale, deallocations succeed but allocations fail with
  295. * channel = -EAGAIN.
  296. *
  297. * If channel allocation fails, no bandwidth will be allocated either.
  298. * If bandwidth allocation fails, no channel will be allocated either.
  299. * But deallocations of channel and bandwidth are tried independently
  300. * of each other's success.
  301. */
  302. void fw_iso_resource_manage(struct fw_card *card, int generation,
  303. u64 channels_mask, int *channel, int *bandwidth,
  304. bool allocate)
  305. {
  306. u32 channels_hi = channels_mask; /* channels 31...0 */
  307. u32 channels_lo = channels_mask >> 32; /* channels 63...32 */
  308. int irm_id, ret, c = -EINVAL;
  309. spin_lock_irq(&card->lock);
  310. irm_id = card->irm_node->node_id;
  311. spin_unlock_irq(&card->lock);
  312. if (channels_hi)
  313. c = manage_channel(card, irm_id, generation, channels_hi,
  314. CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI,
  315. allocate);
  316. if (channels_lo && c < 0) {
  317. c = manage_channel(card, irm_id, generation, channels_lo,
  318. CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO,
  319. allocate);
  320. if (c >= 0)
  321. c += 32;
  322. }
  323. *channel = c;
  324. if (allocate && channels_mask != 0 && c < 0)
  325. *bandwidth = 0;
  326. if (*bandwidth == 0)
  327. return;
  328. ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate);
  329. if (ret < 0)
  330. *bandwidth = 0;
  331. if (allocate && ret < 0) {
  332. if (c >= 0)
  333. deallocate_channel(card, irm_id, generation, c);
  334. *channel = ret;
  335. }
  336. }
  337. EXPORT_SYMBOL(fw_iso_resource_manage);