ti-dma-crossbar.c 12 KB

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  1. /*
  2. * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
  3. * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. */
  10. #include <linux/slab.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/list.h>
  14. #include <linux/io.h>
  15. #include <linux/of_address.h>
  16. #include <linux/of_device.h>
  17. #include <linux/of_dma.h>
  18. #define TI_XBAR_DRA7 0
  19. #define TI_XBAR_AM335X 1
  20. static const u32 ti_xbar_type[] = {
  21. [TI_XBAR_DRA7] = TI_XBAR_DRA7,
  22. [TI_XBAR_AM335X] = TI_XBAR_AM335X,
  23. };
  24. static const struct of_device_id ti_dma_xbar_match[] = {
  25. {
  26. .compatible = "ti,dra7-dma-crossbar",
  27. .data = &ti_xbar_type[TI_XBAR_DRA7],
  28. },
  29. {
  30. .compatible = "ti,am335x-edma-crossbar",
  31. .data = &ti_xbar_type[TI_XBAR_AM335X],
  32. },
  33. {},
  34. };
  35. /* Crossbar on AM335x/AM437x family */
  36. #define TI_AM335X_XBAR_LINES 64
  37. struct ti_am335x_xbar_data {
  38. void __iomem *iomem;
  39. struct dma_router dmarouter;
  40. u32 xbar_events; /* maximum number of events to select in xbar */
  41. u32 dma_requests; /* number of DMA requests on eDMA */
  42. };
  43. struct ti_am335x_xbar_map {
  44. u16 dma_line;
  45. u8 mux_val;
  46. };
  47. static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val)
  48. {
  49. /*
  50. * TPCC_EVT_MUX_60_63 register layout is different than the
  51. * rest, in the sense, that event 63 is mapped to lowest byte
  52. * and event 60 is mapped to highest, handle it separately.
  53. */
  54. if (event >= 60 && event <= 63)
  55. writeb_relaxed(val, iomem + (63 - event % 4));
  56. else
  57. writeb_relaxed(val, iomem + event);
  58. }
  59. static void ti_am335x_xbar_free(struct device *dev, void *route_data)
  60. {
  61. struct ti_am335x_xbar_data *xbar = dev_get_drvdata(dev);
  62. struct ti_am335x_xbar_map *map = route_data;
  63. dev_dbg(dev, "Unmapping XBAR event %u on channel %u\n",
  64. map->mux_val, map->dma_line);
  65. ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0);
  66. kfree(map);
  67. }
  68. static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec,
  69. struct of_dma *ofdma)
  70. {
  71. struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
  72. struct ti_am335x_xbar_data *xbar = platform_get_drvdata(pdev);
  73. struct ti_am335x_xbar_map *map;
  74. if (dma_spec->args_count != 3)
  75. return ERR_PTR(-EINVAL);
  76. if (dma_spec->args[2] >= xbar->xbar_events) {
  77. dev_err(&pdev->dev, "Invalid XBAR event number: %d\n",
  78. dma_spec->args[2]);
  79. return ERR_PTR(-EINVAL);
  80. }
  81. if (dma_spec->args[0] >= xbar->dma_requests) {
  82. dev_err(&pdev->dev, "Invalid DMA request line number: %d\n",
  83. dma_spec->args[0]);
  84. return ERR_PTR(-EINVAL);
  85. }
  86. /* The of_node_put() will be done in the core for the node */
  87. dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
  88. if (!dma_spec->np) {
  89. dev_err(&pdev->dev, "Can't get DMA master\n");
  90. return ERR_PTR(-EINVAL);
  91. }
  92. map = kzalloc(sizeof(*map), GFP_KERNEL);
  93. if (!map) {
  94. of_node_put(dma_spec->np);
  95. return ERR_PTR(-ENOMEM);
  96. }
  97. map->dma_line = (u16)dma_spec->args[0];
  98. map->mux_val = (u8)dma_spec->args[2];
  99. dma_spec->args[2] = 0;
  100. dma_spec->args_count = 2;
  101. dev_dbg(&pdev->dev, "Mapping XBAR event%u to DMA%u\n",
  102. map->mux_val, map->dma_line);
  103. ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val);
  104. return map;
  105. }
  106. static const struct of_device_id ti_am335x_master_match[] = {
  107. { .compatible = "ti,edma3-tpcc", },
  108. {},
  109. };
  110. static int ti_am335x_xbar_probe(struct platform_device *pdev)
  111. {
  112. struct device_node *node = pdev->dev.of_node;
  113. const struct of_device_id *match;
  114. struct device_node *dma_node;
  115. struct ti_am335x_xbar_data *xbar;
  116. struct resource *res;
  117. void __iomem *iomem;
  118. int i, ret;
  119. if (!node)
  120. return -ENODEV;
  121. xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
  122. if (!xbar)
  123. return -ENOMEM;
  124. dma_node = of_parse_phandle(node, "dma-masters", 0);
  125. if (!dma_node) {
  126. dev_err(&pdev->dev, "Can't get DMA master node\n");
  127. return -ENODEV;
  128. }
  129. match = of_match_node(ti_am335x_master_match, dma_node);
  130. if (!match) {
  131. dev_err(&pdev->dev, "DMA master is not supported\n");
  132. of_node_put(dma_node);
  133. return -EINVAL;
  134. }
  135. if (of_property_read_u32(dma_node, "dma-requests",
  136. &xbar->dma_requests)) {
  137. dev_info(&pdev->dev,
  138. "Missing XBAR output information, using %u.\n",
  139. TI_AM335X_XBAR_LINES);
  140. xbar->dma_requests = TI_AM335X_XBAR_LINES;
  141. }
  142. of_node_put(dma_node);
  143. if (of_property_read_u32(node, "dma-requests", &xbar->xbar_events)) {
  144. dev_info(&pdev->dev,
  145. "Missing XBAR input information, using %u.\n",
  146. TI_AM335X_XBAR_LINES);
  147. xbar->xbar_events = TI_AM335X_XBAR_LINES;
  148. }
  149. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  150. iomem = devm_ioremap_resource(&pdev->dev, res);
  151. if (IS_ERR(iomem))
  152. return PTR_ERR(iomem);
  153. xbar->iomem = iomem;
  154. xbar->dmarouter.dev = &pdev->dev;
  155. xbar->dmarouter.route_free = ti_am335x_xbar_free;
  156. platform_set_drvdata(pdev, xbar);
  157. /* Reset the crossbar */
  158. for (i = 0; i < xbar->dma_requests; i++)
  159. ti_am335x_xbar_write(xbar->iomem, i, 0);
  160. ret = of_dma_router_register(node, ti_am335x_xbar_route_allocate,
  161. &xbar->dmarouter);
  162. return ret;
  163. }
  164. /* Crossbar on DRA7xx family */
  165. #define TI_DRA7_XBAR_OUTPUTS 127
  166. #define TI_DRA7_XBAR_INPUTS 256
  167. struct ti_dra7_xbar_data {
  168. void __iomem *iomem;
  169. struct dma_router dmarouter;
  170. struct mutex mutex;
  171. unsigned long *dma_inuse;
  172. u16 safe_val; /* Value to rest the crossbar lines */
  173. u32 xbar_requests; /* number of DMA requests connected to XBAR */
  174. u32 dma_requests; /* number of DMA requests forwarded to DMA */
  175. u32 dma_offset;
  176. };
  177. struct ti_dra7_xbar_map {
  178. u16 xbar_in;
  179. int xbar_out;
  180. };
  181. static inline void ti_dra7_xbar_write(void __iomem *iomem, int xbar, u16 val)
  182. {
  183. writew_relaxed(val, iomem + (xbar * 2));
  184. }
  185. static void ti_dra7_xbar_free(struct device *dev, void *route_data)
  186. {
  187. struct ti_dra7_xbar_data *xbar = dev_get_drvdata(dev);
  188. struct ti_dra7_xbar_map *map = route_data;
  189. dev_dbg(dev, "Unmapping XBAR%u (was routed to %d)\n",
  190. map->xbar_in, map->xbar_out);
  191. ti_dra7_xbar_write(xbar->iomem, map->xbar_out, xbar->safe_val);
  192. mutex_lock(&xbar->mutex);
  193. clear_bit(map->xbar_out, xbar->dma_inuse);
  194. mutex_unlock(&xbar->mutex);
  195. kfree(map);
  196. }
  197. static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec,
  198. struct of_dma *ofdma)
  199. {
  200. struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
  201. struct ti_dra7_xbar_data *xbar = platform_get_drvdata(pdev);
  202. struct ti_dra7_xbar_map *map;
  203. if (dma_spec->args[0] >= xbar->xbar_requests) {
  204. dev_err(&pdev->dev, "Invalid XBAR request number: %d\n",
  205. dma_spec->args[0]);
  206. return ERR_PTR(-EINVAL);
  207. }
  208. /* The of_node_put() will be done in the core for the node */
  209. dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
  210. if (!dma_spec->np) {
  211. dev_err(&pdev->dev, "Can't get DMA master\n");
  212. return ERR_PTR(-EINVAL);
  213. }
  214. map = kzalloc(sizeof(*map), GFP_KERNEL);
  215. if (!map) {
  216. of_node_put(dma_spec->np);
  217. return ERR_PTR(-ENOMEM);
  218. }
  219. mutex_lock(&xbar->mutex);
  220. map->xbar_out = find_first_zero_bit(xbar->dma_inuse,
  221. xbar->dma_requests);
  222. if (map->xbar_out == xbar->dma_requests) {
  223. mutex_unlock(&xbar->mutex);
  224. dev_err(&pdev->dev, "Run out of free DMA requests\n");
  225. kfree(map);
  226. return ERR_PTR(-ENOMEM);
  227. }
  228. set_bit(map->xbar_out, xbar->dma_inuse);
  229. mutex_unlock(&xbar->mutex);
  230. map->xbar_in = (u16)dma_spec->args[0];
  231. dma_spec->args[0] = map->xbar_out + xbar->dma_offset;
  232. dev_dbg(&pdev->dev, "Mapping XBAR%u to DMA%d\n",
  233. map->xbar_in, map->xbar_out);
  234. ti_dra7_xbar_write(xbar->iomem, map->xbar_out, map->xbar_in);
  235. return map;
  236. }
  237. #define TI_XBAR_EDMA_OFFSET 0
  238. #define TI_XBAR_SDMA_OFFSET 1
  239. static const u32 ti_dma_offset[] = {
  240. [TI_XBAR_EDMA_OFFSET] = 0,
  241. [TI_XBAR_SDMA_OFFSET] = 1,
  242. };
  243. static const struct of_device_id ti_dra7_master_match[] = {
  244. {
  245. .compatible = "ti,omap4430-sdma",
  246. .data = &ti_dma_offset[TI_XBAR_SDMA_OFFSET],
  247. },
  248. {
  249. .compatible = "ti,edma3",
  250. .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
  251. },
  252. {
  253. .compatible = "ti,edma3-tpcc",
  254. .data = &ti_dma_offset[TI_XBAR_EDMA_OFFSET],
  255. },
  256. {},
  257. };
  258. static inline void ti_dra7_xbar_reserve(int offset, int len, unsigned long *p)
  259. {
  260. for (; len > 0; len--)
  261. set_bit(offset + (len - 1), p);
  262. }
  263. static int ti_dra7_xbar_probe(struct platform_device *pdev)
  264. {
  265. struct device_node *node = pdev->dev.of_node;
  266. const struct of_device_id *match;
  267. struct device_node *dma_node;
  268. struct ti_dra7_xbar_data *xbar;
  269. struct property *prop;
  270. struct resource *res;
  271. u32 safe_val;
  272. int sz;
  273. void __iomem *iomem;
  274. int i, ret;
  275. if (!node)
  276. return -ENODEV;
  277. xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
  278. if (!xbar)
  279. return -ENOMEM;
  280. dma_node = of_parse_phandle(node, "dma-masters", 0);
  281. if (!dma_node) {
  282. dev_err(&pdev->dev, "Can't get DMA master node\n");
  283. return -ENODEV;
  284. }
  285. match = of_match_node(ti_dra7_master_match, dma_node);
  286. if (!match) {
  287. dev_err(&pdev->dev, "DMA master is not supported\n");
  288. of_node_put(dma_node);
  289. return -EINVAL;
  290. }
  291. if (of_property_read_u32(dma_node, "dma-requests",
  292. &xbar->dma_requests)) {
  293. dev_info(&pdev->dev,
  294. "Missing XBAR output information, using %u.\n",
  295. TI_DRA7_XBAR_OUTPUTS);
  296. xbar->dma_requests = TI_DRA7_XBAR_OUTPUTS;
  297. }
  298. of_node_put(dma_node);
  299. xbar->dma_inuse = devm_kcalloc(&pdev->dev,
  300. BITS_TO_LONGS(xbar->dma_requests),
  301. sizeof(unsigned long), GFP_KERNEL);
  302. if (!xbar->dma_inuse)
  303. return -ENOMEM;
  304. if (of_property_read_u32(node, "dma-requests", &xbar->xbar_requests)) {
  305. dev_info(&pdev->dev,
  306. "Missing XBAR input information, using %u.\n",
  307. TI_DRA7_XBAR_INPUTS);
  308. xbar->xbar_requests = TI_DRA7_XBAR_INPUTS;
  309. }
  310. if (!of_property_read_u32(node, "ti,dma-safe-map", &safe_val))
  311. xbar->safe_val = (u16)safe_val;
  312. prop = of_find_property(node, "ti,reserved-dma-request-ranges", &sz);
  313. if (prop) {
  314. const char pname[] = "ti,reserved-dma-request-ranges";
  315. u32 (*rsv_events)[2];
  316. size_t nelm = sz / sizeof(*rsv_events);
  317. int i;
  318. if (!nelm)
  319. return -EINVAL;
  320. rsv_events = kcalloc(nelm, sizeof(*rsv_events), GFP_KERNEL);
  321. if (!rsv_events)
  322. return -ENOMEM;
  323. ret = of_property_read_u32_array(node, pname, (u32 *)rsv_events,
  324. nelm * 2);
  325. if (ret) {
  326. kfree(rsv_events);
  327. return ret;
  328. }
  329. for (i = 0; i < nelm; i++) {
  330. ti_dra7_xbar_reserve(rsv_events[i][0], rsv_events[i][1],
  331. xbar->dma_inuse);
  332. }
  333. kfree(rsv_events);
  334. }
  335. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  336. iomem = devm_ioremap_resource(&pdev->dev, res);
  337. if (IS_ERR(iomem))
  338. return PTR_ERR(iomem);
  339. xbar->iomem = iomem;
  340. xbar->dmarouter.dev = &pdev->dev;
  341. xbar->dmarouter.route_free = ti_dra7_xbar_free;
  342. xbar->dma_offset = *(u32 *)match->data;
  343. mutex_init(&xbar->mutex);
  344. platform_set_drvdata(pdev, xbar);
  345. /* Reset the crossbar */
  346. for (i = 0; i < xbar->dma_requests; i++) {
  347. if (!test_bit(i, xbar->dma_inuse))
  348. ti_dra7_xbar_write(xbar->iomem, i, xbar->safe_val);
  349. }
  350. ret = of_dma_router_register(node, ti_dra7_xbar_route_allocate,
  351. &xbar->dmarouter);
  352. if (ret) {
  353. /* Restore the defaults for the crossbar */
  354. for (i = 0; i < xbar->dma_requests; i++) {
  355. if (!test_bit(i, xbar->dma_inuse))
  356. ti_dra7_xbar_write(xbar->iomem, i, i);
  357. }
  358. }
  359. return ret;
  360. }
  361. static int ti_dma_xbar_probe(struct platform_device *pdev)
  362. {
  363. const struct of_device_id *match;
  364. int ret;
  365. match = of_match_node(ti_dma_xbar_match, pdev->dev.of_node);
  366. if (unlikely(!match))
  367. return -EINVAL;
  368. switch (*(u32 *)match->data) {
  369. case TI_XBAR_DRA7:
  370. ret = ti_dra7_xbar_probe(pdev);
  371. break;
  372. case TI_XBAR_AM335X:
  373. ret = ti_am335x_xbar_probe(pdev);
  374. break;
  375. default:
  376. dev_err(&pdev->dev, "Unsupported crossbar\n");
  377. ret = -ENODEV;
  378. break;
  379. }
  380. return ret;
  381. }
  382. static struct platform_driver ti_dma_xbar_driver = {
  383. .driver = {
  384. .name = "ti-dma-crossbar",
  385. .of_match_table = of_match_ptr(ti_dma_xbar_match),
  386. },
  387. .probe = ti_dma_xbar_probe,
  388. };
  389. static int omap_dmaxbar_init(void)
  390. {
  391. return platform_driver_register(&ti_dma_xbar_driver);
  392. }
  393. arch_initcall(omap_dmaxbar_init);