dmaengine.c 34 KB

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  1. /*
  2. * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called COPYING.
  16. */
  17. /*
  18. * This code implements the DMA subsystem. It provides a HW-neutral interface
  19. * for other kernel code to use asynchronous memory copy capabilities,
  20. * if present, and allows different HW DMA drivers to register as providing
  21. * this capability.
  22. *
  23. * Due to the fact we are accelerating what is already a relatively fast
  24. * operation, the code goes to great lengths to avoid additional overhead,
  25. * such as locking.
  26. *
  27. * LOCKING:
  28. *
  29. * The subsystem keeps a global list of dma_device structs it is protected by a
  30. * mutex, dma_list_mutex.
  31. *
  32. * A subsystem can get access to a channel by calling dmaengine_get() followed
  33. * by dma_find_channel(), or if it has need for an exclusive channel it can call
  34. * dma_request_channel(). Once a channel is allocated a reference is taken
  35. * against its corresponding driver to disable removal.
  36. *
  37. * Each device has a channels list, which runs unlocked but is never modified
  38. * once the device is registered, it's just setup by the driver.
  39. *
  40. * See Documentation/dmaengine.txt for more details
  41. */
  42. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  43. #include <linux/platform_device.h>
  44. #include <linux/dma-mapping.h>
  45. #include <linux/init.h>
  46. #include <linux/module.h>
  47. #include <linux/mm.h>
  48. #include <linux/device.h>
  49. #include <linux/dmaengine.h>
  50. #include <linux/hardirq.h>
  51. #include <linux/spinlock.h>
  52. #include <linux/percpu.h>
  53. #include <linux/rcupdate.h>
  54. #include <linux/mutex.h>
  55. #include <linux/jiffies.h>
  56. #include <linux/rculist.h>
  57. #include <linux/idr.h>
  58. #include <linux/slab.h>
  59. #include <linux/acpi.h>
  60. #include <linux/acpi_dma.h>
  61. #include <linux/of_dma.h>
  62. #include <linux/mempool.h>
  63. static DEFINE_MUTEX(dma_list_mutex);
  64. static DEFINE_IDA(dma_ida);
  65. static LIST_HEAD(dma_device_list);
  66. static long dmaengine_ref_count;
  67. /* --- sysfs implementation --- */
  68. /**
  69. * dev_to_dma_chan - convert a device pointer to the its sysfs container object
  70. * @dev - device node
  71. *
  72. * Must be called under dma_list_mutex
  73. */
  74. static struct dma_chan *dev_to_dma_chan(struct device *dev)
  75. {
  76. struct dma_chan_dev *chan_dev;
  77. chan_dev = container_of(dev, typeof(*chan_dev), device);
  78. return chan_dev->chan;
  79. }
  80. static ssize_t memcpy_count_show(struct device *dev,
  81. struct device_attribute *attr, char *buf)
  82. {
  83. struct dma_chan *chan;
  84. unsigned long count = 0;
  85. int i;
  86. int err;
  87. mutex_lock(&dma_list_mutex);
  88. chan = dev_to_dma_chan(dev);
  89. if (chan) {
  90. for_each_possible_cpu(i)
  91. count += per_cpu_ptr(chan->local, i)->memcpy_count;
  92. err = sprintf(buf, "%lu\n", count);
  93. } else
  94. err = -ENODEV;
  95. mutex_unlock(&dma_list_mutex);
  96. return err;
  97. }
  98. static DEVICE_ATTR_RO(memcpy_count);
  99. static ssize_t bytes_transferred_show(struct device *dev,
  100. struct device_attribute *attr, char *buf)
  101. {
  102. struct dma_chan *chan;
  103. unsigned long count = 0;
  104. int i;
  105. int err;
  106. mutex_lock(&dma_list_mutex);
  107. chan = dev_to_dma_chan(dev);
  108. if (chan) {
  109. for_each_possible_cpu(i)
  110. count += per_cpu_ptr(chan->local, i)->bytes_transferred;
  111. err = sprintf(buf, "%lu\n", count);
  112. } else
  113. err = -ENODEV;
  114. mutex_unlock(&dma_list_mutex);
  115. return err;
  116. }
  117. static DEVICE_ATTR_RO(bytes_transferred);
  118. static ssize_t in_use_show(struct device *dev, struct device_attribute *attr,
  119. char *buf)
  120. {
  121. struct dma_chan *chan;
  122. int err;
  123. mutex_lock(&dma_list_mutex);
  124. chan = dev_to_dma_chan(dev);
  125. if (chan)
  126. err = sprintf(buf, "%d\n", chan->client_count);
  127. else
  128. err = -ENODEV;
  129. mutex_unlock(&dma_list_mutex);
  130. return err;
  131. }
  132. static DEVICE_ATTR_RO(in_use);
  133. static struct attribute *dma_dev_attrs[] = {
  134. &dev_attr_memcpy_count.attr,
  135. &dev_attr_bytes_transferred.attr,
  136. &dev_attr_in_use.attr,
  137. NULL,
  138. };
  139. ATTRIBUTE_GROUPS(dma_dev);
  140. static void chan_dev_release(struct device *dev)
  141. {
  142. struct dma_chan_dev *chan_dev;
  143. chan_dev = container_of(dev, typeof(*chan_dev), device);
  144. if (atomic_dec_and_test(chan_dev->idr_ref)) {
  145. mutex_lock(&dma_list_mutex);
  146. ida_remove(&dma_ida, chan_dev->dev_id);
  147. mutex_unlock(&dma_list_mutex);
  148. kfree(chan_dev->idr_ref);
  149. }
  150. kfree(chan_dev);
  151. }
  152. static struct class dma_devclass = {
  153. .name = "dma",
  154. .dev_groups = dma_dev_groups,
  155. .dev_release = chan_dev_release,
  156. };
  157. /* --- client and device registration --- */
  158. #define dma_device_satisfies_mask(device, mask) \
  159. __dma_device_satisfies_mask((device), &(mask))
  160. static int
  161. __dma_device_satisfies_mask(struct dma_device *device,
  162. const dma_cap_mask_t *want)
  163. {
  164. dma_cap_mask_t has;
  165. bitmap_and(has.bits, want->bits, device->cap_mask.bits,
  166. DMA_TX_TYPE_END);
  167. return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END);
  168. }
  169. static struct module *dma_chan_to_owner(struct dma_chan *chan)
  170. {
  171. return chan->device->owner;
  172. }
  173. /**
  174. * balance_ref_count - catch up the channel reference count
  175. * @chan - channel to balance ->client_count versus dmaengine_ref_count
  176. *
  177. * balance_ref_count must be called under dma_list_mutex
  178. */
  179. static void balance_ref_count(struct dma_chan *chan)
  180. {
  181. struct module *owner = dma_chan_to_owner(chan);
  182. while (chan->client_count < dmaengine_ref_count) {
  183. __module_get(owner);
  184. chan->client_count++;
  185. }
  186. }
  187. /**
  188. * dma_chan_get - try to grab a dma channel's parent driver module
  189. * @chan - channel to grab
  190. *
  191. * Must be called under dma_list_mutex
  192. */
  193. static int dma_chan_get(struct dma_chan *chan)
  194. {
  195. struct module *owner = dma_chan_to_owner(chan);
  196. int ret;
  197. /* The channel is already in use, update client count */
  198. if (chan->client_count) {
  199. __module_get(owner);
  200. goto out;
  201. }
  202. if (!try_module_get(owner))
  203. return -ENODEV;
  204. /* allocate upon first client reference */
  205. if (chan->device->device_alloc_chan_resources) {
  206. ret = chan->device->device_alloc_chan_resources(chan);
  207. if (ret < 0)
  208. goto err_out;
  209. }
  210. if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask))
  211. balance_ref_count(chan);
  212. out:
  213. chan->client_count++;
  214. return 0;
  215. err_out:
  216. module_put(owner);
  217. return ret;
  218. }
  219. /**
  220. * dma_chan_put - drop a reference to a dma channel's parent driver module
  221. * @chan - channel to release
  222. *
  223. * Must be called under dma_list_mutex
  224. */
  225. static void dma_chan_put(struct dma_chan *chan)
  226. {
  227. /* This channel is not in use, bail out */
  228. if (!chan->client_count)
  229. return;
  230. chan->client_count--;
  231. module_put(dma_chan_to_owner(chan));
  232. /* This channel is not in use anymore, free it */
  233. if (!chan->client_count && chan->device->device_free_chan_resources) {
  234. /* Make sure all operations have completed */
  235. dmaengine_synchronize(chan);
  236. chan->device->device_free_chan_resources(chan);
  237. }
  238. /* If the channel is used via a DMA request router, free the mapping */
  239. if (chan->router && chan->router->route_free) {
  240. chan->router->route_free(chan->router->dev, chan->route_data);
  241. chan->router = NULL;
  242. chan->route_data = NULL;
  243. }
  244. }
  245. enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
  246. {
  247. enum dma_status status;
  248. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  249. dma_async_issue_pending(chan);
  250. do {
  251. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  252. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  253. dev_err(chan->device->dev, "%s: timeout!\n", __func__);
  254. return DMA_ERROR;
  255. }
  256. if (status != DMA_IN_PROGRESS)
  257. break;
  258. cpu_relax();
  259. } while (1);
  260. return status;
  261. }
  262. EXPORT_SYMBOL(dma_sync_wait);
  263. /**
  264. * dma_cap_mask_all - enable iteration over all operation types
  265. */
  266. static dma_cap_mask_t dma_cap_mask_all;
  267. /**
  268. * dma_chan_tbl_ent - tracks channel allocations per core/operation
  269. * @chan - associated channel for this entry
  270. */
  271. struct dma_chan_tbl_ent {
  272. struct dma_chan *chan;
  273. };
  274. /**
  275. * channel_table - percpu lookup table for memory-to-memory offload providers
  276. */
  277. static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END];
  278. static int __init dma_channel_table_init(void)
  279. {
  280. enum dma_transaction_type cap;
  281. int err = 0;
  282. bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END);
  283. /* 'interrupt', 'private', and 'slave' are channel capabilities,
  284. * but are not associated with an operation so they do not need
  285. * an entry in the channel_table
  286. */
  287. clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits);
  288. clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits);
  289. clear_bit(DMA_SLAVE, dma_cap_mask_all.bits);
  290. for_each_dma_cap_mask(cap, dma_cap_mask_all) {
  291. channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent);
  292. if (!channel_table[cap]) {
  293. err = -ENOMEM;
  294. break;
  295. }
  296. }
  297. if (err) {
  298. pr_err("initialization failure\n");
  299. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  300. free_percpu(channel_table[cap]);
  301. }
  302. return err;
  303. }
  304. arch_initcall(dma_channel_table_init);
  305. /**
  306. * dma_find_channel - find a channel to carry out the operation
  307. * @tx_type: transaction type
  308. */
  309. struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type)
  310. {
  311. return this_cpu_read(channel_table[tx_type]->chan);
  312. }
  313. EXPORT_SYMBOL(dma_find_channel);
  314. /**
  315. * dma_issue_pending_all - flush all pending operations across all channels
  316. */
  317. void dma_issue_pending_all(void)
  318. {
  319. struct dma_device *device;
  320. struct dma_chan *chan;
  321. rcu_read_lock();
  322. list_for_each_entry_rcu(device, &dma_device_list, global_node) {
  323. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  324. continue;
  325. list_for_each_entry(chan, &device->channels, device_node)
  326. if (chan->client_count)
  327. device->device_issue_pending(chan);
  328. }
  329. rcu_read_unlock();
  330. }
  331. EXPORT_SYMBOL(dma_issue_pending_all);
  332. /**
  333. * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu
  334. */
  335. static bool dma_chan_is_local(struct dma_chan *chan, int cpu)
  336. {
  337. int node = dev_to_node(chan->device->dev);
  338. return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node));
  339. }
  340. /**
  341. * min_chan - returns the channel with min count and in the same numa-node as the cpu
  342. * @cap: capability to match
  343. * @cpu: cpu index which the channel should be close to
  344. *
  345. * If some channels are close to the given cpu, the one with the lowest
  346. * reference count is returned. Otherwise, cpu is ignored and only the
  347. * reference count is taken into account.
  348. * Must be called under dma_list_mutex.
  349. */
  350. static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu)
  351. {
  352. struct dma_device *device;
  353. struct dma_chan *chan;
  354. struct dma_chan *min = NULL;
  355. struct dma_chan *localmin = NULL;
  356. list_for_each_entry(device, &dma_device_list, global_node) {
  357. if (!dma_has_cap(cap, device->cap_mask) ||
  358. dma_has_cap(DMA_PRIVATE, device->cap_mask))
  359. continue;
  360. list_for_each_entry(chan, &device->channels, device_node) {
  361. if (!chan->client_count)
  362. continue;
  363. if (!min || chan->table_count < min->table_count)
  364. min = chan;
  365. if (dma_chan_is_local(chan, cpu))
  366. if (!localmin ||
  367. chan->table_count < localmin->table_count)
  368. localmin = chan;
  369. }
  370. }
  371. chan = localmin ? localmin : min;
  372. if (chan)
  373. chan->table_count++;
  374. return chan;
  375. }
  376. /**
  377. * dma_channel_rebalance - redistribute the available channels
  378. *
  379. * Optimize for cpu isolation (each cpu gets a dedicated channel for an
  380. * operation type) in the SMP case, and operation isolation (avoid
  381. * multi-tasking channels) in the non-SMP case. Must be called under
  382. * dma_list_mutex.
  383. */
  384. static void dma_channel_rebalance(void)
  385. {
  386. struct dma_chan *chan;
  387. struct dma_device *device;
  388. int cpu;
  389. int cap;
  390. /* undo the last distribution */
  391. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  392. for_each_possible_cpu(cpu)
  393. per_cpu_ptr(channel_table[cap], cpu)->chan = NULL;
  394. list_for_each_entry(device, &dma_device_list, global_node) {
  395. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  396. continue;
  397. list_for_each_entry(chan, &device->channels, device_node)
  398. chan->table_count = 0;
  399. }
  400. /* don't populate the channel_table if no clients are available */
  401. if (!dmaengine_ref_count)
  402. return;
  403. /* redistribute available channels */
  404. for_each_dma_cap_mask(cap, dma_cap_mask_all)
  405. for_each_online_cpu(cpu) {
  406. chan = min_chan(cap, cpu);
  407. per_cpu_ptr(channel_table[cap], cpu)->chan = chan;
  408. }
  409. }
  410. int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
  411. {
  412. struct dma_device *device;
  413. if (!chan || !caps)
  414. return -EINVAL;
  415. device = chan->device;
  416. /* check if the channel supports slave transactions */
  417. if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) ||
  418. test_bit(DMA_CYCLIC, device->cap_mask.bits)))
  419. return -ENXIO;
  420. /*
  421. * Check whether it reports it uses the generic slave
  422. * capabilities, if not, that means it doesn't support any
  423. * kind of slave capabilities reporting.
  424. */
  425. if (!device->directions)
  426. return -ENXIO;
  427. caps->src_addr_widths = device->src_addr_widths;
  428. caps->dst_addr_widths = device->dst_addr_widths;
  429. caps->directions = device->directions;
  430. caps->max_burst = device->max_burst;
  431. caps->residue_granularity = device->residue_granularity;
  432. caps->descriptor_reuse = device->descriptor_reuse;
  433. /*
  434. * Some devices implement only pause (e.g. to get residuum) but no
  435. * resume. However cmd_pause is advertised as pause AND resume.
  436. */
  437. caps->cmd_pause = !!(device->device_pause && device->device_resume);
  438. caps->cmd_terminate = !!device->device_terminate_all;
  439. return 0;
  440. }
  441. EXPORT_SYMBOL_GPL(dma_get_slave_caps);
  442. static struct dma_chan *private_candidate(const dma_cap_mask_t *mask,
  443. struct dma_device *dev,
  444. dma_filter_fn fn, void *fn_param)
  445. {
  446. struct dma_chan *chan;
  447. if (mask && !__dma_device_satisfies_mask(dev, mask)) {
  448. dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__);
  449. return NULL;
  450. }
  451. /* devices with multiple channels need special handling as we need to
  452. * ensure that all channels are either private or public.
  453. */
  454. if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask))
  455. list_for_each_entry(chan, &dev->channels, device_node) {
  456. /* some channels are already publicly allocated */
  457. if (chan->client_count)
  458. return NULL;
  459. }
  460. list_for_each_entry(chan, &dev->channels, device_node) {
  461. if (chan->client_count) {
  462. dev_dbg(dev->dev, "%s: %s busy\n",
  463. __func__, dma_chan_name(chan));
  464. continue;
  465. }
  466. if (fn && !fn(chan, fn_param)) {
  467. dev_dbg(dev->dev, "%s: %s filter said false\n",
  468. __func__, dma_chan_name(chan));
  469. continue;
  470. }
  471. return chan;
  472. }
  473. return NULL;
  474. }
  475. static struct dma_chan *find_candidate(struct dma_device *device,
  476. const dma_cap_mask_t *mask,
  477. dma_filter_fn fn, void *fn_param)
  478. {
  479. struct dma_chan *chan = private_candidate(mask, device, fn, fn_param);
  480. int err;
  481. if (chan) {
  482. /* Found a suitable channel, try to grab, prep, and return it.
  483. * We first set DMA_PRIVATE to disable balance_ref_count as this
  484. * channel will not be published in the general-purpose
  485. * allocator
  486. */
  487. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  488. device->privatecnt++;
  489. err = dma_chan_get(chan);
  490. if (err) {
  491. if (err == -ENODEV) {
  492. dev_dbg(device->dev, "%s: %s module removed\n",
  493. __func__, dma_chan_name(chan));
  494. list_del_rcu(&device->global_node);
  495. } else
  496. dev_dbg(device->dev,
  497. "%s: failed to get %s: (%d)\n",
  498. __func__, dma_chan_name(chan), err);
  499. if (--device->privatecnt == 0)
  500. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  501. chan = ERR_PTR(err);
  502. }
  503. }
  504. return chan ? chan : ERR_PTR(-EPROBE_DEFER);
  505. }
  506. /**
  507. * dma_get_slave_channel - try to get specific channel exclusively
  508. * @chan: target channel
  509. */
  510. struct dma_chan *dma_get_slave_channel(struct dma_chan *chan)
  511. {
  512. int err = -EBUSY;
  513. /* lock against __dma_request_channel */
  514. mutex_lock(&dma_list_mutex);
  515. if (chan->client_count == 0) {
  516. struct dma_device *device = chan->device;
  517. dma_cap_set(DMA_PRIVATE, device->cap_mask);
  518. device->privatecnt++;
  519. err = dma_chan_get(chan);
  520. if (err) {
  521. dev_dbg(chan->device->dev,
  522. "%s: failed to get %s: (%d)\n",
  523. __func__, dma_chan_name(chan), err);
  524. chan = NULL;
  525. if (--device->privatecnt == 0)
  526. dma_cap_clear(DMA_PRIVATE, device->cap_mask);
  527. }
  528. } else
  529. chan = NULL;
  530. mutex_unlock(&dma_list_mutex);
  531. return chan;
  532. }
  533. EXPORT_SYMBOL_GPL(dma_get_slave_channel);
  534. struct dma_chan *dma_get_any_slave_channel(struct dma_device *device)
  535. {
  536. dma_cap_mask_t mask;
  537. struct dma_chan *chan;
  538. dma_cap_zero(mask);
  539. dma_cap_set(DMA_SLAVE, mask);
  540. /* lock against __dma_request_channel */
  541. mutex_lock(&dma_list_mutex);
  542. chan = find_candidate(device, &mask, NULL, NULL);
  543. mutex_unlock(&dma_list_mutex);
  544. return IS_ERR(chan) ? NULL : chan;
  545. }
  546. EXPORT_SYMBOL_GPL(dma_get_any_slave_channel);
  547. /**
  548. * __dma_request_channel - try to allocate an exclusive channel
  549. * @mask: capabilities that the channel must satisfy
  550. * @fn: optional callback to disposition available channels
  551. * @fn_param: opaque parameter to pass to dma_filter_fn
  552. *
  553. * Returns pointer to appropriate DMA channel on success or NULL.
  554. */
  555. struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
  556. dma_filter_fn fn, void *fn_param)
  557. {
  558. struct dma_device *device, *_d;
  559. struct dma_chan *chan = NULL;
  560. /* Find a channel */
  561. mutex_lock(&dma_list_mutex);
  562. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  563. chan = find_candidate(device, mask, fn, fn_param);
  564. if (!IS_ERR(chan))
  565. break;
  566. chan = NULL;
  567. }
  568. mutex_unlock(&dma_list_mutex);
  569. pr_debug("%s: %s (%s)\n",
  570. __func__,
  571. chan ? "success" : "fail",
  572. chan ? dma_chan_name(chan) : NULL);
  573. return chan;
  574. }
  575. EXPORT_SYMBOL_GPL(__dma_request_channel);
  576. static const struct dma_slave_map *dma_filter_match(struct dma_device *device,
  577. const char *name,
  578. struct device *dev)
  579. {
  580. int i;
  581. if (!device->filter.mapcnt)
  582. return NULL;
  583. for (i = 0; i < device->filter.mapcnt; i++) {
  584. const struct dma_slave_map *map = &device->filter.map[i];
  585. if (!strcmp(map->devname, dev_name(dev)) &&
  586. !strcmp(map->slave, name))
  587. return map;
  588. }
  589. return NULL;
  590. }
  591. /**
  592. * dma_request_chan - try to allocate an exclusive slave channel
  593. * @dev: pointer to client device structure
  594. * @name: slave channel name
  595. *
  596. * Returns pointer to appropriate DMA channel on success or an error pointer.
  597. */
  598. struct dma_chan *dma_request_chan(struct device *dev, const char *name)
  599. {
  600. struct dma_device *d, *_d;
  601. struct dma_chan *chan = NULL;
  602. /* If device-tree is present get slave info from here */
  603. if (dev->of_node)
  604. chan = of_dma_request_slave_channel(dev->of_node, name);
  605. /* If device was enumerated by ACPI get slave info from here */
  606. if (has_acpi_companion(dev) && !chan)
  607. chan = acpi_dma_request_slave_chan_by_name(dev, name);
  608. if (chan) {
  609. /* Valid channel found or requester need to be deferred */
  610. if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER)
  611. return chan;
  612. }
  613. /* Try to find the channel via the DMA filter map(s) */
  614. mutex_lock(&dma_list_mutex);
  615. list_for_each_entry_safe(d, _d, &dma_device_list, global_node) {
  616. dma_cap_mask_t mask;
  617. const struct dma_slave_map *map = dma_filter_match(d, name, dev);
  618. if (!map)
  619. continue;
  620. dma_cap_zero(mask);
  621. dma_cap_set(DMA_SLAVE, mask);
  622. chan = find_candidate(d, &mask, d->filter.fn, map->param);
  623. if (!IS_ERR(chan))
  624. break;
  625. }
  626. mutex_unlock(&dma_list_mutex);
  627. return chan ? chan : ERR_PTR(-EPROBE_DEFER);
  628. }
  629. EXPORT_SYMBOL_GPL(dma_request_chan);
  630. /**
  631. * dma_request_slave_channel - try to allocate an exclusive slave channel
  632. * @dev: pointer to client device structure
  633. * @name: slave channel name
  634. *
  635. * Returns pointer to appropriate DMA channel on success or NULL.
  636. */
  637. struct dma_chan *dma_request_slave_channel(struct device *dev,
  638. const char *name)
  639. {
  640. struct dma_chan *ch = dma_request_chan(dev, name);
  641. if (IS_ERR(ch))
  642. return NULL;
  643. return ch;
  644. }
  645. EXPORT_SYMBOL_GPL(dma_request_slave_channel);
  646. /**
  647. * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities
  648. * @mask: capabilities that the channel must satisfy
  649. *
  650. * Returns pointer to appropriate DMA channel on success or an error pointer.
  651. */
  652. struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask)
  653. {
  654. struct dma_chan *chan;
  655. if (!mask)
  656. return ERR_PTR(-ENODEV);
  657. chan = __dma_request_channel(mask, NULL, NULL);
  658. if (!chan)
  659. chan = ERR_PTR(-ENODEV);
  660. return chan;
  661. }
  662. EXPORT_SYMBOL_GPL(dma_request_chan_by_mask);
  663. void dma_release_channel(struct dma_chan *chan)
  664. {
  665. mutex_lock(&dma_list_mutex);
  666. WARN_ONCE(chan->client_count != 1,
  667. "chan reference count %d != 1\n", chan->client_count);
  668. dma_chan_put(chan);
  669. /* drop PRIVATE cap enabled by __dma_request_channel() */
  670. if (--chan->device->privatecnt == 0)
  671. dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask);
  672. mutex_unlock(&dma_list_mutex);
  673. }
  674. EXPORT_SYMBOL_GPL(dma_release_channel);
  675. /**
  676. * dmaengine_get - register interest in dma_channels
  677. */
  678. void dmaengine_get(void)
  679. {
  680. struct dma_device *device, *_d;
  681. struct dma_chan *chan;
  682. int err;
  683. mutex_lock(&dma_list_mutex);
  684. dmaengine_ref_count++;
  685. /* try to grab channels */
  686. list_for_each_entry_safe(device, _d, &dma_device_list, global_node) {
  687. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  688. continue;
  689. list_for_each_entry(chan, &device->channels, device_node) {
  690. err = dma_chan_get(chan);
  691. if (err == -ENODEV) {
  692. /* module removed before we could use it */
  693. list_del_rcu(&device->global_node);
  694. break;
  695. } else if (err)
  696. dev_dbg(chan->device->dev,
  697. "%s: failed to get %s: (%d)\n",
  698. __func__, dma_chan_name(chan), err);
  699. }
  700. }
  701. /* if this is the first reference and there were channels
  702. * waiting we need to rebalance to get those channels
  703. * incorporated into the channel table
  704. */
  705. if (dmaengine_ref_count == 1)
  706. dma_channel_rebalance();
  707. mutex_unlock(&dma_list_mutex);
  708. }
  709. EXPORT_SYMBOL(dmaengine_get);
  710. /**
  711. * dmaengine_put - let dma drivers be removed when ref_count == 0
  712. */
  713. void dmaengine_put(void)
  714. {
  715. struct dma_device *device;
  716. struct dma_chan *chan;
  717. mutex_lock(&dma_list_mutex);
  718. dmaengine_ref_count--;
  719. BUG_ON(dmaengine_ref_count < 0);
  720. /* drop channel references */
  721. list_for_each_entry(device, &dma_device_list, global_node) {
  722. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  723. continue;
  724. list_for_each_entry(chan, &device->channels, device_node)
  725. dma_chan_put(chan);
  726. }
  727. mutex_unlock(&dma_list_mutex);
  728. }
  729. EXPORT_SYMBOL(dmaengine_put);
  730. static bool device_has_all_tx_types(struct dma_device *device)
  731. {
  732. /* A device that satisfies this test has channels that will never cause
  733. * an async_tx channel switch event as all possible operation types can
  734. * be handled.
  735. */
  736. #ifdef CONFIG_ASYNC_TX_DMA
  737. if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  738. return false;
  739. #endif
  740. #if IS_ENABLED(CONFIG_ASYNC_MEMCPY)
  741. if (!dma_has_cap(DMA_MEMCPY, device->cap_mask))
  742. return false;
  743. #endif
  744. #if IS_ENABLED(CONFIG_ASYNC_XOR)
  745. if (!dma_has_cap(DMA_XOR, device->cap_mask))
  746. return false;
  747. #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
  748. if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask))
  749. return false;
  750. #endif
  751. #endif
  752. #if IS_ENABLED(CONFIG_ASYNC_PQ)
  753. if (!dma_has_cap(DMA_PQ, device->cap_mask))
  754. return false;
  755. #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA
  756. if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask))
  757. return false;
  758. #endif
  759. #endif
  760. return true;
  761. }
  762. static int get_dma_id(struct dma_device *device)
  763. {
  764. int rc;
  765. do {
  766. if (!ida_pre_get(&dma_ida, GFP_KERNEL))
  767. return -ENOMEM;
  768. mutex_lock(&dma_list_mutex);
  769. rc = ida_get_new(&dma_ida, &device->dev_id);
  770. mutex_unlock(&dma_list_mutex);
  771. } while (rc == -EAGAIN);
  772. return rc;
  773. }
  774. /**
  775. * dma_async_device_register - registers DMA devices found
  776. * @device: &dma_device
  777. */
  778. int dma_async_device_register(struct dma_device *device)
  779. {
  780. int chancnt = 0, rc;
  781. struct dma_chan* chan;
  782. atomic_t *idr_ref;
  783. if (!device)
  784. return -ENODEV;
  785. /* validate device routines */
  786. if (!device->dev) {
  787. pr_err("DMAdevice must have dev\n");
  788. return -EIO;
  789. }
  790. device->owner = device->dev->driver->owner;
  791. if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) {
  792. dev_err(device->dev,
  793. "Device claims capability %s, but op is not defined\n",
  794. "DMA_MEMCPY");
  795. return -EIO;
  796. }
  797. if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) {
  798. dev_err(device->dev,
  799. "Device claims capability %s, but op is not defined\n",
  800. "DMA_XOR");
  801. return -EIO;
  802. }
  803. if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) {
  804. dev_err(device->dev,
  805. "Device claims capability %s, but op is not defined\n",
  806. "DMA_XOR_VAL");
  807. return -EIO;
  808. }
  809. if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) {
  810. dev_err(device->dev,
  811. "Device claims capability %s, but op is not defined\n",
  812. "DMA_PQ");
  813. return -EIO;
  814. }
  815. if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) {
  816. dev_err(device->dev,
  817. "Device claims capability %s, but op is not defined\n",
  818. "DMA_PQ_VAL");
  819. return -EIO;
  820. }
  821. if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) {
  822. dev_err(device->dev,
  823. "Device claims capability %s, but op is not defined\n",
  824. "DMA_MEMSET");
  825. return -EIO;
  826. }
  827. if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) {
  828. dev_err(device->dev,
  829. "Device claims capability %s, but op is not defined\n",
  830. "DMA_INTERRUPT");
  831. return -EIO;
  832. }
  833. if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) {
  834. dev_err(device->dev,
  835. "Device claims capability %s, but op is not defined\n",
  836. "DMA_CYCLIC");
  837. return -EIO;
  838. }
  839. if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) {
  840. dev_err(device->dev,
  841. "Device claims capability %s, but op is not defined\n",
  842. "DMA_INTERLEAVE");
  843. return -EIO;
  844. }
  845. if (!device->device_tx_status) {
  846. dev_err(device->dev, "Device tx_status is not defined\n");
  847. return -EIO;
  848. }
  849. if (!device->device_issue_pending) {
  850. dev_err(device->dev, "Device issue_pending is not defined\n");
  851. return -EIO;
  852. }
  853. /* note: this only matters in the
  854. * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case
  855. */
  856. if (device_has_all_tx_types(device))
  857. dma_cap_set(DMA_ASYNC_TX, device->cap_mask);
  858. idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
  859. if (!idr_ref)
  860. return -ENOMEM;
  861. rc = get_dma_id(device);
  862. if (rc != 0) {
  863. kfree(idr_ref);
  864. return rc;
  865. }
  866. atomic_set(idr_ref, 0);
  867. /* represent channels in sysfs. Probably want devs too */
  868. list_for_each_entry(chan, &device->channels, device_node) {
  869. rc = -ENOMEM;
  870. chan->local = alloc_percpu(typeof(*chan->local));
  871. if (chan->local == NULL)
  872. goto err_out;
  873. chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL);
  874. if (chan->dev == NULL) {
  875. free_percpu(chan->local);
  876. chan->local = NULL;
  877. goto err_out;
  878. }
  879. chan->chan_id = chancnt++;
  880. chan->dev->device.class = &dma_devclass;
  881. chan->dev->device.parent = device->dev;
  882. chan->dev->chan = chan;
  883. chan->dev->idr_ref = idr_ref;
  884. chan->dev->dev_id = device->dev_id;
  885. atomic_inc(idr_ref);
  886. dev_set_name(&chan->dev->device, "dma%dchan%d",
  887. device->dev_id, chan->chan_id);
  888. rc = device_register(&chan->dev->device);
  889. if (rc) {
  890. free_percpu(chan->local);
  891. chan->local = NULL;
  892. kfree(chan->dev);
  893. atomic_dec(idr_ref);
  894. goto err_out;
  895. }
  896. chan->client_count = 0;
  897. }
  898. if (!chancnt) {
  899. dev_err(device->dev, "%s: device has no channels!\n", __func__);
  900. rc = -ENODEV;
  901. goto err_out;
  902. }
  903. device->chancnt = chancnt;
  904. mutex_lock(&dma_list_mutex);
  905. /* take references on public channels */
  906. if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask))
  907. list_for_each_entry(chan, &device->channels, device_node) {
  908. /* if clients are already waiting for channels we need
  909. * to take references on their behalf
  910. */
  911. if (dma_chan_get(chan) == -ENODEV) {
  912. /* note we can only get here for the first
  913. * channel as the remaining channels are
  914. * guaranteed to get a reference
  915. */
  916. rc = -ENODEV;
  917. mutex_unlock(&dma_list_mutex);
  918. goto err_out;
  919. }
  920. }
  921. list_add_tail_rcu(&device->global_node, &dma_device_list);
  922. if (dma_has_cap(DMA_PRIVATE, device->cap_mask))
  923. device->privatecnt++; /* Always private */
  924. dma_channel_rebalance();
  925. mutex_unlock(&dma_list_mutex);
  926. return 0;
  927. err_out:
  928. /* if we never registered a channel just release the idr */
  929. if (atomic_read(idr_ref) == 0) {
  930. mutex_lock(&dma_list_mutex);
  931. ida_remove(&dma_ida, device->dev_id);
  932. mutex_unlock(&dma_list_mutex);
  933. kfree(idr_ref);
  934. return rc;
  935. }
  936. list_for_each_entry(chan, &device->channels, device_node) {
  937. if (chan->local == NULL)
  938. continue;
  939. mutex_lock(&dma_list_mutex);
  940. chan->dev->chan = NULL;
  941. mutex_unlock(&dma_list_mutex);
  942. device_unregister(&chan->dev->device);
  943. free_percpu(chan->local);
  944. }
  945. return rc;
  946. }
  947. EXPORT_SYMBOL(dma_async_device_register);
  948. /**
  949. * dma_async_device_unregister - unregister a DMA device
  950. * @device: &dma_device
  951. *
  952. * This routine is called by dma driver exit routines, dmaengine holds module
  953. * references to prevent it being called while channels are in use.
  954. */
  955. void dma_async_device_unregister(struct dma_device *device)
  956. {
  957. struct dma_chan *chan;
  958. mutex_lock(&dma_list_mutex);
  959. list_del_rcu(&device->global_node);
  960. dma_channel_rebalance();
  961. mutex_unlock(&dma_list_mutex);
  962. list_for_each_entry(chan, &device->channels, device_node) {
  963. WARN_ONCE(chan->client_count,
  964. "%s called while %d clients hold a reference\n",
  965. __func__, chan->client_count);
  966. mutex_lock(&dma_list_mutex);
  967. chan->dev->chan = NULL;
  968. mutex_unlock(&dma_list_mutex);
  969. device_unregister(&chan->dev->device);
  970. free_percpu(chan->local);
  971. }
  972. }
  973. EXPORT_SYMBOL(dma_async_device_unregister);
  974. struct dmaengine_unmap_pool {
  975. struct kmem_cache *cache;
  976. const char *name;
  977. mempool_t *pool;
  978. size_t size;
  979. };
  980. #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) }
  981. static struct dmaengine_unmap_pool unmap_pool[] = {
  982. __UNMAP_POOL(2),
  983. #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
  984. __UNMAP_POOL(16),
  985. __UNMAP_POOL(128),
  986. __UNMAP_POOL(256),
  987. #endif
  988. };
  989. static struct dmaengine_unmap_pool *__get_unmap_pool(int nr)
  990. {
  991. int order = get_count_order(nr);
  992. switch (order) {
  993. case 0 ... 1:
  994. return &unmap_pool[0];
  995. #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID)
  996. case 2 ... 4:
  997. return &unmap_pool[1];
  998. case 5 ... 7:
  999. return &unmap_pool[2];
  1000. case 8:
  1001. return &unmap_pool[3];
  1002. #endif
  1003. default:
  1004. BUG();
  1005. return NULL;
  1006. }
  1007. }
  1008. static void dmaengine_unmap(struct kref *kref)
  1009. {
  1010. struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref);
  1011. struct device *dev = unmap->dev;
  1012. int cnt, i;
  1013. cnt = unmap->to_cnt;
  1014. for (i = 0; i < cnt; i++)
  1015. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1016. DMA_TO_DEVICE);
  1017. cnt += unmap->from_cnt;
  1018. for (; i < cnt; i++)
  1019. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1020. DMA_FROM_DEVICE);
  1021. cnt += unmap->bidi_cnt;
  1022. for (; i < cnt; i++) {
  1023. if (unmap->addr[i] == 0)
  1024. continue;
  1025. dma_unmap_page(dev, unmap->addr[i], unmap->len,
  1026. DMA_BIDIRECTIONAL);
  1027. }
  1028. cnt = unmap->map_cnt;
  1029. mempool_free(unmap, __get_unmap_pool(cnt)->pool);
  1030. }
  1031. void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap)
  1032. {
  1033. if (unmap)
  1034. kref_put(&unmap->kref, dmaengine_unmap);
  1035. }
  1036. EXPORT_SYMBOL_GPL(dmaengine_unmap_put);
  1037. static void dmaengine_destroy_unmap_pool(void)
  1038. {
  1039. int i;
  1040. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  1041. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  1042. mempool_destroy(p->pool);
  1043. p->pool = NULL;
  1044. kmem_cache_destroy(p->cache);
  1045. p->cache = NULL;
  1046. }
  1047. }
  1048. static int __init dmaengine_init_unmap_pool(void)
  1049. {
  1050. int i;
  1051. for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) {
  1052. struct dmaengine_unmap_pool *p = &unmap_pool[i];
  1053. size_t size;
  1054. size = sizeof(struct dmaengine_unmap_data) +
  1055. sizeof(dma_addr_t) * p->size;
  1056. p->cache = kmem_cache_create(p->name, size, 0,
  1057. SLAB_HWCACHE_ALIGN, NULL);
  1058. if (!p->cache)
  1059. break;
  1060. p->pool = mempool_create_slab_pool(1, p->cache);
  1061. if (!p->pool)
  1062. break;
  1063. }
  1064. if (i == ARRAY_SIZE(unmap_pool))
  1065. return 0;
  1066. dmaengine_destroy_unmap_pool();
  1067. return -ENOMEM;
  1068. }
  1069. struct dmaengine_unmap_data *
  1070. dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags)
  1071. {
  1072. struct dmaengine_unmap_data *unmap;
  1073. unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags);
  1074. if (!unmap)
  1075. return NULL;
  1076. memset(unmap, 0, sizeof(*unmap));
  1077. kref_init(&unmap->kref);
  1078. unmap->dev = dev;
  1079. unmap->map_cnt = nr;
  1080. return unmap;
  1081. }
  1082. EXPORT_SYMBOL(dmaengine_get_unmap_data);
  1083. void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
  1084. struct dma_chan *chan)
  1085. {
  1086. tx->chan = chan;
  1087. #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
  1088. spin_lock_init(&tx->lock);
  1089. #endif
  1090. }
  1091. EXPORT_SYMBOL(dma_async_tx_descriptor_init);
  1092. /* dma_wait_for_async_tx - spin wait for a transaction to complete
  1093. * @tx: in-flight transaction to wait on
  1094. */
  1095. enum dma_status
  1096. dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
  1097. {
  1098. unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000);
  1099. if (!tx)
  1100. return DMA_COMPLETE;
  1101. while (tx->cookie == -EBUSY) {
  1102. if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
  1103. dev_err(tx->chan->device->dev,
  1104. "%s timeout waiting for descriptor submission\n",
  1105. __func__);
  1106. return DMA_ERROR;
  1107. }
  1108. cpu_relax();
  1109. }
  1110. return dma_sync_wait(tx->chan, tx->cookie);
  1111. }
  1112. EXPORT_SYMBOL_GPL(dma_wait_for_async_tx);
  1113. /* dma_run_dependencies - helper routine for dma drivers to process
  1114. * (start) dependent operations on their target channel
  1115. * @tx: transaction with dependencies
  1116. */
  1117. void dma_run_dependencies(struct dma_async_tx_descriptor *tx)
  1118. {
  1119. struct dma_async_tx_descriptor *dep = txd_next(tx);
  1120. struct dma_async_tx_descriptor *dep_next;
  1121. struct dma_chan *chan;
  1122. if (!dep)
  1123. return;
  1124. /* we'll submit tx->next now, so clear the link */
  1125. txd_clear_next(tx);
  1126. chan = dep->chan;
  1127. /* keep submitting up until a channel switch is detected
  1128. * in that case we will be called again as a result of
  1129. * processing the interrupt from async_tx_channel_switch
  1130. */
  1131. for (; dep; dep = dep_next) {
  1132. txd_lock(dep);
  1133. txd_clear_parent(dep);
  1134. dep_next = txd_next(dep);
  1135. if (dep_next && dep_next->chan == chan)
  1136. txd_clear_next(dep); /* ->next will be submitted */
  1137. else
  1138. dep_next = NULL; /* submit current dep and terminate */
  1139. txd_unlock(dep);
  1140. dep->tx_submit(dep);
  1141. }
  1142. chan->device->device_issue_pending(chan);
  1143. }
  1144. EXPORT_SYMBOL_GPL(dma_run_dependencies);
  1145. static int __init dma_bus_init(void)
  1146. {
  1147. int err = dmaengine_init_unmap_pool();
  1148. if (err)
  1149. return err;
  1150. return class_register(&dma_devclass);
  1151. }
  1152. arch_initcall(dma_bus_init);