bcom_fec_tx_task.c 3.5 KB

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  1. /*
  2. * Bestcomm FEC TX task microcode
  3. *
  4. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. *
  10. * Automatically created based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
  11. * on Tue Mar 22 11:19:29 2005 GMT
  12. */
  13. #include <asm/types.h>
  14. /*
  15. * The header consists of the following fields:
  16. * u32 magic;
  17. * u8 desc_size;
  18. * u8 var_size;
  19. * u8 inc_size;
  20. * u8 first_var;
  21. * u8 reserved[8];
  22. *
  23. * The size fields contain the number of 32-bit words.
  24. */
  25. u32 bcom_fec_tx_task[] = {
  26. /* header */
  27. 0x4243544b,
  28. 0x2407070d,
  29. 0x00000000,
  30. 0x00000000,
  31. /* Task descriptors */
  32. 0x8018001b, /* LCD: idx0 = var0; idx0 <= var0; idx0 += inc3 */
  33. 0x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */
  34. 0x01ccfc0d, /* DRD2B1: var7 = EU3(); EU3(*idx0,var13) */
  35. 0x8082a123, /* LCD: idx0 = var1, idx1 = var5; idx1 <= var4; idx0 += inc4, idx1 += inc3 */
  36. 0x10801418, /* DRD1A: var5 = var3; FN=0 MORE init=4 WS=0 RS=0 */
  37. 0xf88103a4, /* LCDEXT: idx2 = *idx1, idx3 = var2; idx2 < var14; idx2 += inc4, idx3 += inc4 */
  38. 0x801a6024, /* LCD: idx4 = var0; ; idx4 += inc4 */
  39. 0x10001708, /* DRD1A: var5 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
  40. 0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
  41. 0x0cccfccf, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var15) */
  42. 0x991a002c, /* LCD: idx2 = idx2, idx3 = idx4; idx2 once var0; idx2 += inc5, idx3 += inc4 */
  43. 0x70000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
  44. 0x024cfc4d, /* DRD2B1: var9 = EU3(); EU3(*idx1,var13) */
  45. 0x60000003, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=3 EXT init=0 WS=0 RS=0 */
  46. 0x0cccf247, /* DRD2B1: *idx3 = EU3(); EU3(var9,var7) */
  47. 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
  48. 0xb8c80029, /* LCD: idx3 = *(idx1 + var0000001a); idx3 once var0; idx3 += inc5 */
  49. 0x70000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
  50. 0x088cf8d1, /* DRD2B1: idx2 = EU3(); EU3(idx3,var17) */
  51. 0x00002f10, /* DRD1A: var11 = idx2; FN=0 init=0 WS=0 RS=0 */
  52. 0x99198432, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var16; idx2 += inc6, idx3 += inc2 */
  53. 0x008ac398, /* DRD1A: *idx0 = *idx3; FN=0 init=4 WS=1 RS=1 */
  54. 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
  55. 0x9999802d, /* LCD: idx3 = idx3; idx3 once var0; idx3 += inc5 */
  56. 0x70000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
  57. 0x048cfc53, /* DRD2B1: var18 = EU3(); EU3(*idx1,var19) */
  58. 0x60000008, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=8 EXT init=0 WS=0 RS=0 */
  59. 0x088cf48b, /* DRD2B1: idx2 = EU3(); EU3(var18,var11) */
  60. 0x99198481, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var18; idx2 += inc0, idx3 += inc1 */
  61. 0x009ec398, /* DRD1A: *idx0 = *idx3; FN=0 init=4 WS=3 RS=3 */
  62. 0x991983b2, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var14; idx2 += inc6, idx3 += inc2 */
  63. 0x088ac398, /* DRD1A: *idx0 = *idx3; FN=0 TFD init=4 WS=1 RS=1 */
  64. 0x9919002d, /* LCD: idx2 = idx2; idx2 once var0; idx2 += inc5 */
  65. 0x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */
  66. 0x0c4cf88e, /* DRD2B1: *idx1 = EU3(); EU3(idx2,var14) */
  67. 0x000001f8, /* NOP */
  68. /* VAR[13]-VAR[19] */
  69. 0x0c000000,
  70. 0x40000000,
  71. 0x7fff7fff,
  72. 0x00000000,
  73. 0x00000003,
  74. 0x40000004,
  75. 0x43ffffff,
  76. /* INC[0]-INC[6] */
  77. 0x40000000,
  78. 0xe0000000,
  79. 0xe0000000,
  80. 0xa0000008,
  81. 0x20000000,
  82. 0x00000000,
  83. 0x4000ffff,
  84. };