Kconfig 18 KB

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  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. #core
  30. config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  31. bool
  32. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  33. bool
  34. config DMA_ENGINE
  35. bool
  36. config DMA_VIRTUAL_CHANNELS
  37. tristate
  38. config DMA_ACPI
  39. def_bool y
  40. depends on ACPI
  41. config DMA_OF
  42. def_bool y
  43. depends on OF
  44. select DMA_ENGINE
  45. #devices
  46. config ALTERA_MSGDMA
  47. tristate "Altera / Intel mSGDMA Engine"
  48. depends on HAS_IOMEM
  49. select DMA_ENGINE
  50. help
  51. Enable support for Altera / Intel mSGDMA controller.
  52. config AMBA_PL08X
  53. bool "ARM PrimeCell PL080 or PL081 support"
  54. depends on ARM_AMBA
  55. select DMA_ENGINE
  56. select DMA_VIRTUAL_CHANNELS
  57. help
  58. Say yes if your platform has a PL08x DMAC device which can
  59. provide DMA engine support. This includes the original ARM
  60. PL080 and PL081, Samsungs PL080 derivative and Faraday
  61. Technology's FTDMAC020 PL080 derivative.
  62. config AMCC_PPC440SPE_ADMA
  63. tristate "AMCC PPC440SPe ADMA support"
  64. depends on 440SPe || 440SP
  65. select DMA_ENGINE
  66. select DMA_ENGINE_RAID
  67. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  68. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  69. help
  70. Enable support for the AMCC PPC440SPe RAID engines.
  71. config AT_HDMAC
  72. tristate "Atmel AHB DMA support"
  73. depends on ARCH_AT91
  74. select DMA_ENGINE
  75. help
  76. Support the Atmel AHB DMA controller.
  77. config AT_XDMAC
  78. tristate "Atmel XDMA support"
  79. depends on ARCH_AT91
  80. select DMA_ENGINE
  81. help
  82. Support the Atmel XDMA controller.
  83. config AXI_DMAC
  84. tristate "Analog Devices AXI-DMAC DMA support"
  85. depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST
  86. select DMA_ENGINE
  87. select DMA_VIRTUAL_CHANNELS
  88. help
  89. Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
  90. controller is often used in Analog Device's reference designs for FPGA
  91. platforms.
  92. config BCM_SBA_RAID
  93. tristate "Broadcom SBA RAID engine support"
  94. depends on ARM64 || COMPILE_TEST
  95. depends on MAILBOX && RAID6_PQ
  96. select DMA_ENGINE
  97. select DMA_ENGINE_RAID
  98. select ASYNC_TX_DISABLE_XOR_VAL_DMA
  99. select ASYNC_TX_DISABLE_PQ_VAL_DMA
  100. default ARCH_BCM_IPROC
  101. help
  102. Enable support for Broadcom SBA RAID Engine. The SBA RAID
  103. engine is available on most of the Broadcom iProc SoCs. It
  104. has the capability to offload memcpy, xor and pq computation
  105. for raid5/6.
  106. config COH901318
  107. bool "ST-Ericsson COH901318 DMA support"
  108. select DMA_ENGINE
  109. depends on ARCH_U300 || COMPILE_TEST
  110. help
  111. Enable support for ST-Ericsson COH 901 318 DMA.
  112. config DMA_BCM2835
  113. tristate "BCM2835 DMA engine support"
  114. depends on ARCH_BCM2835
  115. select DMA_ENGINE
  116. select DMA_VIRTUAL_CHANNELS
  117. config DMA_JZ4740
  118. tristate "JZ4740 DMA support"
  119. depends on MACH_JZ4740 || COMPILE_TEST
  120. select DMA_ENGINE
  121. select DMA_VIRTUAL_CHANNELS
  122. config DMA_JZ4780
  123. tristate "JZ4780 DMA support"
  124. depends on MIPS || COMPILE_TEST
  125. select DMA_ENGINE
  126. select DMA_VIRTUAL_CHANNELS
  127. help
  128. This selects support for the DMA controller in Ingenic JZ4780 SoCs.
  129. If you have a board based on such a SoC and wish to use DMA for
  130. devices which can use the DMA controller, say Y or M here.
  131. config DMA_MTK_UART
  132. tristate "MediaTek SoCs APDMA support for UART"
  133. depends on OF
  134. select DMA_ENGINE
  135. select DMA_VIRTUAL_CHANNELS
  136. help
  137. Enable support for MediaTek SoC uart DMA engine.
  138. This DMA engine just only used when 8250 mtk uart is enabled.
  139. This DMA controller transfers data from memory to peripheral.
  140. It does not support memory to memory data transfer.
  141. config DMA_OMAP
  142. tristate "OMAP DMA support"
  143. depends on ARCH_OMAP || COMPILE_TEST
  144. select DMA_ENGINE
  145. select DMA_VIRTUAL_CHANNELS
  146. select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST)
  147. config DMA_SA11X0
  148. tristate "SA-11x0 DMA support"
  149. depends on ARCH_SA1100 || COMPILE_TEST
  150. select DMA_ENGINE
  151. select DMA_VIRTUAL_CHANNELS
  152. help
  153. Support the DMA engine found on Intel StrongARM SA-1100 and
  154. SA-1110 SoCs. This DMA engine can only be used with on-chip
  155. devices.
  156. config DMA_SUN4I
  157. tristate "Allwinner A10 DMA SoCs support"
  158. depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
  159. default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
  160. select DMA_ENGINE
  161. select DMA_VIRTUAL_CHANNELS
  162. help
  163. Enable support for the DMA controller present in the sun4i,
  164. sun5i and sun7i Allwinner ARM SoCs.
  165. config DMA_SUN6I
  166. tristate "Allwinner A31 SoCs DMA support"
  167. depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
  168. depends on RESET_CONTROLLER
  169. select DMA_ENGINE
  170. select DMA_VIRTUAL_CHANNELS
  171. help
  172. Support for the DMA engine first found in Allwinner A31 SoCs.
  173. config EP93XX_DMA
  174. bool "Cirrus Logic EP93xx DMA support"
  175. depends on ARCH_EP93XX || COMPILE_TEST
  176. select DMA_ENGINE
  177. help
  178. Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
  179. config FSL_DMA
  180. tristate "Freescale Elo series DMA support"
  181. depends on FSL_SOC
  182. select DMA_ENGINE
  183. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  184. ---help---
  185. Enable support for the Freescale Elo series DMA controllers.
  186. The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
  187. EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
  188. some Txxx and Bxxx parts.
  189. config FSL_EDMA
  190. tristate "Freescale eDMA engine support"
  191. depends on OF
  192. select DMA_ENGINE
  193. select DMA_VIRTUAL_CHANNELS
  194. help
  195. Support the Freescale eDMA engine with programmable channel
  196. multiplexing capability for DMA request sources(slot).
  197. This module can be found on Freescale Vybrid and LS-1 SoCs.
  198. config FSL_RAID
  199. tristate "Freescale RAID engine Support"
  200. depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
  201. select DMA_ENGINE
  202. select DMA_ENGINE_RAID
  203. ---help---
  204. Enable support for Freescale RAID Engine. RAID Engine is
  205. available on some QorIQ SoCs (like P5020/P5040). It has
  206. the capability to offload memcpy, xor and pq computation
  207. for raid5/6.
  208. config IMG_MDC_DMA
  209. tristate "IMG MDC support"
  210. depends on MIPS || COMPILE_TEST
  211. depends on MFD_SYSCON
  212. select DMA_ENGINE
  213. select DMA_VIRTUAL_CHANNELS
  214. help
  215. Enable support for the IMG multi-threaded DMA controller (MDC).
  216. config IMX_DMA
  217. tristate "i.MX DMA support"
  218. depends on ARCH_MXC
  219. select DMA_ENGINE
  220. help
  221. Support the i.MX DMA engine. This engine is integrated into
  222. Freescale i.MX1/21/27 chips.
  223. config IMX_SDMA
  224. tristate "i.MX SDMA support"
  225. depends on ARCH_MXC
  226. select DMA_ENGINE
  227. help
  228. Support the i.MX SDMA engine. This engine is integrated into
  229. Freescale i.MX25/31/35/51/53/6 chips.
  230. config INTEL_IDMA64
  231. tristate "Intel integrated DMA 64-bit support"
  232. select DMA_ENGINE
  233. select DMA_VIRTUAL_CHANNELS
  234. help
  235. Enable DMA support for Intel Low Power Subsystem such as found on
  236. Intel Skylake PCH.
  237. config INTEL_IOATDMA
  238. tristate "Intel I/OAT DMA support"
  239. depends on PCI && X86_64
  240. select DMA_ENGINE
  241. select DMA_ENGINE_RAID
  242. select DCA
  243. help
  244. Enable support for the Intel(R) I/OAT DMA engine present
  245. in recent Intel Xeon chipsets.
  246. Say Y here if you have such a chipset.
  247. If unsure, say N.
  248. config INTEL_IOP_ADMA
  249. tristate "Intel IOP ADMA support"
  250. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  251. select DMA_ENGINE
  252. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  253. help
  254. Enable support for the Intel(R) IOP Series RAID engines.
  255. config INTEL_MIC_X100_DMA
  256. tristate "Intel MIC X100 DMA Driver"
  257. depends on 64BIT && X86 && INTEL_MIC_BUS
  258. select DMA_ENGINE
  259. help
  260. This enables DMA support for the Intel Many Integrated Core
  261. (MIC) family of PCIe form factor coprocessor X100 devices that
  262. run a 64 bit Linux OS. This driver will be used by both MIC
  263. host and card drivers.
  264. If you are building host kernel with a MIC device or a card
  265. kernel for a MIC device, then say M (recommended) or Y, else
  266. say N. If unsure say N.
  267. More information about the Intel MIC family as well as the Linux
  268. OS and tools for MIC to use with this driver are available from
  269. <http://software.intel.com/en-us/mic-developer>.
  270. config K3_DMA
  271. tristate "Hisilicon K3 DMA support"
  272. depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
  273. select DMA_ENGINE
  274. select DMA_VIRTUAL_CHANNELS
  275. help
  276. Support the DMA engine for Hisilicon K3 platform
  277. devices.
  278. config LPC18XX_DMAMUX
  279. bool "NXP LPC18xx/43xx DMA MUX for PL080"
  280. depends on ARCH_LPC18XX || COMPILE_TEST
  281. depends on OF && AMBA_PL08X
  282. select MFD_SYSCON
  283. help
  284. Enable support for DMA on NXP LPC18xx/43xx platforms
  285. with PL080 and multiplexed DMA request lines.
  286. config MMP_PDMA
  287. bool "MMP PDMA support"
  288. depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
  289. select DMA_ENGINE
  290. help
  291. Support the MMP PDMA engine for PXA and MMP platform.
  292. config MMP_TDMA
  293. bool "MMP Two-Channel DMA support"
  294. depends on ARCH_MMP || COMPILE_TEST
  295. select DMA_ENGINE
  296. select MMP_SRAM if ARCH_MMP
  297. select GENERIC_ALLOCATOR
  298. help
  299. Support the MMP Two-Channel DMA engine.
  300. This engine used for MMP Audio DMA and pxa910 SQU.
  301. It needs sram driver under mach-mmp.
  302. config MOXART_DMA
  303. tristate "MOXART DMA support"
  304. depends on ARCH_MOXART
  305. select DMA_ENGINE
  306. select DMA_VIRTUAL_CHANNELS
  307. help
  308. Enable support for the MOXA ART SoC DMA controller.
  309. Say Y here if you enabled MMP ADMA, otherwise say N.
  310. config MPC512X_DMA
  311. tristate "Freescale MPC512x built-in DMA engine support"
  312. depends on PPC_MPC512x || PPC_MPC831x
  313. select DMA_ENGINE
  314. ---help---
  315. Enable support for the Freescale MPC512x built-in DMA engine.
  316. config MV_XOR
  317. bool "Marvell XOR engine support"
  318. depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
  319. select DMA_ENGINE
  320. select DMA_ENGINE_RAID
  321. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  322. ---help---
  323. Enable support for the Marvell XOR engine.
  324. config MV_XOR_V2
  325. bool "Marvell XOR engine version 2 support "
  326. depends on ARM64
  327. select DMA_ENGINE
  328. select DMA_ENGINE_RAID
  329. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  330. select GENERIC_MSI_IRQ_DOMAIN
  331. ---help---
  332. Enable support for the Marvell version 2 XOR engine.
  333. This engine provides acceleration for copy, XOR and RAID6
  334. operations, and is available on Marvell Armada 7K and 8K
  335. platforms.
  336. config MXS_DMA
  337. bool "MXS DMA support"
  338. depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
  339. select STMP_DEVICE
  340. select DMA_ENGINE
  341. help
  342. Support the MXS DMA engine. This engine including APBH-DMA
  343. and APBX-DMA is integrated into some Freescale chips.
  344. config MX3_IPU
  345. bool "MX3x Image Processing Unit support"
  346. depends on ARCH_MXC
  347. select DMA_ENGINE
  348. default y
  349. help
  350. If you plan to use the Image Processing unit in the i.MX3x, say
  351. Y here. If unsure, select Y.
  352. config MX3_IPU_IRQS
  353. int "Number of dynamically mapped interrupts for IPU"
  354. depends on MX3_IPU
  355. range 2 137
  356. default 4
  357. help
  358. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  359. To avoid bloating the irq_desc[] array we allocate a sufficient
  360. number of IRQ slots and map them dynamically to specific sources.
  361. config NBPFAXI_DMA
  362. tristate "Renesas Type-AXI NBPF DMA support"
  363. select DMA_ENGINE
  364. depends on ARM || COMPILE_TEST
  365. help
  366. Support for "Type-AXI" NBPF DMA IPs from Renesas
  367. config PCH_DMA
  368. tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
  369. depends on PCI && (X86_32 || COMPILE_TEST)
  370. select DMA_ENGINE
  371. help
  372. Enable support for Intel EG20T PCH DMA engine.
  373. This driver also can be used for LAPIS Semiconductor IOH(Input/
  374. Output Hub), ML7213, ML7223 and ML7831.
  375. ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
  376. for MP(Media Phone) use and ML7831 IOH is for general purpose use.
  377. ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
  378. ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
  379. config PL330_DMA
  380. tristate "DMA API Driver for PL330"
  381. select DMA_ENGINE
  382. depends on ARM_AMBA
  383. help
  384. Select if your platform has one or more PL330 DMACs.
  385. You need to provide platform specific settings via
  386. platform_data for a dma-pl330 device.
  387. config PXA_DMA
  388. bool "PXA DMA support"
  389. depends on (ARCH_MMP || ARCH_PXA)
  390. select DMA_ENGINE
  391. select DMA_VIRTUAL_CHANNELS
  392. help
  393. Support the DMA engine for PXA. It is also compatible with MMP PDMA
  394. platform. The internal DMA IP of all PXA variants is supported, with
  395. 16 to 32 channels for peripheral to memory or memory to memory
  396. transfers.
  397. config SIRF_DMA
  398. tristate "CSR SiRFprimaII/SiRFmarco DMA support"
  399. depends on ARCH_SIRF
  400. select DMA_ENGINE
  401. help
  402. Enable support for the CSR SiRFprimaII DMA engine.
  403. config STE_DMA40
  404. bool "ST-Ericsson DMA40 support"
  405. depends on ARCH_U8500
  406. select DMA_ENGINE
  407. help
  408. Support for ST-Ericsson DMA40 controller
  409. config ST_FDMA
  410. tristate "ST FDMA dmaengine support"
  411. depends on ARCH_STI
  412. depends on REMOTEPROC
  413. select ST_SLIM_REMOTEPROC
  414. select DMA_ENGINE
  415. select DMA_VIRTUAL_CHANNELS
  416. help
  417. Enable support for ST FDMA controller.
  418. It supports 16 independent DMA channels, accepts up to 32 DMA requests
  419. Say Y here if you have such a chipset.
  420. If unsure, say N.
  421. config STM32_DMA
  422. bool "STMicroelectronics STM32 DMA support"
  423. depends on ARCH_STM32 || COMPILE_TEST
  424. select DMA_ENGINE
  425. select DMA_VIRTUAL_CHANNELS
  426. help
  427. Enable support for the on-chip DMA controller on STMicroelectronics
  428. STM32 MCUs.
  429. If you have a board based on such a MCU and wish to use DMA say Y
  430. here.
  431. config S3C24XX_DMAC
  432. bool "Samsung S3C24XX DMA support"
  433. depends on ARCH_S3C24XX || COMPILE_TEST
  434. select DMA_ENGINE
  435. select DMA_VIRTUAL_CHANNELS
  436. help
  437. Support for the Samsung S3C24XX DMA controller driver. The
  438. DMA controller is having multiple DMA channels which can be
  439. configured for different peripherals like audio, UART, SPI.
  440. The DMA controller can transfer data from memory to peripheral,
  441. periphal to memory, periphal to periphal and memory to memory.
  442. config TXX9_DMAC
  443. tristate "Toshiba TXx9 SoC DMA support"
  444. depends on MACH_TX49XX || MACH_TX39XX
  445. select DMA_ENGINE
  446. help
  447. Support the TXx9 SoC internal DMA controller. This can be
  448. integrated in chips such as the Toshiba TX4927/38/39.
  449. config TEGRA20_APB_DMA
  450. bool "NVIDIA Tegra20 APB DMA support"
  451. depends on ARCH_TEGRA
  452. select DMA_ENGINE
  453. help
  454. Support for the NVIDIA Tegra20 APB DMA controller driver. The
  455. DMA controller is having multiple DMA channel which can be
  456. configured for different peripherals like audio, UART, SPI,
  457. I2C etc which is in APB bus.
  458. This DMA controller transfers data from memory to peripheral fifo
  459. or vice versa. It does not support memory to memory data transfer.
  460. config TEGRA210_ADMA
  461. tristate "NVIDIA Tegra210 ADMA support"
  462. depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK
  463. select DMA_ENGINE
  464. select DMA_VIRTUAL_CHANNELS
  465. help
  466. Support for the NVIDIA Tegra210 ADMA controller driver. The
  467. DMA controller has multiple DMA channels and is used to service
  468. various audio clients in the Tegra210 audio processing engine
  469. (APE). This DMA controller transfers data from memory to
  470. peripheral and vice versa. It does not support memory to
  471. memory data transfer.
  472. config TIMB_DMA
  473. tristate "Timberdale FPGA DMA support"
  474. depends on MFD_TIMBERDALE || COMPILE_TEST
  475. select DMA_ENGINE
  476. help
  477. Enable support for the Timberdale FPGA DMA engine.
  478. config TI_CPPI41
  479. tristate "CPPI 4.1 DMA support"
  480. depends on (ARCH_OMAP || ARCH_DAVINCI_DA8XX)
  481. select DMA_ENGINE
  482. help
  483. The Communications Port Programming Interface (CPPI) 4.1 DMA engine
  484. is currently used by the USB driver on AM335x and DA8xx platforms.
  485. config TI_DMA_CROSSBAR
  486. bool
  487. config TI_EDMA
  488. bool "TI EDMA support"
  489. depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST
  490. select DMA_ENGINE
  491. select DMA_VIRTUAL_CHANNELS
  492. select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST)
  493. default n
  494. help
  495. Enable support for the TI EDMA controller. This DMA
  496. engine is found on TI DaVinci and AM33xx parts.
  497. config XGENE_DMA
  498. tristate "APM X-Gene DMA support"
  499. depends on ARCH_XGENE || COMPILE_TEST
  500. select DMA_ENGINE
  501. select DMA_ENGINE_RAID
  502. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  503. help
  504. Enable support for the APM X-Gene SoC DMA engine.
  505. config XILINX_DMA
  506. tristate "Xilinx AXI DMAS Engine"
  507. depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
  508. select DMA_ENGINE
  509. help
  510. Enable support for Xilinx AXI VDMA Soft IP.
  511. AXI VDMA engine provides high-bandwidth direct memory access
  512. between memory and AXI4-Stream video type target
  513. peripherals including peripherals which support AXI4-
  514. Stream Video Protocol. It has two stream interfaces/
  515. channels, Memory Mapped to Stream (MM2S) and Stream to
  516. Memory Mapped (S2MM) for the data transfers.
  517. AXI CDMA engine provides high-bandwidth direct memory access
  518. between a memory-mapped source address and a memory-mapped
  519. destination address.
  520. AXI DMA engine provides high-bandwidth one dimensional direct
  521. memory access between memory and AXI4-Stream target peripherals.
  522. config XILINX_ZYNQMP_DMA
  523. tristate "Xilinx ZynqMP DMA Engine"
  524. depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
  525. select DMA_ENGINE
  526. help
  527. Enable support for Xilinx ZynqMP DMA controller.
  528. config ZX_DMA
  529. tristate "ZTE ZX DMA support"
  530. depends on ARCH_ZX || COMPILE_TEST
  531. select DMA_ENGINE
  532. select DMA_VIRTUAL_CHANNELS
  533. help
  534. Support the DMA engine for ZTE ZX family platform devices.
  535. # driver files
  536. source "drivers/dma/bestcomm/Kconfig"
  537. source "drivers/dma/qcom/Kconfig"
  538. source "drivers/dma/dw/Kconfig"
  539. source "drivers/dma/hsu/Kconfig"
  540. source "drivers/dma/sh/Kconfig"
  541. # clients
  542. comment "DMA Clients"
  543. depends on DMA_ENGINE
  544. config ASYNC_TX_DMA
  545. bool "Async_tx: Offload support for the async_tx api"
  546. depends on DMA_ENGINE
  547. help
  548. This allows the async_tx api to take advantage of offload engines for
  549. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  550. a dma engine that can perform raid operations and you have enabled
  551. MD_RAID456 say Y.
  552. If unsure, say N.
  553. config DMATEST
  554. tristate "DMA Test client"
  555. depends on DMA_ENGINE
  556. select DMA_ENGINE_RAID
  557. help
  558. Simple DMA test client. Say N unless you're debugging a
  559. DMA Device driver.
  560. config DMA_ENGINE_RAID
  561. bool
  562. endif