ti-cpufreq.c 6.6 KB

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  1. /*
  2. * TI CPUFreq/OPP hw-supported driver
  3. *
  4. * Copyright (C) 2016-2017 Texas Instruments, Inc.
  5. * Dave Gerlach <d-gerlach@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <linux/cpu.h>
  17. #include <linux/io.h>
  18. #include <linux/mfd/syscon.h>
  19. #include <linux/init.h>
  20. #include <linux/of.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/pm_opp.h>
  23. #include <linux/regmap.h>
  24. #include <linux/slab.h>
  25. #define REVISION_MASK 0xF
  26. #define REVISION_SHIFT 28
  27. #define AM33XX_800M_ARM_MPU_MAX_FREQ 0x1E2F
  28. #define AM43XX_600M_ARM_MPU_MAX_FREQ 0xFFA
  29. #define DRA7_EFUSE_HAS_OD_MPU_OPP 11
  30. #define DRA7_EFUSE_HAS_HIGH_MPU_OPP 15
  31. #define DRA7_EFUSE_HAS_ALL_MPU_OPP 23
  32. #define DRA7_EFUSE_NOM_MPU_OPP BIT(0)
  33. #define DRA7_EFUSE_OD_MPU_OPP BIT(1)
  34. #define DRA7_EFUSE_HIGH_MPU_OPP BIT(2)
  35. #define VERSION_COUNT 2
  36. struct ti_cpufreq_data;
  37. struct ti_cpufreq_soc_data {
  38. unsigned long (*efuse_xlate)(struct ti_cpufreq_data *opp_data,
  39. unsigned long efuse);
  40. unsigned long efuse_fallback;
  41. unsigned long efuse_offset;
  42. unsigned long efuse_mask;
  43. unsigned long efuse_shift;
  44. unsigned long rev_offset;
  45. };
  46. struct ti_cpufreq_data {
  47. struct device *cpu_dev;
  48. struct device_node *opp_node;
  49. struct regmap *syscon;
  50. const struct ti_cpufreq_soc_data *soc_data;
  51. };
  52. static unsigned long amx3_efuse_xlate(struct ti_cpufreq_data *opp_data,
  53. unsigned long efuse)
  54. {
  55. if (!efuse)
  56. efuse = opp_data->soc_data->efuse_fallback;
  57. /* AM335x and AM437x use "OPP disable" bits, so invert */
  58. return ~efuse;
  59. }
  60. static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data,
  61. unsigned long efuse)
  62. {
  63. unsigned long calculated_efuse = DRA7_EFUSE_NOM_MPU_OPP;
  64. /*
  65. * The efuse on dra7 and am57 parts contains a specific
  66. * value indicating the highest available OPP.
  67. */
  68. switch (efuse) {
  69. case DRA7_EFUSE_HAS_ALL_MPU_OPP:
  70. case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
  71. calculated_efuse |= DRA7_EFUSE_HIGH_MPU_OPP;
  72. case DRA7_EFUSE_HAS_OD_MPU_OPP:
  73. calculated_efuse |= DRA7_EFUSE_OD_MPU_OPP;
  74. }
  75. return calculated_efuse;
  76. }
  77. static struct ti_cpufreq_soc_data am3x_soc_data = {
  78. .efuse_xlate = amx3_efuse_xlate,
  79. .efuse_fallback = AM33XX_800M_ARM_MPU_MAX_FREQ,
  80. .efuse_offset = 0x07fc,
  81. .efuse_mask = 0x1fff,
  82. .rev_offset = 0x600,
  83. };
  84. static struct ti_cpufreq_soc_data am4x_soc_data = {
  85. .efuse_xlate = amx3_efuse_xlate,
  86. .efuse_fallback = AM43XX_600M_ARM_MPU_MAX_FREQ,
  87. .efuse_offset = 0x0610,
  88. .efuse_mask = 0x3f,
  89. .rev_offset = 0x600,
  90. };
  91. static struct ti_cpufreq_soc_data dra7_soc_data = {
  92. .efuse_xlate = dra7_efuse_xlate,
  93. .efuse_offset = 0x020c,
  94. .efuse_mask = 0xf80000,
  95. .efuse_shift = 19,
  96. .rev_offset = 0x204,
  97. };
  98. /**
  99. * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC
  100. * @opp_data: pointer to ti_cpufreq_data context
  101. * @efuse_value: Set to the value parsed from efuse
  102. *
  103. * Returns error code if efuse not read properly.
  104. */
  105. static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
  106. u32 *efuse_value)
  107. {
  108. struct device *dev = opp_data->cpu_dev;
  109. u32 efuse;
  110. int ret;
  111. ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
  112. &efuse);
  113. if (ret) {
  114. dev_err(dev,
  115. "Failed to read the efuse value from syscon: %d\n",
  116. ret);
  117. return ret;
  118. }
  119. efuse = (efuse & opp_data->soc_data->efuse_mask);
  120. efuse >>= opp_data->soc_data->efuse_shift;
  121. *efuse_value = opp_data->soc_data->efuse_xlate(opp_data, efuse);
  122. return 0;
  123. }
  124. /**
  125. * ti_cpufreq_get_rev() - Parse and return rev value present on SoC
  126. * @opp_data: pointer to ti_cpufreq_data context
  127. * @revision_value: Set to the value parsed from revision register
  128. *
  129. * Returns error code if revision not read properly.
  130. */
  131. static int ti_cpufreq_get_rev(struct ti_cpufreq_data *opp_data,
  132. u32 *revision_value)
  133. {
  134. struct device *dev = opp_data->cpu_dev;
  135. u32 revision;
  136. int ret;
  137. ret = regmap_read(opp_data->syscon, opp_data->soc_data->rev_offset,
  138. &revision);
  139. if (ret) {
  140. dev_err(dev,
  141. "Failed to read the revision number from syscon: %d\n",
  142. ret);
  143. return ret;
  144. }
  145. *revision_value = BIT((revision >> REVISION_SHIFT) & REVISION_MASK);
  146. return 0;
  147. }
  148. static int ti_cpufreq_setup_syscon_register(struct ti_cpufreq_data *opp_data)
  149. {
  150. struct device *dev = opp_data->cpu_dev;
  151. struct device_node *np = opp_data->opp_node;
  152. opp_data->syscon = syscon_regmap_lookup_by_phandle(np,
  153. "syscon");
  154. if (IS_ERR(opp_data->syscon)) {
  155. dev_err(dev,
  156. "\"syscon\" is missing, cannot use OPPv2 table.\n");
  157. return PTR_ERR(opp_data->syscon);
  158. }
  159. return 0;
  160. }
  161. static const struct of_device_id ti_cpufreq_of_match[] = {
  162. { .compatible = "ti,am33xx", .data = &am3x_soc_data, },
  163. { .compatible = "ti,am43", .data = &am4x_soc_data, },
  164. { .compatible = "ti,dra7", .data = &dra7_soc_data },
  165. {},
  166. };
  167. static int ti_cpufreq_init(void)
  168. {
  169. u32 version[VERSION_COUNT];
  170. struct device_node *np;
  171. const struct of_device_id *match;
  172. struct ti_cpufreq_data *opp_data;
  173. int ret;
  174. np = of_find_node_by_path("/");
  175. match = of_match_node(ti_cpufreq_of_match, np);
  176. of_node_put(np);
  177. if (!match)
  178. return -ENODEV;
  179. opp_data = kzalloc(sizeof(*opp_data), GFP_KERNEL);
  180. if (!opp_data)
  181. return -ENOMEM;
  182. opp_data->soc_data = match->data;
  183. opp_data->cpu_dev = get_cpu_device(0);
  184. if (!opp_data->cpu_dev) {
  185. pr_err("%s: Failed to get device for CPU0\n", __func__);
  186. return -ENODEV;
  187. }
  188. opp_data->opp_node = dev_pm_opp_of_get_opp_desc_node(opp_data->cpu_dev);
  189. if (!opp_data->opp_node) {
  190. dev_info(opp_data->cpu_dev,
  191. "OPP-v2 not supported, cpufreq-dt will attempt to use legacy tables.\n");
  192. goto register_cpufreq_dt;
  193. }
  194. ret = ti_cpufreq_setup_syscon_register(opp_data);
  195. if (ret)
  196. goto fail_put_node;
  197. /*
  198. * OPPs determine whether or not they are supported based on
  199. * two metrics:
  200. * 0 - SoC Revision
  201. * 1 - eFuse value
  202. */
  203. ret = ti_cpufreq_get_rev(opp_data, &version[0]);
  204. if (ret)
  205. goto fail_put_node;
  206. ret = ti_cpufreq_get_efuse(opp_data, &version[1]);
  207. if (ret)
  208. goto fail_put_node;
  209. ret = PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(opp_data->cpu_dev,
  210. version, VERSION_COUNT));
  211. if (ret) {
  212. dev_err(opp_data->cpu_dev,
  213. "Failed to set supported hardware\n");
  214. goto fail_put_node;
  215. }
  216. of_node_put(opp_data->opp_node);
  217. register_cpufreq_dt:
  218. platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
  219. return 0;
  220. fail_put_node:
  221. of_node_put(opp_data->opp_node);
  222. return ret;
  223. }
  224. device_initcall(ti_cpufreq_init);