icst.c 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106
  1. /*
  2. * linux/arch/arm/common/icst307.c
  3. *
  4. * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Support functions for calculating clocks/divisors for the ICST307
  11. * clock generators. See http://www.idt.com/ for more information
  12. * on these devices.
  13. *
  14. * This is an almost identical implementation to the ICST525 clock generator.
  15. * The s2div and idx2s files are different
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <asm/div64.h>
  20. #include "icst.h"
  21. /*
  22. * Divisors for each OD setting.
  23. */
  24. const unsigned char icst307_s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 };
  25. const unsigned char icst525_s2div[8] = { 10, 2, 8, 4, 5, 7, 9, 6 };
  26. EXPORT_SYMBOL(icst307_s2div);
  27. EXPORT_SYMBOL(icst525_s2div);
  28. unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco)
  29. {
  30. u64 dividend = p->ref * 2 * (u64)(vco.v + 8);
  31. u32 divisor = (vco.r + 2) * p->s2div[vco.s];
  32. do_div(dividend, divisor);
  33. return (unsigned long)dividend;
  34. }
  35. EXPORT_SYMBOL(icst_hz);
  36. /*
  37. * Ascending divisor S values.
  38. */
  39. const unsigned char icst307_idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 };
  40. const unsigned char icst525_idx2s[8] = { 1, 3, 4, 7, 5, 2, 6, 0 };
  41. EXPORT_SYMBOL(icst307_idx2s);
  42. EXPORT_SYMBOL(icst525_idx2s);
  43. struct icst_vco
  44. icst_hz_to_vco(const struct icst_params *p, unsigned long freq)
  45. {
  46. struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max };
  47. unsigned long f;
  48. unsigned int i = 0, rd, best = (unsigned int)-1;
  49. /*
  50. * First, find the PLL output divisor such
  51. * that the PLL output is within spec.
  52. */
  53. do {
  54. f = freq * p->s2div[p->idx2s[i]];
  55. if (f > p->vco_min && f <= p->vco_max)
  56. break;
  57. i++;
  58. } while (i < 8);
  59. if (i >= 8)
  60. return vco;
  61. vco.s = p->idx2s[i];
  62. /*
  63. * Now find the closest divisor combination
  64. * which gives a PLL output of 'f'.
  65. */
  66. for (rd = p->rd_min; rd <= p->rd_max; rd++) {
  67. unsigned long fref_div, f_pll;
  68. unsigned int vd;
  69. int f_diff;
  70. fref_div = (2 * p->ref) / rd;
  71. vd = (f + fref_div / 2) / fref_div;
  72. if (vd < p->vd_min || vd > p->vd_max)
  73. continue;
  74. f_pll = fref_div * vd;
  75. f_diff = f_pll - f;
  76. if (f_diff < 0)
  77. f_diff = -f_diff;
  78. if ((unsigned)f_diff < best) {
  79. vco.v = vd - 8;
  80. vco.r = rd - 2;
  81. if (f_diff == 0)
  82. break;
  83. best = f_diff;
  84. }
  85. }
  86. return vco;
  87. }
  88. EXPORT_SYMBOL(icst_hz_to_vco);