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Kconfig
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189621726b
clk: meson: meson8b: register the built-in reset controller
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%!s(int64=7) %!d(string=hai) anos |
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Makefile
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62ec0b9754
clk: meson: gxbb-aoclk: Add CEC 32k clock
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%!s(int64=7) %!d(string=hai) anos |
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clk-audio-divider.c
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59e85335dd
clk: meson: add audio clock divider support
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%!s(int64=7) %!d(string=hai) anos |
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clk-cpu.c
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55d42c40dd
clk: meson8b: clean up cpu clocks
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%!s(int64=8) %!d(string=hai) anos |
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clk-mpll.c
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800ffac107
clk: meson: mpll: use 64-bit maths in params_from_rate
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%!s(int64=6) %!d(string=hai) anos |
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clk-pll.c
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cd89e3cbbd
clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL
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%!s(int64=4) %!d(string=hai) anos |
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clkc.h
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1f737ffa13
clk: meson: mpll: fix mpll0 fractional part ignored
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%!s(int64=7) %!d(string=hai) anos |
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gxbb-aoclk-32k.c
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62ec0b9754
clk: meson: gxbb-aoclk: Add CEC 32k clock
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%!s(int64=7) %!d(string=hai) anos |
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gxbb-aoclk-regmap.c
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ffb13e3b84
clk: meson: gxbb-aoclk: Switch to regmap for register access
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%!s(int64=7) %!d(string=hai) anos |
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gxbb-aoclk.c
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62ec0b9754
clk: meson: gxbb-aoclk: Add CEC 32k clock
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%!s(int64=7) %!d(string=hai) anos |
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gxbb-aoclk.h
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62ec0b9754
clk: meson: gxbb-aoclk: Add CEC 32k clock
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%!s(int64=7) %!d(string=hai) anos |
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gxbb.c
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05fb6527b1
clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate
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%!s(int64=5) %!d(string=hai) anos |
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gxbb.h
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a5841de691
clk: meson: gxbb: Add sd_emmc clk0 clkids
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%!s(int64=7) %!d(string=hai) anos |
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meson8b.c
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3477a72b41
Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into clk-next
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%!s(int64=7) %!d(string=hai) anos |
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meson8b.h
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189621726b
clk: meson: meson8b: register the built-in reset controller
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%!s(int64=7) %!d(string=hai) anos |
Martin Blumenstingl
cd89e3cbbd
clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL