mtip32xx.h 13 KB

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  1. /*
  2. * mtip32xx.h - Header file for the P320 SSD Block Driver
  3. * Copyright (C) 2011 Micron Technology, Inc.
  4. *
  5. * Portions of this code were derived from works subjected to the
  6. * following copyright:
  7. * Copyright (C) 2009 Integrated Device Technology, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. */
  20. #ifndef __MTIP32XX_H__
  21. #define __MTIP32XX_H__
  22. #include <linux/spinlock.h>
  23. #include <linux/rwsem.h>
  24. #include <linux/ata.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/genhd.h>
  27. /* Offset of Subsystem Device ID in pci confoguration space */
  28. #define PCI_SUBSYSTEM_DEVICEID 0x2E
  29. /* offset of Device Control register in PCIe extended capabilites space */
  30. #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
  31. /* check for erase mode support during secure erase */
  32. #define MTIP_SEC_ERASE_MODE 0x2
  33. /* # of times to retry timed out/failed IOs */
  34. #define MTIP_MAX_RETRIES 2
  35. /* Various timeout values in ms */
  36. #define MTIP_NCQ_CMD_TIMEOUT_MS 15000
  37. #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000
  38. #define MTIP_INT_CMD_TIMEOUT_MS 5000
  39. #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \
  40. (MTIP_MAX_RETRIES + 1))
  41. /* check for timeouts every 500ms */
  42. #define MTIP_TIMEOUT_CHECK_PERIOD 500
  43. /* ftl rebuild */
  44. #define MTIP_FTL_REBUILD_OFFSET 142
  45. #define MTIP_FTL_REBUILD_MAGIC 0xED51
  46. #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
  47. /* unaligned IO handling */
  48. #define MTIP_MAX_UNALIGNED_SLOTS 2
  49. /* Macro to extract the tag bit number from a tag value. */
  50. #define MTIP_TAG_BIT(tag) (tag & 0x1F)
  51. /*
  52. * Macro to extract the tag index from a tag value. The index
  53. * is used to access the correct s_active/Command Issue register based
  54. * on the tag value.
  55. */
  56. #define MTIP_TAG_INDEX(tag) (tag >> 5)
  57. /*
  58. * Maximum number of scatter gather entries
  59. * a single command may have.
  60. */
  61. #define MTIP_MAX_SG 504
  62. /*
  63. * Maximum number of slot groups (Command Issue & s_active registers)
  64. * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
  65. */
  66. #define MTIP_MAX_SLOT_GROUPS 8
  67. /* Internal command tag. */
  68. #define MTIP_TAG_INTERNAL 0
  69. /* Micron Vendor ID & P320x SSD Device ID */
  70. #define PCI_VENDOR_ID_MICRON 0x1344
  71. #define P320H_DEVICE_ID 0x5150
  72. #define P320M_DEVICE_ID 0x5151
  73. #define P320S_DEVICE_ID 0x5152
  74. #define P325M_DEVICE_ID 0x5153
  75. #define P420H_DEVICE_ID 0x5160
  76. #define P420M_DEVICE_ID 0x5161
  77. #define P425M_DEVICE_ID 0x5163
  78. /* Driver name and version strings */
  79. #define MTIP_DRV_NAME "mtip32xx"
  80. #define MTIP_DRV_VERSION "1.3.1"
  81. /* Maximum number of minor device numbers per device. */
  82. #define MTIP_MAX_MINORS 16
  83. /* Maximum number of supported command slots. */
  84. #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
  85. /*
  86. * Per-tag bitfield size in longs.
  87. * Linux bit manipulation functions
  88. * (i.e. test_and_set_bit, find_next_zero_bit)
  89. * manipulate memory in longs, so we try to make the math work.
  90. * take the slot groups and find the number of longs, rounding up.
  91. * Careful! i386 and x86_64 use different size longs!
  92. */
  93. #define U32_PER_LONG (sizeof(long) / sizeof(u32))
  94. #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
  95. (U32_PER_LONG-1))/U32_PER_LONG)
  96. /* BAR number used to access the HBA registers. */
  97. #define MTIP_ABAR 5
  98. #ifdef DEBUG
  99. #define dbg_printk(format, arg...) \
  100. printk(pr_fmt(format), ##arg);
  101. #else
  102. #define dbg_printk(format, arg...)
  103. #endif
  104. #define MTIP_DFS_MAX_BUF_SIZE 1024
  105. #define __force_bit2int (unsigned int __force)
  106. enum {
  107. /* below are bit numbers in 'flags' defined in mtip_port */
  108. MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */
  109. MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */
  110. MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */
  111. MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */
  112. MTIP_PF_TO_ACTIVE_BIT = 9, /* timeout handling */
  113. MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) |
  114. (1 << MTIP_PF_EH_ACTIVE_BIT) |
  115. (1 << MTIP_PF_SE_ACTIVE_BIT) |
  116. (1 << MTIP_PF_DM_ACTIVE_BIT) |
  117. (1 << MTIP_PF_TO_ACTIVE_BIT)),
  118. MTIP_PF_HOST_CAP_64 = 10, /* cache HOST_CAP_64 */
  119. MTIP_PF_SVC_THD_ACTIVE_BIT = 4,
  120. MTIP_PF_ISSUE_CMDS_BIT = 5,
  121. MTIP_PF_REBUILD_BIT = 6,
  122. MTIP_PF_SVC_THD_STOP_BIT = 8,
  123. MTIP_PF_SVC_THD_WORK = ((1 << MTIP_PF_EH_ACTIVE_BIT) |
  124. (1 << MTIP_PF_ISSUE_CMDS_BIT) |
  125. (1 << MTIP_PF_REBUILD_BIT) |
  126. (1 << MTIP_PF_SVC_THD_STOP_BIT) |
  127. (1 << MTIP_PF_TO_ACTIVE_BIT)),
  128. /* below are bit numbers in 'dd_flag' defined in driver_data */
  129. MTIP_DDF_SEC_LOCK_BIT = 0,
  130. MTIP_DDF_REMOVE_PENDING_BIT = 1,
  131. MTIP_DDF_OVER_TEMP_BIT = 2,
  132. MTIP_DDF_WRITE_PROTECT_BIT = 3,
  133. MTIP_DDF_CLEANUP_BIT = 5,
  134. MTIP_DDF_RESUME_BIT = 6,
  135. MTIP_DDF_INIT_DONE_BIT = 7,
  136. MTIP_DDF_REBUILD_FAILED_BIT = 8,
  137. MTIP_DDF_REMOVAL_BIT = 9,
  138. MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) |
  139. (1 << MTIP_DDF_SEC_LOCK_BIT) |
  140. (1 << MTIP_DDF_OVER_TEMP_BIT) |
  141. (1 << MTIP_DDF_WRITE_PROTECT_BIT) |
  142. (1 << MTIP_DDF_REBUILD_FAILED_BIT)),
  143. };
  144. struct smart_attr {
  145. u8 attr_id;
  146. u16 flags;
  147. u8 cur;
  148. u8 worst;
  149. u32 data;
  150. u8 res[3];
  151. } __packed;
  152. struct mtip_work {
  153. struct work_struct work;
  154. void *port;
  155. int cpu_binding;
  156. u32 completed;
  157. } ____cacheline_aligned_in_smp;
  158. #define DEFINE_HANDLER(group) \
  159. void mtip_workq_sdbf##group(struct work_struct *work) \
  160. { \
  161. struct mtip_work *w = (struct mtip_work *) work; \
  162. mtip_workq_sdbfx(w->port, group, w->completed); \
  163. }
  164. #define MTIP_TRIM_TIMEOUT_MS 240000
  165. #define MTIP_MAX_TRIM_ENTRIES 8
  166. #define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8
  167. struct mtip_trim_entry {
  168. u32 lba; /* starting lba of region */
  169. u16 rsvd; /* unused */
  170. u16 range; /* # of 512b blocks to trim */
  171. } __packed;
  172. struct mtip_trim {
  173. /* Array of regions to trim */
  174. struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES];
  175. } __packed;
  176. /* Register Frame Information Structure (FIS), host to device. */
  177. struct host_to_dev_fis {
  178. /*
  179. * FIS type.
  180. * - 27h Register FIS, host to device.
  181. * - 34h Register FIS, device to host.
  182. * - 39h DMA Activate FIS, device to host.
  183. * - 41h DMA Setup FIS, bi-directional.
  184. * - 46h Data FIS, bi-directional.
  185. * - 58h BIST Activate FIS, bi-directional.
  186. * - 5Fh PIO Setup FIS, device to host.
  187. * - A1h Set Device Bits FIS, device to host.
  188. */
  189. unsigned char type;
  190. unsigned char opts;
  191. unsigned char command;
  192. unsigned char features;
  193. union {
  194. unsigned char lba_low;
  195. unsigned char sector;
  196. };
  197. union {
  198. unsigned char lba_mid;
  199. unsigned char cyl_low;
  200. };
  201. union {
  202. unsigned char lba_hi;
  203. unsigned char cyl_hi;
  204. };
  205. union {
  206. unsigned char device;
  207. unsigned char head;
  208. };
  209. union {
  210. unsigned char lba_low_ex;
  211. unsigned char sector_ex;
  212. };
  213. union {
  214. unsigned char lba_mid_ex;
  215. unsigned char cyl_low_ex;
  216. };
  217. union {
  218. unsigned char lba_hi_ex;
  219. unsigned char cyl_hi_ex;
  220. };
  221. unsigned char features_ex;
  222. unsigned char sect_count;
  223. unsigned char sect_cnt_ex;
  224. unsigned char res2;
  225. unsigned char control;
  226. unsigned int res3;
  227. };
  228. /* Command header structure. */
  229. struct mtip_cmd_hdr {
  230. /*
  231. * Command options.
  232. * - Bits 31:16 Number of PRD entries.
  233. * - Bits 15:8 Unused in this implementation.
  234. * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
  235. * - Bit 6 Write bit, should be set when writing data to the device.
  236. * - Bit 5 Unused in this implementation.
  237. * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
  238. */
  239. unsigned int opts;
  240. /* This field is unsed when using NCQ. */
  241. union {
  242. unsigned int byte_count;
  243. unsigned int status;
  244. };
  245. /*
  246. * Lower 32 bits of the command table address associated with this
  247. * header. The command table addresses must be 128 byte aligned.
  248. */
  249. unsigned int ctba;
  250. /*
  251. * If 64 bit addressing is used this field is the upper 32 bits
  252. * of the command table address associated with this command.
  253. */
  254. unsigned int ctbau;
  255. /* Reserved and unused. */
  256. unsigned int res[4];
  257. };
  258. /* Command scatter gather structure (PRD). */
  259. struct mtip_cmd_sg {
  260. /*
  261. * Low 32 bits of the data buffer address. For P320 this
  262. * address must be 8 byte aligned signified by bits 2:0 being
  263. * set to 0.
  264. */
  265. unsigned int dba;
  266. /*
  267. * When 64 bit addressing is used this field is the upper
  268. * 32 bits of the data buffer address.
  269. */
  270. unsigned int dba_upper;
  271. /* Unused. */
  272. unsigned int reserved;
  273. /*
  274. * Bit 31: interrupt when this data block has been transferred.
  275. * Bits 30..22: reserved
  276. * Bits 21..0: byte count (minus 1). For P320 the byte count must be
  277. * 8 byte aligned signified by bits 2:0 being set to 1.
  278. */
  279. unsigned int info;
  280. };
  281. struct mtip_port;
  282. /* Structure used to describe a command. */
  283. struct mtip_cmd {
  284. struct mtip_cmd_hdr *command_header; /* ptr to command header entry */
  285. dma_addr_t command_header_dma; /* corresponding physical address */
  286. void *command; /* ptr to command table entry */
  287. dma_addr_t command_dma; /* corresponding physical address */
  288. int scatter_ents; /* Number of scatter list entries used */
  289. int unaligned; /* command is unaligned on 4k boundary */
  290. struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */
  291. int retries; /* The number of retries left for this command. */
  292. int direction; /* Data transfer direction */
  293. blk_status_t status;
  294. };
  295. /* Structure used to describe a port. */
  296. struct mtip_port {
  297. /* Pointer back to the driver data for this port. */
  298. struct driver_data *dd;
  299. /*
  300. * Used to determine if the data pointed to by the
  301. * identify field is valid.
  302. */
  303. unsigned long identify_valid;
  304. /* Base address of the memory mapped IO for the port. */
  305. void __iomem *mmio;
  306. /* Array of pointers to the memory mapped s_active registers. */
  307. void __iomem *s_active[MTIP_MAX_SLOT_GROUPS];
  308. /* Array of pointers to the memory mapped completed registers. */
  309. void __iomem *completed[MTIP_MAX_SLOT_GROUPS];
  310. /* Array of pointers to the memory mapped Command Issue registers. */
  311. void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS];
  312. /*
  313. * Pointer to the beginning of the command header memory as used
  314. * by the driver.
  315. */
  316. void *command_list;
  317. /*
  318. * Pointer to the beginning of the command header memory as used
  319. * by the DMA.
  320. */
  321. dma_addr_t command_list_dma;
  322. /*
  323. * Pointer to the beginning of the RX FIS memory as used
  324. * by the driver.
  325. */
  326. void *rxfis;
  327. /*
  328. * Pointer to the beginning of the RX FIS memory as used
  329. * by the DMA.
  330. */
  331. dma_addr_t rxfis_dma;
  332. /*
  333. * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
  334. */
  335. void *block1;
  336. /*
  337. * DMA address of region for RX Fis, Identify, RLE10, and SMART
  338. */
  339. dma_addr_t block1_dma;
  340. /*
  341. * Pointer to the beginning of the identify data memory as used
  342. * by the driver.
  343. */
  344. u16 *identify;
  345. /*
  346. * Pointer to the beginning of the identify data memory as used
  347. * by the DMA.
  348. */
  349. dma_addr_t identify_dma;
  350. /*
  351. * Pointer to the beginning of a sector buffer that is used
  352. * by the driver when issuing internal commands.
  353. */
  354. u16 *sector_buffer;
  355. /*
  356. * Pointer to the beginning of a sector buffer that is used
  357. * by the DMA when the driver issues internal commands.
  358. */
  359. dma_addr_t sector_buffer_dma;
  360. u16 *log_buf;
  361. dma_addr_t log_buf_dma;
  362. u8 *smart_buf;
  363. dma_addr_t smart_buf_dma;
  364. /*
  365. * used to queue commands when an internal command is in progress
  366. * or error handling is active
  367. */
  368. unsigned long cmds_to_issue[SLOTBITS_IN_LONGS];
  369. /* Used by mtip_service_thread to wait for an event */
  370. wait_queue_head_t svc_wait;
  371. /*
  372. * indicates the state of the port. Also, helps the service thread
  373. * to determine its action on wake up.
  374. */
  375. unsigned long flags;
  376. /*
  377. * Timer used to complete commands that have been active for too long.
  378. */
  379. unsigned long ic_pause_timer;
  380. /* Semaphore to control queue depth of unaligned IOs */
  381. struct semaphore cmd_slot_unal;
  382. /* Spinlock for working around command-issue bug. */
  383. spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS];
  384. };
  385. /*
  386. * Driver private data structure.
  387. *
  388. * One structure is allocated per probed device.
  389. */
  390. struct driver_data {
  391. void __iomem *mmio; /* Base address of the HBA registers. */
  392. int major; /* Major device number. */
  393. int instance; /* Instance number. First device probed is 0, ... */
  394. struct gendisk *disk; /* Pointer to our gendisk structure. */
  395. struct pci_dev *pdev; /* Pointer to the PCI device structure. */
  396. struct request_queue *queue; /* Our request queue. */
  397. struct blk_mq_tag_set tags; /* blk_mq tags */
  398. struct mtip_port *port; /* Pointer to the port data structure. */
  399. unsigned product_type; /* magic value declaring the product type */
  400. unsigned slot_groups; /* number of slot groups the product supports */
  401. unsigned long index; /* Index to determine the disk name */
  402. unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
  403. struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
  404. struct dentry *dfs_node;
  405. bool trim_supp; /* flag indicating trim support */
  406. bool sr;
  407. int numa_node; /* NUMA support */
  408. char workq_name[32];
  409. struct workqueue_struct *isr_workq;
  410. atomic_t irq_workers_active;
  411. struct mtip_work work[MTIP_MAX_SLOT_GROUPS];
  412. int isr_binding;
  413. struct block_device *bdev;
  414. struct list_head online_list; /* linkage for online list */
  415. struct list_head remove_list; /* linkage for removing list */
  416. int unal_qdepth; /* qdepth of unaligned IO queue */
  417. };
  418. #endif