ahci_st.c 6.0 KB

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  1. /*
  2. * Copyright (C) 2012 STMicroelectronics Limited
  3. *
  4. * Authors: Francesco Virlinzi <francesco.virlinzi@st.com>
  5. * Alexandre Torgue <alexandre.torgue@st.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/export.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/clk.h>
  16. #include <linux/of.h>
  17. #include <linux/ahci_platform.h>
  18. #include <linux/libata.h>
  19. #include <linux/reset.h>
  20. #include <linux/io.h>
  21. #include <linux/dma-mapping.h>
  22. #include "ahci.h"
  23. #define DRV_NAME "st_ahci"
  24. #define ST_AHCI_OOBR 0xbc
  25. #define ST_AHCI_OOBR_WE BIT(31)
  26. #define ST_AHCI_OOBR_CWMIN_SHIFT 24
  27. #define ST_AHCI_OOBR_CWMAX_SHIFT 16
  28. #define ST_AHCI_OOBR_CIMIN_SHIFT 8
  29. #define ST_AHCI_OOBR_CIMAX_SHIFT 0
  30. struct st_ahci_drv_data {
  31. struct platform_device *ahci;
  32. struct reset_control *pwr;
  33. struct reset_control *sw_rst;
  34. struct reset_control *pwr_rst;
  35. };
  36. static void st_ahci_configure_oob(void __iomem *mmio)
  37. {
  38. unsigned long old_val, new_val;
  39. new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) |
  40. (0x04 << ST_AHCI_OOBR_CWMAX_SHIFT) |
  41. (0x08 << ST_AHCI_OOBR_CIMIN_SHIFT) |
  42. (0x0C << ST_AHCI_OOBR_CIMAX_SHIFT);
  43. old_val = readl(mmio + ST_AHCI_OOBR);
  44. writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
  45. writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
  46. writel(new_val, mmio + ST_AHCI_OOBR);
  47. }
  48. static int st_ahci_deassert_resets(struct ahci_host_priv *hpriv,
  49. struct device *dev)
  50. {
  51. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  52. int err;
  53. if (drv_data->pwr) {
  54. err = reset_control_deassert(drv_data->pwr);
  55. if (err) {
  56. dev_err(dev, "unable to bring out of pwrdwn\n");
  57. return err;
  58. }
  59. }
  60. if (drv_data->sw_rst) {
  61. err = reset_control_deassert(drv_data->sw_rst);
  62. if (err) {
  63. dev_err(dev, "unable to bring out of sw-rst\n");
  64. return err;
  65. }
  66. }
  67. if (drv_data->pwr_rst) {
  68. err = reset_control_deassert(drv_data->pwr_rst);
  69. if (err) {
  70. dev_err(dev, "unable to bring out of pwr-rst\n");
  71. return err;
  72. }
  73. }
  74. return 0;
  75. }
  76. static void st_ahci_host_stop(struct ata_host *host)
  77. {
  78. struct ahci_host_priv *hpriv = host->private_data;
  79. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  80. struct device *dev = host->dev;
  81. int err;
  82. if (drv_data->pwr) {
  83. err = reset_control_assert(drv_data->pwr);
  84. if (err)
  85. dev_err(dev, "unable to pwrdwn\n");
  86. }
  87. ahci_platform_disable_resources(hpriv);
  88. }
  89. static int st_ahci_probe_resets(struct ahci_host_priv *hpriv,
  90. struct device *dev)
  91. {
  92. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  93. drv_data->pwr = devm_reset_control_get(dev, "pwr-dwn");
  94. if (IS_ERR(drv_data->pwr)) {
  95. dev_info(dev, "power reset control not defined\n");
  96. drv_data->pwr = NULL;
  97. }
  98. drv_data->sw_rst = devm_reset_control_get(dev, "sw-rst");
  99. if (IS_ERR(drv_data->sw_rst)) {
  100. dev_info(dev, "soft reset control not defined\n");
  101. drv_data->sw_rst = NULL;
  102. }
  103. drv_data->pwr_rst = devm_reset_control_get(dev, "pwr-rst");
  104. if (IS_ERR(drv_data->pwr_rst)) {
  105. dev_dbg(dev, "power soft reset control not defined\n");
  106. drv_data->pwr_rst = NULL;
  107. }
  108. return st_ahci_deassert_resets(hpriv, dev);
  109. }
  110. static struct ata_port_operations st_ahci_port_ops = {
  111. .inherits = &ahci_platform_ops,
  112. .host_stop = st_ahci_host_stop,
  113. };
  114. static const struct ata_port_info st_ahci_port_info = {
  115. .flags = AHCI_FLAG_COMMON,
  116. .pio_mask = ATA_PIO4,
  117. .udma_mask = ATA_UDMA6,
  118. .port_ops = &st_ahci_port_ops,
  119. };
  120. static struct scsi_host_template ahci_platform_sht = {
  121. AHCI_SHT(DRV_NAME),
  122. };
  123. static int st_ahci_probe(struct platform_device *pdev)
  124. {
  125. struct device *dev = &pdev->dev;
  126. struct st_ahci_drv_data *drv_data;
  127. struct ahci_host_priv *hpriv;
  128. int err;
  129. drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
  130. if (!drv_data)
  131. return -ENOMEM;
  132. hpriv = ahci_platform_get_resources(pdev);
  133. if (IS_ERR(hpriv))
  134. return PTR_ERR(hpriv);
  135. hpriv->plat_data = drv_data;
  136. err = st_ahci_probe_resets(hpriv, &pdev->dev);
  137. if (err)
  138. return err;
  139. err = ahci_platform_enable_resources(hpriv);
  140. if (err)
  141. return err;
  142. st_ahci_configure_oob(hpriv->mmio);
  143. of_property_read_u32(dev->of_node,
  144. "ports-implemented", &hpriv->force_port_map);
  145. err = ahci_platform_init_host(pdev, hpriv, &st_ahci_port_info,
  146. &ahci_platform_sht);
  147. if (err) {
  148. ahci_platform_disable_resources(hpriv);
  149. return err;
  150. }
  151. return 0;
  152. }
  153. #ifdef CONFIG_PM_SLEEP
  154. static int st_ahci_suspend(struct device *dev)
  155. {
  156. struct ata_host *host = dev_get_drvdata(dev);
  157. struct ahci_host_priv *hpriv = host->private_data;
  158. struct st_ahci_drv_data *drv_data = hpriv->plat_data;
  159. int err;
  160. err = ahci_platform_suspend_host(dev);
  161. if (err)
  162. return err;
  163. if (drv_data->pwr) {
  164. err = reset_control_assert(drv_data->pwr);
  165. if (err) {
  166. dev_err(dev, "unable to pwrdwn");
  167. return err;
  168. }
  169. }
  170. ahci_platform_disable_resources(hpriv);
  171. return 0;
  172. }
  173. static int st_ahci_resume(struct device *dev)
  174. {
  175. struct ata_host *host = dev_get_drvdata(dev);
  176. struct ahci_host_priv *hpriv = host->private_data;
  177. int err;
  178. err = ahci_platform_enable_resources(hpriv);
  179. if (err)
  180. return err;
  181. err = st_ahci_deassert_resets(hpriv, dev);
  182. if (err) {
  183. ahci_platform_disable_resources(hpriv);
  184. return err;
  185. }
  186. st_ahci_configure_oob(hpriv->mmio);
  187. return ahci_platform_resume_host(dev);
  188. }
  189. #endif
  190. static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);
  191. static const struct of_device_id st_ahci_match[] = {
  192. { .compatible = "st,ahci", },
  193. {},
  194. };
  195. MODULE_DEVICE_TABLE(of, st_ahci_match);
  196. static struct platform_driver st_ahci_driver = {
  197. .driver = {
  198. .name = DRV_NAME,
  199. .pm = &st_ahci_pm_ops,
  200. .of_match_table = of_match_ptr(st_ahci_match),
  201. },
  202. .probe = st_ahci_probe,
  203. .remove = ata_platform_remove_one,
  204. };
  205. module_platform_driver(st_ahci_driver);
  206. MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
  207. MODULE_AUTHOR("Francesco Virlinzi <francesco.virlinzi@st.com>");
  208. MODULE_DESCRIPTION("STMicroelectronics SATA AHCI Driver");
  209. MODULE_LICENSE("GPL v2");